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FTCS '95: Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
1995 Proceeding
Publisher:
  • IEEE Computer Society
  • 1730 Massachusetts Ave., NW Washington, DC
  • United States
Conference:
June 27 - 30, 1995
Published:
27 June 1995

Reflects downloads up to 29 Jan 2025Bibliometrics
Abstract

No abstract available.

Article
Message from the General Chair
Page .11
Article
Message from the Program Chairs
Page .14
Article
Organizing and Program Committee
Page .17
Article
Referees
Page .21
Article
A Flexible ServerNet-Based Fault-Tolerant Architecture
Page 2

Abstract: The paper introduces a new fault-tolerant architecture that combines the best attributes of the software fault-tolerant Tandem NonStop systems with the hardware fault-tolerant integrity systems. This architecture is based on the ServerNet ...

Article
Efficient Failure Recovery in Multi-Disk Multimedia Servers
Page 12

In this paper, we present a novel disk failure recovery method that utilizes the inherent redundancy in video streams (rather than error-correcting codes) to ensure that the user-invoked on-the-fly failure recovery process does not impose any additional ...

Article
Checkpointing and Its Applications
Page 22

Abstract: The paper describes our experience with the implementation and applications of the Unix checkpointing library libckp, and identifies two concepts that have proven to be the key to making checkpointing a powerful tool. First, including all ...

Article
Synthesis for Testability by Sequential Redundancy Removal Using Retiming
Page 33

The existence of sequential redundancy will degrade testability of sequential circuits. By using retiming which rearranges flip-flops, some sequential redundancy are converted into combinational redundancy, which can be easily identified and removed by ...

Article
Synthesizing Finite State Machines for Minimum Length Synchronizing Sequence Using Partial Scan
Page 41

Abstract: The goal is to synthesize an FSM with the objective to minimize the number of scanned flip-flops while requiring a minimum number of system clocks to reach the synchronizable state. An algorithm for selecting state variables for scanning while ...

Article
Optimal Recovery Point Insertion for High-Level Synthesis of Recoverable Microarchitectures
Page 50

Abstract: The paper considers the problem of automatic insertion of recovery points in recoverable microarchitectures. Previous work on this problem provided heuristic algorithms that attempted either to minimize computation time with a bounded hardware ...

Article
The Totem System
Page 61

Abstract: The Totem system supports fault-tolerant applications in which distributed processes cooperate to perform a common task and in which replicated data must be updated consistently in the presence of asynchrony and faults. Reliable totally ...

Article
Fault Tolerance for Off-the-Shelf Applications and Hardware
Page 67

Abstract: The concept of middleware provides a transparent way to augment and change the characteristics of a service provider as seen from a client. Fault tolerant policies are ideal candidates for middleware implementation. We have defined and ...

Article
Fault Tolerance in Safety Critical Automotive Applications: Cost of Agreement as a Limiting Factor
Page 73

The high availability and safety requirements for automotive electronics are currently almost exclusively addressed by application-specific engineering solutions to fault tolerance rather than by systematic approaches. Currently, systematic approaches ...

Article
Optimal Resiliency Against Mobile Faults
Page 83

Abstract: We consider a model where malicious agents can corrupt hosts and move around in a network of processors. We consider a family of mobile fault models MF(t/n-1,/spl rho/). In MF(t/n-1,/spl rho/) there are a total of n processors, the maximum ...

Article
Interactive Consistency Algorithms Based on Voting and Error-Correcting Codes
Page 89

This paper presents a new class of synchronous deterministic non-authenticated algorithms for reaching interactive consistency (Byzantine agreement). The algorithms are based on voting and error-correcting codes and require considerably less data ...

Article
Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures
Page 100

Abstract: The paper presents a new approach to microarchitecture validation that adopts a paradigm analogous to that of automatic test pattern generation (ATPG) for digital logic testing. In this approach, the microarchitecture is rigorously specified ...

Article
LOCSTEP: A Logic Simulation-Based Test Generation Procedure
Page 110

We present a method to generate test sequences that detect large numbers of faults (close to or higher than the number of faults that can be detected by deterministic methods) at a cost which is significantly lower than any existing test generation ...

Article
OBDD-Based Optimization of Input Probabilities for Weighted Random Pattern Generation
Page 120

Numerous methods have been divised to compute and to optimize fault detection probabilities for combinational circuits. The methods range from topological to algebraic. In combination with OBDDs algebraic methods have received more and more attention. ...

Article
Dependability Modelling in a Prototype Development Framework
Page 131

Abstract: The Development Framework provides a highly automatic translation from a specification to an implementation. The specification is in a popular, graphical control engineering notation typically representing a system with stringent reliability ...

Article
ARMOR: Analyzer for Reducing Module Operational Risk
Page 137

Abstract: ARMOR (Analyzer for Reducing Module Operational Risk) is a software risk analysis tool which automatically identifies the operational risks of software program modules. ARMOR takes data directly from project database, failure database, and ...

Article
Self-Stabilizing Mutual Exclusion in the Presence of Faulty Nodes
Page 144

This paper presents the RatchetFT distributed fault-tolerant mutual exclusion algorithm for processor rings. RatchetFT is self-stabilizing, in that if mutual exclusion is lost due to any sequence of on-line failures and repairs of processors, mutual ...

Article
Fault-Tolerant Clock Synchronization for Distributed Systems Using Continuous Synchronization Messages
Page 154

Abstract: We present a probabilistic synchronization algorithm which sends periodic synchronization messages, instead of periodic bursts of synchronization messages as other algorithms do. Our "continuous" approach therefore avoids the burst network ...

Article
Process Allocation for Load Distribution in Fault-Tolerant Multicomputers
Page 174

In this paper, we consider a load-balancing process allocation method for fault-tolerant multicomputer systems that balances the load before as well as after faults start to degrade the performance of the system. In order to be able to tolerate a single ...

Article
A Model for the Analysis of the Fault Injection Process
Page 186

Abstract: Results of fault injection experiments performed under different conditions can only be related to each other, if their interpretation is based on a thorough understanding of activation and propagation of faults and errors. We analyze these ...

Article
Combining Software-Implemented and Simulation-Based Fault Injection into a Single Fault Injection Method
Page 196

Abstract: Fault/error injection has emerged as a valuable means for evaluating the dependability of a system. In particular, software-based techniques (which can be described as software-implemented and simulation-based techniques) have become very ...

Article
A Switch-Level Algorithm for Simulation of Transients in Combinational Logic
Page 207

Abstract: A two-step switch-level algorithm for fault simulation of transients in CMOS networks is presented. The first step models the fault propagation locally from the fault injection site to the subsequent CMOS blocks. It is shown that the pulse ...

Article
Implicit Signature Checking
Page 218

Abstract: Proposes a control flow checking method that assigns unique initial signatures to each basic block in a program by using the block's start address. Using this strategy, implicit signature checking points are obtained at the beginning of each ...

Article
Feasibility and Effectiveness of the Algorithm for Overhead Reduction in Analog Checkers
Page 238

Self-checking in analog circuits is more difficult than in digital circuits. The technique proposed by Abhijit Chatterjee can address concurrent error detection and correction in linear analog circuits and hence the reliability of the original circuit ...

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