research-article

An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits

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P. GoelAuthors Info & Claims

IEEE Transactions on Computers, Volume 30, Issue 3

Pages 215 - 222

https://doi.org/10.1109/TC.1981.1675757

Published: 01 March 1981 Publication History

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Abstract

The D-algorithm (DALG) is shown to be ineffective for the class of combinational logic circuits that is used to implement error correction and translation (ECAT) functions. PODEM (path-oriented decision making) is a new test generation algorithm for combinational logic circuits. PODEM uses an implicit enumeration approach analogous to that used for solving 0-1 integer programming problems. It is shown that PODEM is very efficient for ECAT circuits and is significantly more efficient than DALG over the general spectrum of combinational logic circuits. A distinctive feature of PODEM is its simplicity when compared to the D-algorithm. PODEM is a complete algorithm in that it will generate a test if one exists. Heuristics are used to achieve an efficient implicit search of the space of all possible primary input patterns until either a test is found or the space is exhausted.

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cover image IEEE Transactions on Computers

IEEE Transactions on Computers Volume 30, Issue 3

March 1981

78 pages

ISSN:0018-9340

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IEEE Computer Society

United States

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Published: 01 March 1981

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Petrolo VMedya SGraziano MPal D(2024)DETECTive: Machine Learning-driven Automatic Test Pattern Prediction for Faults in Digital CircuitsProceedings of the Great Lakes Symposium on VLSI 202410.1145/3649476.3658696(32-37)Online publication date: 12-Jun-2024
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