Search Results

There are a number of RTL coverage tools on themarket today that essentially tells you only that a set ofsignals has been toggled by a particular diagnostic test.This is useful in showing what areas of the RTL designare definitely not covered by the ...

Unknown values result from floating and contention type faults on tristate buffer nets thereby causing MISR signature loss during test pattern compression. A Consistently Dominant Fault model is presented that removes the problem and permits fault ...

We present a novel test generation technique for path delay faults, based on the growth (G) and disappearance (D) faults of programmable logic arrays (PLA). The circuit is modeled as a PLA that is prime and irredundant with respect to every output. ...

This correspondence presents a solution of a well-known essential problem of diagnostics open till now. The method of solution is based on a straight application of mathematical structures theory 1121, [11]and on a topological representation of Boolean ...

In order to accelerate an algorithm for test generation, it is necessary to reduce the number of backtracks in the algorithm and to shorten the process time between backtracks. In this paper, we consider several techniques to accelerate test generation ...

The concept of closedness of a set of logic functions under stuck-type faults is introduced. All sets of logic functions closed under stuck-type faults are classified. For the sets of logic functions closed under stuck-type faults, the test complexity ...

The D-algorithm (DALG) is shown to be ineffective for the class of combinational logic circuits that is used to implement error correction and translation (ECAT) functions. PODEM (path-oriented decision making) is a new test generation algorithm for ...