Article

Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation

Authors:

M. PedramAuthors Info & Claims

ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

Pages 29 - 34

https://doi.org/10.1109/ICCAD.2004.1382538

Published: 07 November 2004 Publication History

Abstract

This work presents a dynamic voltage and frequency scaling (DVFS) technique that minimizes the total system energy consumption for performing a task while satisfying a given execution time constraint. We first show that in order to guarantee minimum energy for task execution by using DVFS it is essential to divide the system power into active and standby power components. Next, we present a new DVFS technique, which considers not only the active power, but also the standby component of the system power. This is in sharp contrast with previous DVFS techniques, which only consider the active power component. We have implemented the proposed DVFS technique on the BitsyX platform - an Intel PXA255-based platform manufactured by ADS Inc., and report detailed power measurements on this platform. These measurements show that, compared to conventional DVFS techniques, an additional system energy saving of up to 18% can be achieved while satisfying the user-specified timing constraints.

References

[1]

{1} Developer manual: "Intel 80200 Processor Based on Intel XScale Microarchitecture," http://developer.intel.com/design/iio/manuals/273411.htm

[2]

{2} "Crusoe SE Processor TM5800 Data Book v2.1," http://www.transmeta.com/everywhere/products/embedded/embedded_ sefamily.html.

[3]

{3} F. Yao, A. Demers, and S. Shenker, "Scheduling model for reduced CPU energy," IEEE Annual Foundations of Computer Science, pp. 374-382, 1995.

Digital Library

[4]

{4} Y. Shin and K. Choi, "Power conscious fixed priority scheduling for hard real-time systems," Proc. of the 36th Annual Design Automation Conference, pp. 134-139, 1999.

Digital Library

[5]

{5} I. Hong, G. Qu, M. Potkonjak, and M. B. Srivastava, "Synthesis techniques for low-power hard real-time systems on variable voltage processor," Proc. of the 19th IEEE Real-Time Systems Symposium, pp. 178-187, 1998.

Digital Library

[6]

{6} D. Shin, J. Kim, and S. Lee, "Low-energy intra-task voltage scheduling using static timing analysis," Proc. of Design Automation Conference, pp. 438-443, 2001.

Digital Library

[7]

{7} S. Lee and T. Sakurai, "Run-time power control scheme using software feedback loop for low-power real-time applications," Proc. of Asia-Pacific Design Automation Conference, pp. 381-386, 2000.

Digital Library

[8]

{8} M. Weiser, B. Welch, A. Demers, and S. Shenker, "Scheduling for reduced CPU energy," Proc. of the 1st Symposium on Operating Systems Design Implementation, pp. 13-23, 1994.

Digital Library

[9]

{9} C. Hsu and U. Kremer, "Compiler-directed dynamic voltage scaling for memory-bound applications," Technical Report DCS-TR-498, Department of Computer Science, Rutgers University, Aug. 2002.

Digital Library

[10]

{10} C. Hsu and U. Kremer, "Single region vs. multiple regions: A comparison of different compiler-directed dynamic voltage scheduling approaches," Proc. of Workshop on Power-Aware Computer Systems, Feb. 2002.

[11]

{11} S. Ghiasi, J. Casmira, and D. Grunwald, "Using IPC variation in workloads with externally specified rates to reduce power consumption," Proc. of Workshop on Complexity Effective Design, Jun. 2000.

[12]

{12} A. Wissel and F. Bellosa, "Process Cruise Control," CASES 2002, Grenoble, France, Oct. 2002.

[13]

{13} K. Choi, R. Soma, and M. Pedram, "Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times," Proc. of Design, Automation and Test in Europe, 2004.

Digital Library

[14]

{14} K. Choi, R. Soma, and M. Pedram, "Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding," Proc. of Design Automation Conference, 2004.

Digital Library

[15]

{15} http://www.applieddata.net/products_bitsyX.asp

[16]

{16} http://download.micron.com/pdf/datasheets/dram/sdram/256MSDRA M_G.pdf

[17]

{17} Developer's manual: "Intel XScale Microarchitecture for the PXA255 Processor" http://www.intel.com/design/pca/applicationsprocessors/ma nuals/278693.htm

[18]

{18} User's manual: "Intel XScale Microarchitecture for the PXA255 Processor" http://www.intel.com/design/pca/applicationsprocessors/ma nuals/278796.htm

[19]

{19} http://www.instrument.com/pci/udas.asp

[20]

{20} http://www.eecs.umich.edu/mibench

Cited By

Tomusk EDubach CO'boyle M(2016)Selecting Heterogeneous Cores for DiversityACM Transactions on Architecture and Code Optimization10.1145/301416513:4(1-25)Online publication date: 16-Dec-2016
https://dl.acm.org/doi/10.1145/3014165
Tomusk EDubach CO’boyle M(2015)Four Metrics to Evaluate Heterogeneous MulticoresACM Transactions on Architecture and Code Optimization10.1145/282995012:4(1-25)Online publication date: 16-Nov-2015
https://dl.acm.org/doi/10.1145/2829950
Schöne RMolka DWerner M(2015)Wake-up latencies for processor idle states on current x86 processorsComputer Science - Research and Development10.1007/s00450-014-0270-z30:2(219-227)Online publication date: 1-May-2015
https://dl.acm.org/doi/10.1007/s00450-014-0270-z
Show More Cited By

Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation
1. Hardware

Recommendations

Compiler-directed dynamic voltage and frequency scaling for cpu power and energy reduction
The limit of dynamic voltage scaling and insomniac dynamic voltage scaling

Dynamic voltage scaling (DVS) is a popular approach for energy reduction of integrated circuits. Current processors that use DVS typically have an operating voltage range from full to half of the maximum V_dd. However, there is no fundamental reason why ...
Reliability-Aware Dynamic Voltage and Frequency Scaling
ISVLSI '10: Proceedings of the 2010 IEEE Annual Symposium on VLSI

Dynamic voltage and frequency scaling (DVFS) is an effective method for controlling energy dissipation of embedded systems. However, recent researches have illustrated that DVFS techniques have compromising effects on the system reliability. Our ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

November 2004

913 pages

ISBN:0780387023

Sponsors

SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society

United States

Publication History

Published: 07 November 2004

Check for updates

Qualifiers

Article

Conference

ICCAD04

Sponsor:

SIGDA

ICCAD04: The International Conference on Computer-Aided Design 2004

November 7 - 11, 2004

Acceptance Rates

Overall Acceptance Rate 457 of 1,762 submissions, 26%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

14
Total Citations
View Citations
272
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 29 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

Tomusk EDubach CO'boyle M(2016)Selecting Heterogeneous Cores for DiversityACM Transactions on Architecture and Code Optimization10.1145/301416513:4(1-25)Online publication date: 16-Dec-2016
https://dl.acm.org/doi/10.1145/3014165
Tomusk EDubach CO’boyle M(2015)Four Metrics to Evaluate Heterogeneous MulticoresACM Transactions on Architecture and Code Optimization10.1145/282995012:4(1-25)Online publication date: 16-Nov-2015
https://dl.acm.org/doi/10.1145/2829950
Schöne RMolka DWerner M(2015)Wake-up latencies for processor idle states on current x86 processorsComputer Science - Research and Development10.1007/s00450-014-0270-z30:2(219-227)Online publication date: 1-May-2015
https://dl.acm.org/doi/10.1007/s00450-014-0270-z
Balakrishnan PTham C(2013)Energy-Efficient Mapping and Scheduling of Task Interaction Graphs for Code Offloading in Mobile Cloud ComputingProceedings of the 2013 IEEE/ACM 6th International Conference on Utility and Cloud Computing10.1109/UCC.2013.23(34-41)Online publication date: 9-Dec-2013
https://dl.acm.org/doi/10.1109/UCC.2013.23
Liu HShao ZWang MDu JXue CJia Z(2009)Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded SystemsJournal of Signal Processing Systems10.1007/s11265-008-0315-257:2(249-262)Online publication date: 1-Nov-2009
https://dl.acm.org/doi/10.1007/s11265-008-0315-2
Hong SYoo SBin BChoi KEo SKim TSciuto D(2008)Dynamic voltage scaling of supply and body bias exploiting software runtime distributionProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403433(242-247)Online publication date: 10-Mar-2008
https://dl.acm.org/doi/10.1145/1403375.1403433
Zhong XXu C(2008)System-wide energy minimization for real-time tasksACM Transactions on Embedded Computing Systems10.1145/1347375.13473817:3(1-24)Online publication date: 8-May-2008
https://dl.acm.org/doi/10.1145/1347375.1347381
Zhang SChatha KKonjevod GMarculescu DRaghunathan AKeshavarzi ANarayanan V(2007)Approximation algorithms for power minimization of earliest deadline first and rate monotonic schedulesProceedings of the 2007 international symposium on Low power electronics and design10.1145/1283780.1283828(225-230)Online publication date: 27-Aug-2007
https://dl.acm.org/doi/10.1145/1283780.1283828
Zhong XXu C(2007)Frequency-aware energy optimization for real-time periodic and aperiodic tasksACM SIGPLAN Notices10.1145/1273444.125477142:7(21-30)Online publication date: 13-Jun-2007
https://dl.acm.org/doi/10.1145/1273444.1254771
Zhong XXu CPande SLi Z(2007)Frequency-aware energy optimization for real-time periodic and aperiodic tasksProceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems10.1145/1254766.1254771(21-30)Online publication date: 13-Jun-2007
https://dl.acm.org/doi/10.1145/1254766.1254771
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Figures

Tables

Media

View Table of Conten