General information | |
---|---|
Launched | 2023 |
Designed by | ARM Ltd. |
Cache | |
L1 cache | 64/128 KiB (32/64 KiB I-cache with parity, 32/64 KiB D-cache) per core |
L2 cache | 128–512 KiB per core |
L3 cache | 512 KiB – 32 MiB(optional) |
Architecture and classification | |
Microarchitecture | ARM Cortex-A720 |
Instruction set | ARMv9.2-A |
Products, models, variants | |
Product code name(s) |
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Variant(s) | |
History | |
Predecessor(s) | ARM Cortex-A715 |
Successor(s) | ARM Cortex-A730 |
The ARM Cortex-A720 is a CPU core model from Arm unveiled in TCS23 (total compute solution), [1] it serves as a successor of the CPU core ARM Cortex-A715, Cortex-A700 CPU cores series generally focus on high performance and efficiency, the CPU core can be paired with other cores in its family like ARM Cortex-X4 or/and ARM Cortex-A520 in a CPU cluster. It can be used as either "big" or "LITTLE". [2] [3] [4] [5] [6] [7]
uArch | Cortex-A78 | Cortex-A710 | Cortex-A715 | Cortex-A720 |
---|---|---|---|---|
Peak clock speed | ~3.0 GHz | |||
Decode width | 4 | 5 | ||
Dispatch | 6/cycle | 5/cycle [8] | ? | |
Max In-flight | 160 | ? | 192+ [9] | ? |
L0 (Mops entries) | 1536 [10] [11] [12] | 0 | ||
L1-I + L1-D | 32/64+32/64 KiB | |||
L2 | 128–512 KiB | |||
L3 | 0–8 MiB | 0–16 MiB | 0–32 MiB | |
AArch | 32-bit and 64-bit | 64-bit | ||
Architecture | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A |
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This article needs additional or more specific categories .(June 2023) |