WO2024219858A1 - Apparatus and method for determining optimal adaptive synchronization frame range from among multiple adaptive synchronization frame ranges - Google Patents

Abstract

According to various embodiments of the present disclosure, provided is an operation method of a source device, the method comprising the steps of: receiving a hot plug detection (HPD) signal from a sink device; receiving extended display identification (EDID) and a DisplayID from the sink device; determining an adaptive sync data block and a frame rate on the basis of the EDID and the DisplayID of the sink device; and transmitting, to the sink device, information regarding the determined frame rate, and a session description protocol (SDP) generated on the basis of the determined adaptive sync data block.

Description

Device and method for determining an optimal adaptive synchronization frame range among multiple adaptive synchronization frame ranges

The present disclosure relates to a device and method for performing an adaptive-sync operation. Specifically, the present disclosure relates to a device and method for determining an optimal adaptive-sync frame range among multiple adaptive-sync frame ranges.

Since the DisplayPort standard has limitations on the transmission speed depending on the supported resolution and whether or not DSC (Display Stream Compression) is used, Adaptive-Sync Frame Range also operates differently. Therefore, Multi Frame Adaptive-Sync Range must be indicated in EDID, and in this case, appropriate rules are required for proper operation. However, appropriate rules for Multi Frame Adaptive-Sync to operate have not been defined up to now.

When the Adaptive-Sync Frame Range is set from 60Hz to 240Hz, in Adaptive-Sync mode, it does not operate at the Max Frame Range of 240Hz, but at 120Hz. Therefore, if OverDrive is tuned to 240Hz, excessive Over/Undershoot may occur when operating at the untuned 120Hz. In a Sink (e.g. monitor) with Adaptive-Sync technology applied, when OverDrive tuning according to the Frame Range is performed, it is tuned based on the Max Frame Range, and because tuning is not performed at frequencies lower than that (tuning only at Max), excessive Over/Undershoot occurs, which causes problems.

Therefore, in order for Multi Frame Adaptive-Sync to work properly, a standardized convention between Source and Sink is needed that only refers to the Max value of the Frame Range. If this standardization is achieved, devices that support Adaptive-Sync can automatically set up Multi Frame Adaptive-Sync and achieve optimal performance.

To solve the above-described problems, the present disclosure provides a device and method for performing an operation of adaptive synchronization.

The present disclosure provides a device and method for determining an optimal adaptive synchronization frame range among multiple adaptive synchronization frame ranges.

The technical problems to be achieved in the present disclosure are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by a person having ordinary skill in the technical field to which the present disclosure belongs from the description below.

According to various embodiments of the present disclosure, a method of operating a source device is provided, comprising: receiving a hot plug detection (HPD) signal from a sink device; receiving first information related to an Extended Display Identification (EDID) or a DisplayID (DPID) from the sink device; determining a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the sink device; when an Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, determining a specific adaptive-sync frame range whose maximum frame rate among the plurality of Adaptive-Sync Frame Ranges corresponds to the specific video timing frame rate; and transmitting processed information based on the specific adaptive-sync frame range to the sink device.

According to various embodiments of the present disclosure, a source device comprises: a processor; a memory; and a transceiver, wherein the memory stores instructions for performing operations based on being executed by the processor, the operations comprising: receiving a hot plug detection (HPD) signal from a sink device; receiving first information related to an Extended Display Identification (EDID) or a DisplayID (DPID) from the sink device; determining a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the sink device; when an Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, determining a specific adaptive-sync frame range whose maximum frame rate among the plurality of Adaptive-Sync Frame Ranges corresponds to the specific video timing frame rate; A source device is provided, comprising a step of transmitting processed information based on the specific adaptive synchronization frame range to the sink device.

According to various embodiments of the present disclosure, one or more non-transitory computer-readable media storing one or more instructions, wherein the one or more instructions, when executed by one or more processors, perform operations, the operations comprising: receiving a hot plug detection (HPD) signal from a sink device; receiving first information related to an Extended Display Identification (EDID) or a DisplayID (DPID) from the sink device; determining a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the sink device; when an Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, determining a specific adaptive-sync frame range whose maximum frame rate among the plurality of Adaptive-Sync Frame Ranges corresponds to the specific video timing frame rate; A computer-readable medium is provided, comprising a step of transmitting processed information based on the specific adaptive synchronization frame range to the sink device.

To solve the above-described problems, the present disclosure can provide a device and method for performing an operation of adaptive synchronization.

The present disclosure can provide a device and method for determining an optimal adaptive synchronization frame range among multiple adaptive synchronization frame ranges.

The drawings attached below are intended to aid in understanding the present disclosure and may provide embodiments of the present disclosure together with detailed descriptions. However, the technical features of the present disclosure are not limited to specific drawings, and the features disclosed in each drawing may be combined with each other to form a new embodiment. Reference numerals in each drawing may mean structural elements.

FIG. 1 is a block diagram illustrating a system according to various embodiments of the present disclosure.

FIG. 2 is a diagram illustrating an example of Adaptive-Sync SDP transmission timing according to various embodiments of the present disclosure.

FIG. 3 is a diagram illustrating an example of an AUX flow diagram related to Adaptive-Sync operation according to various embodiments of the present disclosure.

FIG. 4 is a diagram illustrating an example of the structure of an Adaptive-Sync Data Block in DisplayID 2.0 according to various embodiments of the present disclosure.

Figure 5 is a diagram illustrating an example of a process for determining a Frame Range when a Source device performs an Adaptive-Sync operation.

FIG. 6 is a diagram illustrating an example of a process for determining a Frame Range when a Source device performs an Adaptive-Sync operation according to various embodiments of the present disclosure.

FIG. 7 is a diagram illustrating an example of an operation method of a source device according to various embodiments of the present disclosure.

In various embodiments of the present disclosure, “A or B” can mean “only A,” “only B,” or “both A and B.” In other words, in various embodiments of the present disclosure, “A or B” can be interpreted as “A and/or B.” For example, in various embodiments of the present disclosure, “A, B or C” can mean “only A,” “only B,” “only C,” or “any combination of A, B and C.”

In various embodiments of the present disclosure, a slash (/) or a comma may mean "and/or". For example, "A/B" may mean "A and/or B". Accordingly, "A/B" may mean "only A", "only B", or "both A and B". For example, "A, B, C" may mean "A, B, or C".

In various embodiments of the present disclosure, “at least one of A and B” can mean “only A,” “only B,” or “both A and B.” Furthermore, in various embodiments of the present disclosure, the expressions “at least one of A or B” or “at least one of A and/or B” can be interpreted as equivalent to “at least one of A and B.”

Additionally, in various embodiments of the present disclosure, “at least one of A, B and C” can mean “only A,” “only B,” “only C,” or “any combination of A, B and C.” Additionally, “at least one of A, B or C” or “at least one of A, B and/or C” can mean “at least one of A, B and C.”

FIG. 1 is a block diagram illustrating a system according to various embodiments of the present disclosure.

Hereinafter, devices that transmit and receive video/audio/control data are collectively referred to as AV (audio/video) systems. Examples of AV systems include HDMI and DisplayPort.

Referring to FIG. 1, an AV system may include a source device (100) and a sink device (200). In particular, a device transmitting audio/video data in the AV system may correspond to a source device (100), and a device receiving video/audio data may correspond to a sink device (200). At this time, cables and connectors may be provided as physical devices that connect the two devices to support data transmission and reception.

Cables and connectors can perform four-channel pairings that provide Transition Minimized Differential Signaling (TMDS) data channels and a TMDS clock channel. The TMDS data channels can be used to carry video data, audio data, and auxiliary data.

Additionally, the AV system provides the VESA (Video Electronics Standards Association) Display Data Channel (DDC). DDC is used to exchange configuration and status information between source and sink devices. The CEC protocol can provide high-level control functions between various audiovisual products in the user environment and can be used optionally. In addition, the optional HEAC (HDMI Ethernet and Audio Return Channel) can provide ARC (Audio Return Channel) and Ethernet-compatible data networking between connected devices in the opposite direction from TMDS.

Video data, audio data and additional data can be transmitted/received over three TMDS data channels. The TMDS clock, which typically runs the video pixel rate, is transmitted over the TMDS clock channel. The TMDS clock can be used as a frequency reference for data recovery on the three TMDS data channels at the receiver. At the source device, 8 bits of data per TMDS data channel can be converted into a 10-bit DC balanced, transition-minimized sequence that can be transmitted serially at a rate of 10 bits per TMDS clock period.

To transmit audio data and additional data over TMDS channels, AV systems use a packet structure. To achieve high reliability for audio data and control data, data can be transmitted as 10-bit words generated using BCH error correction code and error reduction coding.

A source device can read the Enhanced Extended Display Identification Data (E-EDID) of a DDC (Display Data Channel) sink device to find out the configuration information and possible functions of the sink device. E-EDID may also be referred to as EDID information hereinafter.

The utility line can be used for optional extensions such as HEAC.

The source device (100) can receive EDID (Extended Display Identification Data) information from the sink device (200) through a DDC channel. The source device (100) can recognize configuration information and supported functions of the sink device (200) by parsing the received EDID information. The EDID information can include at least one block including various information about the sink device (200).

In particular, EDID information according to one embodiment of the present invention may include information on the function and power supply capability of the sink device (200) in power transmission and reception. The source device (100) may recognize the power transmission/reception capability of the sink device (200) through this EDID information, and may transmit power to the sink device (200) or receive power from the sink device (200) accordingly.

The source device (100) includes at least one of a display unit (110), a user input interface unit (120), a control unit (180), a transmitter (Tx), a memory unit (140), a storage unit (150), a multimedia unit (160), a power control unit (130), and a power supply unit (170).

The sink device (200) includes at least one of an EDID EEPROM (210), a power control unit (220), a display unit (230), a user input interface unit (240), a receiver (Rx), a control unit (280), a power supply unit (250), a memory unit (260), and a multimedia unit (270). Hereinafter, descriptions of units performing the same operation will not be repeated.

The source device (100) represents a physical device that transmits or streams content stored in the storage unit (150) to the sink device (200). The source device (100) can send a request message to the sink device (200) or receive and process a request message received from the sink device (200). The source device (100) can provide a UI that processes and transmits a response message transmitted by the sink device (200) in response to the transmitted request message to the user, and when the source device (100) includes a display unit (110), this UI can be provided as a display. In addition, the source device (100) can request the sink device (200) for power to be supplied.

The sink device (200) receives content from the source device (100) and can transmit a request message to the source device (100) or process a message received from the source device (100) and transmit a response message. The sink device (200) can also provide a UI (User Interface) that processes a response message received from the source device (100) and transmits it to a user, and when the sink device (200) includes a display unit, this UI can be provided as a display. In addition, the sink device (200) can supply power requested by the source device (100) to the source device (100).

The user input interface unit (120, 240) can receive a user's action or input, and as an example, the user input interface (120, 240) can correspond to a remote controller, a voice receiving/recognition device, a touch input sensing/receiving device, etc.

The control unit (180, 280) can control the overall operation of each device. In particular, the control unit (180, 280) performs communication between units included in each device and can control the operation of each unit.

The memory unit (140, 260) represents a volatile physical device in which various types of data are temporarily stored.

The storage unit (150) represents a non-volatile physical device capable of storing various types of data.

EDID EEPROM (210) represents an EEPROM that stores EDID information.

The above-described memory unit (140, 260), storage unit (150), and EDID EEPROM (210) all serve to store data, and they may all be collectively referred to as memory units.

The display unit (110, 230) can display received data or content, data stored in the memory unit, UI, etc. under the control of the control unit (180, 280).

The multimedia unit (160, 270) can play various types of multimedia. The multimedia unit (160, 270) may be implemented separately from the control unit (180, 280), or may be implemented as a single physical configuration with the control unit (180, 280).

The power supply unit (170, 250) can supply power required for the operation of the source device (100), the sink device (200), and units included therein.

The transmitter (Tx) is a unit equipped in the source device (100) that transmits and receives data, and performs data transmission and reception including not only audio/video data but also messages such as commands, requests, actions, and responses between devices.

The receiver (Rx) is a unit equipped in the sink device (200) that transmits and receives data, and performs data transmission and reception including not only audio/video data but also messages such as commands, requests, actions, and responses between devices.

The power control unit (130, 220) can manage and control power transmission and reception between devices via a transceiver.

Among the above-described units, units other than the transmitter (Rx), receiver (Tx), and control unit (180, 280) may be optionally included in the source device (100) or the sink device (200) depending on the embodiment, and may not be essential component units.

Previously, power transfer between source devices and sink devices was not supported in AV systems. As a result, when operating portable devices for long periods of time, there was an inconvenience of always having to connect an external power cable for optimal operation. To solve this inconvenience, this specification proposes a method to ensure optimal operation of the AV system without a separate external device by enabling the wired interface in the AV system to support the power transfer function.

For convenience of explanation, in the following, a device that supplies (or transmits) power is referred to as a P-source device, and a device that supplies (or receives) power is referred to as a P-sync device. In addition, a device that simultaneously supports the functions of a P-source device and a P-sync device is referred to as a dual device.

Background on Various Embodiments of the Present Disclosure

Adaptive-Sync operation

Adaptive-Sync is a technology used in the field of computer graphics that eliminates screen flicker and tearing by synchronizing between a source device (e.g. GPU) and a sink device (e.g. monitor). Adaptive-Sync was standardized by VESA (Video Electronics Standards Association) with DisplayPort Adaptive-Sync technology and HDMI VRR (Variable Refresh Rate) technology.

Adaptive-Sync technology includes a communication protocol for communication between a Source device (e.g. GPU) and a Sink device (e.g. monitor) and a time-splitting technology for synchronization between a Source device (e.g. GPU) and a Sink device (e.g. monitor). Therefore, Adaptive-Sync technology includes the following technology fields:

- Source device (e.g. GPU) technology: To support Adaptive-Sync, the source device (e.g. GPU) must support Variable Refresh Rate (VRR) technology. AMD provides FreeSync, and NVIDIA provides G-Sync, each of their own VRR technologies.

- Communication protocol technology: DisplayPort 1.2a or higher and HDMI 2.1 or higher are required as connection interfaces for Sink devices (e.g. monitors) that support Adaptive-Sync. In addition, in order to use Adaptive-Sync, the Source device (e.g. GPU) and Sink device (e.g. monitor) must use the same communication protocol.

- Sink device (e.g. monitor) technology: A Sink device (e.g. monitor) that supports Adaptive-Sync must support the VRR technology of the Source device (e.g. GPU). In addition, a Sink device (e.g. monitor) that supports Adaptive-Sync must support a protocol for communicating with the Source device (e.g. GPU).

- Time-slicing technique: Adaptive-Sync uses time-slicing technique to synchronize between a Sink device (e.g. monitor) and a Source device (e.g. GPU). This requires that the Source device (e.g. GPU) and the Sink device (e.g. monitor) use the same time-slicing technique.

Adaptive-Sync technology encompasses a number of technologies, including graphics cards, communication protocols, sink devices (e.g. monitors), and time-slicing technology, all of which work together to make Adaptive-Sync possible.

Source device operation during live frame transmission

A source device that enables panel replay mode on the sink device in the PANEL REPLAY ENABLE register (DPCD 001B0h[0] = 1) and sets the ALPM enable bit in the RECEIVER_ALPM_CONFIGURATION register (DPCD 00116h[0] = 1) is: Transmits an Adaptive-Sync SDP on the VBlank line that corresponds to one of the following:

(1) Leading edge of VSync pulse -or-

(2) One line before the leading edge of the VSync pulse starting from the first video frame as shown in Figure 2-155.

If the source device does not set both bits (DPCD 001B0h[0] = 0 and/or DPCD 00116h[0] = 0), the source device may transmit on or before the lines specified above during the VBlank period.

Source Device Operation during Live Frame Transmission

A Source device that has set both the Source Device Enables Panel Replay Mode in Sink Device bit in the PANEL REPLAY ENABLE register (DPCD 001B0h[0] = 1) and ALPM Enable bit in the RECEIVER_ALPM_CONFIGURATION register (DPCD 00116h[0] = 1) shall transmit the Adaptive-Sync SDP at the VBlank line that corresponds to either of the following:

(1) The VSync pulse's leading edge, -or-

(2) One line before the VSync pulse's leading edge, starting with the first video frame, as illustrated in Figure 2-155

When a Source device has not set both bits (DPCD 001B0h[0] = 0 and/or DPCD 00116h[0] = 0), the Source device may transmit at the line specified above -or- earlier during the VBlank period.

FIG. 2 is a diagram illustrating an example of Adaptive-Sync SDP transmission timing according to various embodiments of the present disclosure.

The following requirements apply to the source device regarding whether to transmit the Adaptive-Sync SDP one line before or after the leading edge of the VSync pulse:

(1) When DPCD 02214h[1] of the sink device is 0, the source device shall maintain DPCD 0011Bh[7] = 0 and transmit Adaptive-Sync SDP on the line corresponding to the leading edge of the VSync pulse in the first half line or in the first 3,840 pixel period, whichever comes first.

(2) When DPCD 02214h[1] of the Sink device = 1, the Source device can do one of the following:

(3) During video mode setup, set DPCD 0011Bh[7] = 1 and then transmit the entire Adaptive-Sync SDP one line early at any time during the line.

(4) Clear DPCD 0011Bh[7] = 0 during video mode setting and transmit Adaptive-Sync SDP in the first half of the line corresponding to the leading edge of the VSync pulse or in the first 1,920 pixel cycle, whichever comes first.

As for whether to transmit the Adaptive-Sync SDP on the VSync pulse's leading edge or one line earlier, the following mandates apply for the Source device:

(1) When the Sink device's DPCD 02214h[1] = 0, the Source device shall keep DPCD 0011Bh[7] = 0 and transmit the Adaptive-Sync SDP in the first half line -or- the first 3,840 pixel cycles, whichever comes first, on the line that corresponds to the VSync pulse's leading edge

(2) When the Sink device's DPCD 02214h[1] = 1, the Source device may perform either of the following:

(3) Set DPCD 0011Bh[7] = 1 during video mode set, and then transmit the entire Adaptive-Sync SDP one line earlier, at any time during the line, -or-

(4) Clear DPCD 0011Bh[7] = 0 during video mode set, and then transmit the Adaptive-Sync SDP in the first half line -or- the first 1,920 pixel cycles, whichever comes first, on the line that corresponds to the VSync pulse's leading edge

Adaptive-Sync operation AUX Flow chart

FIG. 3 is a diagram illustrating an example of an AUX flow diagram related to Adaptive-Sync operation according to various embodiments of the present disclosure.

Referring to FIG. 3, the Source device receives a hot plug detection (HPD) signal from the Sink device.

The Source device reads the EDID/DisplayID of the Sink device (EDID/DisplayID Read). That is, the Source device receives the EDID/DisplayID of the Sink device from the Sink device.

The Source device reads the DPCD (DisplayPort Configuration Data) of the Sink device. DPCD corresponds to 00000h to 000FFh and 02200h to 022FFh. The Source device can determine whether the Sink device supports Adaptive-Sync through DPCD.

The Source device writes 00107h = 1 to DPCD and transmits DPCD to the Sink device. By writing 00107 = 1 to DPCD, the Source device enables the Adaptive-Sync feature. The Sink device ignores the MSA Timing parameter value.

Assuming Adaptive-Sync is enabled, the Source device transmits video stream data and Adaptive-Sync SDP to the Sink device. Synchronize the Adaptive Sync SDP and Vsync Pulse.

DPCD related to Adaptive-Sync operation

DPCD (DisplayPort Configuration Data Channel) is a part of the DisplayPort connection interface, and is a data channel for communication between a Sink device (e.g. a monitor) and a Source device (e.g. a GPU). DP DPCD is used by a Source device (e.g. a GPU) to recognize a Sink device (e.g. a monitor), configure the functions of the Sink device (e.g. a monitor), and share the DP connection status with the Sink device (e.g. a monitor). The configurations related to Adaptive-Sync DPCD operation are as follows.

(1) Source device adaptive synchronization operation requirements

This section defines the source device specifications for the following Adaptive-Sync policies:

(1-1) Before and during setting the video mode

(1-2) Transmitting live frames

Before working on setting the video mode, the source device must check the following:

(1-3) The Stream Sink of the connected Sink device meets the following VESA AdaptiveSync requirements:

(1-3-1) DisplayID Adaptive-Sync data block support

(1-3-2) Supports detailed timing with CVT v2.0 RB v3 timing or 350ppm offset exposed in DisplayID.

(1-4) The DPRX of the connected sink device complies with the VESA AdaptiveSync specification.

(1-4-1) DPCD 00007h[6] = 1 and DPCD 02207h[6] = 1

(1-4-2) DPCD 02214h[0] = 1

(1) Source Device Adaptive-Sync Operation Mandates

This section defines Source device mandates for the following Adaptive-Sync policies:

(1-1) Before and during video mode set

(1-2) During live frame transmission

Before video mode set operation, a Source device shall verify the following:

(1-3) Stream Sink in the connected Sink device meets the following VESA AdaptiveSync mandates:

(1-3-1) Supports the DisplayID Adaptive-Sync data block

(1-3-2) Supports the CVT v2.0 RB v3 timing -or- detailed timing with 350-ppm offset exposed in the DisplayID

(1-4) DPRX in the connected Sink device meets the VESA AdaptiveSync mandates:

(1-4-1) DPCD 00007h[6] = 1 and DPCD 02207h[6] = 1

(1-4-2) DPCD 02214h[0] = 1

(2) Requirements for adaptive synchronization operation of sink devices

This section defines the sink device rules for the following Adaptive-Sync policies:

(2-1) Before and during setting the video mode

(2-2) Transmitting live frames

VESA AdaptiveSync sink devices must meet the following:

(2-3) DisplayID Adaptive-Sync data block support

(2-4) CVT v2.0 RB v3 timing support or detailed timing support with 350ppm offset exposed in DisplayID

(2-5) Adaptive-Sync SDP v2 support (HB2[4:0] = 02h)

(2-6) Set the following Adaptive-Sync DPCD function register bits to their default values.

(2-6-1) DPCD 00007h[6] = 1 and DPCD 02207h[6] = 1

(2-6-2) DPCD 02214h[0] = 1

(2-7) Set DPCD 02214h[1] = 1 as required

(2-8) Arm for Adaptive-Sync operation when the source device writes DPCD 00107h[7] = 1 while video mode is set.

(2-9) Since the sink device may be connected to a legacy source device that sets DPCD 00107h[7] = 1 and will start receiving the video stream after the video mode is set, it must check for an Adaptive-Sync SDP, but it does not transmit an Adaptive-Sync SDP. As long as all of the following conditions are met, the VESA AdaptiveSync Sink device must parse the Adaptive-Sync SDP payload data bytes and present the image within the latency constraints while meeting the Adaptive-Sync display CTS visual performance requirements (e.g., flicker performance greater than -50 dB, panel overdrive compensation, and responsive gray-to-gray transitions that do not cause ghosting):

(2-10) The source device follows the frame period increase and decrease limits of the sink device listed in the Adaptive-Sync data block (bytes 1 and 5, respectively).

(2-11) The Adaptive-Sync SDP payload content is true. VESA AdaptiveSync sink devices must also meet the minimum visual performance requirements (e.g., -45 dB flicker performance) as long as the source device adheres to the min-max refresh range. This is true even if the Adaptive-Sync SDP payload content is false for one frame during the Adaptive-Sync operating mode transition.

(2) Sink Device Adaptive-Sync Operation Mandates

This section defines Sink device mandates for the following Adaptive-Sync policies:

(2-1) Before and during video mode set

(2-2) During live frame transmission

A VESA AdaptiveSync Sink device shall:

(2-3) Support the DisplayID Adaptive-Sync data block

(2-4) Support the CVT v2.0 RB v3 timing -or- detailed timing with 350-ppm offset exposed in the DisplayID

(2-5) Support Adaptive-Sync SDP v2 (HB2[4:0] = 02h)

(2-6) Set the following Adaptive-Sync DPCD capability register bits as default:

(2-6-1) DPCD 00007h[6] = 1 and DPCD 02207h[6] = 1

(2-6-2) DPCD 02214h[0] = 1

(2-7) Set DPCD 02214h[1] = 1, as needed

(2-8) Arm for Adaptive-Sync operation when a Source device writes DPCD 00107h[7] = 1 during video mode set

(2-9) Sink device shall check for the presence of an Adaptive-Sync SDP as the Sink device starts receiving a video stream after video mode set operation because the Sink device may be connected to a legacy Source device that sets DPCD 00107h[7 ] = 1 but does not transmit an Adaptive-Sync SDP A VESA AdaptiveSync Sink device shall parse Adaptive-Sync SDP payload data bytes and display an image within a latency limit while meeting Adaptive-Sync Display CTS visual performance mandates (e.g., flicker performance of -50 dB or better, a responsive gray-to-gray transition without causing panel overdrive compensation ghosting), as long as both of the following conditions are met:

(2-10) Source device honors the Sink device's Frame Duration Increase and Decrease Limits that are enumerated in the Adaptive-Sync data block (Bytes 1 and 5, respectively)

(2-11) Adaptive-Sync SDP payload content is true

The VESA AdaptiveSync Sink device shall also meet the minimum visual performance mandates (e.g., a flicker performance of -45 dB) as long as the Source device honors the minimum-to-maximum refresh range even when the Adaptive-Sync SDP payload content is false for one frame during an Adaptive-Sync operation mode transition.

(3) DPCD register used for Adaptive-Sync

(3) DPCD Registers used for Adaptive-Sync

Table 1 below shows Table 2-220: DPCD Registers Used for Adaptive-Sync.

Type	DPCD Register Address	Name
Capability	0007h[6]	DOWN_STREAM_PORT_COUNT register, MSA_TIMING_PAR_IGNORED bit
Extended Capability	02207h [6]	DOWN_STREAM_PORT_COUNT register, MSA_TIMING_PAR_IGNORED bit
	02215h [2,1,0]	DPRX_FREATURE_ENUMERATION_LIST_CONT_1 register, FAVT_PAYLOAD_FIELDS_PARSING_SUPPORTED, AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED, and ADAPTIVE_SYNC_SDP_SUPPORTED bits, respectively
	02218h[6]	DPRX_FEATURE_ENUMERATION_LIST_CONT_2 register, ADAPTIVE SYNC SDP T2 SUPPORTED IN ALL PR ACTIVE STATES bit
Configuration	00107h [7,6]	DOWNSPREAD_CTRL register, MSA_TIMING_PAR_IGNORE_EN and FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE bits
	0011Ah [7:6]	PANEL REPLAY CONFIGURATION 3 register, AS_SDP_SETUP_CONFIG_PR_ACTIVE field
	0011Bh[7]	ADAPTIVE_SYNC_SDP_TRANSMISSION_TIMING_CONFIG register, AS_SDP_ONE_LINE_EARLIER_ENABLE bit

EDID related to Adaptive-Sync operation - Adaptive-Sync Data Block in DisplayID

FIG. 4 is a diagram illustrating an example of a structure of an EDID in which an EDID block, a CTA block, and a DisplayID block are mixed according to various embodiments of the present disclosure.

EDID (Extended Display Identification Data) is a data structure used by a source device (e.g. GPU) to read information embedded in a sink device (e.g. monitor). When a sink device (e.g. monitor) provides EDID information, the source device (e.g. GPU) can automatically recognize and set the optimal resolution, refresh rate, and other basic settings of the sink device (e.g. monitor).

EDID contains information about how the Sink device (e.g. monitor) was manufactured, including the manufacturer, model name, manufacturing date, resolution, and supported refresh rate. The Source device (e.g. GPU) that reads this information can automatically set the optimal resolution and refresh rate of the Sink device (e.g. monitor), or the user can set them manually.

The structure of EDID can be a mixture of EDID block, CTA block, and DisplayID block, and can be configured as an example as in Fig. 4. In addition, since the Adaptive-Sync operation parameters are different for each block, Sink also displays two or more Adaptive-Sync operation parameters for compatibility with Legacy Source.

EDID is transmitted via the Data Display Channel (DDC). The DDC uses an I²C interface to enable communication between a source device (e.g. a GPU) and a sink device (e.g. a monitor). The source device (e.g. a GPU) requests EDID information from a sink device (e.g. a monitor) via the DDC, and the sink device (e.g. a monitor) responds.

Currently, in DP2.1, parameters related to Adaptive-Sync operation refer to the information about the Adaptive-Sync Data Block of DisplayID2.0/2.1 in EDID.

Adaptive-Sync operation parameters for each Block can be expressed in a total of three types of Blocks as described below.

Adaptive-Sync Data Block in DisplayID 2.0

FIG. 4 is a diagram illustrating an example of the structure of an Adaptive-Sync Data Block in DisplayID 2.0 according to various embodiments of the present disclosure.

Table 2 below shows Table 4.51: Adaptive-Sync Data Block.

In Table 2, N represents the number of Detailed Timing Descriptors in the data block. M represents the value of Offset 01h[6:4]. Source device implementation shall accommodate varying fields for future extensibility.

Offset	Bit #	Definition/Priority
00h	7:0	Adaptive-Sync Data Block2Bh
01h	Block Revision and Other Data
	2:0	Block Revision Revision ranges from 0 through 7 000b=Revision 0 All other values are RESERVED
	3	RESERVEDCleared to 0
	6:4	Number of Payload Bytes (M) in an Adaptive-Sync Operation ModeAnd Range Descriptor Where M (bytes) = 6 (initial descriptor size) + field value 000b = 6 + 0 bytes/descriptor (defined as part of Adaptive0Sync, Revision 0) All other values are RESERVED
	7	RESERVEDCleared to 0
02h	7:0	Number of Payload Bytes in Block Number of payload bytes within the block is based on the number of descriptors (N) * size of each descriptor (M) bytes All other values are RESERVED
03h through03h+M-1	(M*8-1):0	First Adaptive-Sync Operation Mode and Range Descriptor M-byte descriptor
03h+M through 03h + 2M - 1	(M*8-1):0	Second Adaptive-Sync Operation Mode and Range DescriptorM-byte descriptor, if present
...		...
03h +(N-1) * M through 03h+ (N*M) - 1	(M*8-1):0	Nth Adaptive-Sync Operation Mode and Range Descriptor M-byte descriptor, if present

Table 3 below shows Table 4.52: Adaptive-Sync Operation Mode and Range Descriptor.

Byte #	Bit #	Definition
0	Adaptive-Sync Operation and Range Information
	0	Adaptive-Sync Range 0 = Non-native panel range. (The display implements buffering to support the declared Adaptive-Sync range, and may repeat frames as necessary.) 1 = Native panel range. (The display does not implement buffering to support the declared Adaptive-Sync range, and does not repeat frames.)
	1	Successive Frame Duration Increase Tolerance for Meeting VESA Adaptive Sync Flicker Performance0 = Flicker performance is met in any duration increase within the refresh rate range, but may cause up to a single base video frame period jitter impact. 1 = Flicker performance is met in any duration increase within Byte 1. Note: Flicker performance is met in any duration increase within the refresh rate range without jitter impact when either of the following conditions are met: (1) Byte 1 = 00h, -or- (2) Byte 1 >= the delta between the maximum frame duration (= minimum refresh rate) and the minimum frame duration (= maximum refresh rate)
	3:2	Supported Adaptive-Sync Modes00b = Fixed-Average VTotal (FAVT) mode is supported 01b = Both Fixed-Average VTotal and Adaptive VTotal modes (FAVT and AVT, respectively) are supported All other values are RESERVED
	4	Seamless Transition of Adaptive-Sync Mode and Range Not Supportd0 = Seamless transition to and from current Adaptive-Sync mode and range is supported 1 = Seamless transition to and from current Adaptive-Sync mode and range is not supported
	5	Successive Frame Duration Decrease Tolerance for Meeting VESA Adaptive Sync Flicker Performance0 = Flicker performance is met in any duration decrease within the refresh rate range, but may cause up to a single base video frame period jitter impact 1 = Flicker performance is met in any duration decrease within Byte 5 Note: Flicker performance is met in any duration decrease within the refresh rate range without jitter impact when either of the following conditions are met: (1) Byte 5 = 00h, -or- (2) Byte 5 >= the delta between the maximum frame duration (= minimum refresh rate) and the minimum frame duration (= maximum refresh rate)
	7:6	RESERVEDCleared to all 0s
1	7:0	Maximum Single Frame Duration Increase Allowed for Meeting VESA Adaptive Sync Flicker Performance 6.2 format (six integer bits and two fractional bits) that results in a value range of 0.00 to 63.75 ms, inclusive 00h = Flicker performance is met in any duration increase within the refresh rate range without jitter impact
2	7:0	Minimum Refresh RateMinimum refresh rate ranges from 0 through 255 Hz, divided by 1.001 00h = 0 Hz 01h = (1/1.001) Hz ... FFh = (255/1.001) Hz
4:3	Maximum Refresh Rate Maximum refresh rate ranges from 1 through 1,024 Hz, plus 350 ppm. Note that the value stored in this field shall match that of at least one CVT v2.0 RB Timing v3 timing supported by the Sink device 000h = (1*1.00035) Hz ... 3FFh = (1,024 * 1.00035) Hz
3	7:0	Maximum Refresh Rate 7:0
4	1:0	Maximum Refresh Rate 9:8
	7:2	RESERVED Cleared to all 0s
5	7:0	Maximum Single Frame Duration Decrease Allowed for Meeting VESA Adaptive Sync Flicker Performance 6.2 format (six integer bits and two fractional bits) that results in a value range of 0.00 to 63.75 ms, inclusive 00h = Flicker performance is met in any decrease duration within the refresh rate range without jitter impact

Adaptive-Sync SDP

Adaptive-Sync Second data packet is used for communication between a Source device (e.g. GPU) and a Sink device (e.g. monitor). The Source device (e.g. GPU) sends an Adaptive-Sync Second data packet to the Sink device (e.g. monitor), and the Sink device (e.g. monitor) receives it and informs the Source device (e.g. GPU) of the supported refresh rate range and VRR mode. Based on this information, the Source device (e.g. GPU) synchronizes with the Sink device (e.g. monitor) to prevent screen tearing, stutter, etc. and enable smoother screen display. Depending on the Adaptive-Sync operation parameters for each EDID Block, the information and size of Adaptive-Sync SDP may vary.

The Adaptive-Sync SDP operation and the information on Header and Payload Data Bytes are as follows.

An Adaptive-Sync capable DP protocol converter indicates Adaptive-Sync SDP support by setting the ADAPTIVE_SYNC_SDP_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST_CONT_1 register (DPCD 02214h[0] = 1) in addition to setting the MSA_TIMING_PAR_IGNORED bit in the DOWN_STREAM_PORT_COUNT register (DPCD 02214h[0] = 1 and DPCD 02207h[6] = 1). An Adaptive-Sync capable DP protocol converter shall support SDP splitting in SST and MST modes and indicate the splitting capability by setting the SST_SPLIT_SDP_CAP bit in the DPRX_FEATURE_ENUMERATION_LIST register (DPCD 02210h[1] = 1). An Adaptive-Sync-capable DP source device can enable Adaptive-Sync video transmission to a connected DP protocol converter only after verifying the following:

(1) The connected DP protocol converter has DPCD 00007h[6] = 1 and DPCD 02214h[0] = 1.

(2) A stream sink connected to a DP protocol converter indicates support for an Adaptive-Sync refresh rate range in its DisplayID or legacy EDID. As always for Adaptive-Sync video transmission, an Adaptive-Sync capable DP source device must use an AUX write transaction to write 1 to the MSA_TIMING_PAR_IGNORE_EN bit in the DOWNSPREAD_CTRL register (DPCD 00107h[7] = 1) before enabling Adaptive-Sync video transmission. If the connected DP device has DPCD 02214h[0] = 1, the DP source device must transmit an Adaptive-Sync SDP before enabling Adaptive-Sync video transmission.

When transmitting Adaptive-Sync SDP, the DP source device must:

(3) Transmit Adaptive-Sync SDP in every video frame. For multi-field video modes such as interlaced and 3D, Adaptive-Sync SDP must be transmitted in every video field.

(4) Verify that the start and end of an Adaptive-Sync SDP transmission occur within the first half of the line corresponding to the start of a VSync pulse (indicated by the BS symbol sequence).

(5) Send valid HTotal[15:0], HStart[15:0], HSyncPolarity[0](HSP), HSyncWidth[14:0].

(HSW), VStart[15:0], VSyncPolarity[0](VSP), and VSyncWidth[14:0](VSW) are valid HWidth[15:0] and VHeight[15:0] while transmitting Adaptive-Sync SDP. That is, an Adaptive-Sync capable DP protocol converter MUST ignore only VTotal[15:0] while receiving Adaptive-Sync SDP.

An Adaptive-Sync-capable DP protocol converter shall indicate Adaptive-Sync SDP support by setting the ADAPTIVE_SYNC_SDP_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST_CONT_1 register (DPCD 02214h[0] = 1) in addition to setting the MSA_TIMING_PAR_IGNORED bit in the DOWN_STREAM_PORT_COUNT register(s) DPCD 00007h[6] = 1 and DPCD 02207h[6] = 1). An Adaptive-Sync-capable DP protocol converter shall support SDP splitting in SST and MST modes, and indicates its splitting capability by setting the SST_SPLIT_SDP_CAP bit in the DPRX_FEATURE_ENUMERATION_LIST register (DPCD 02210h[1] = 1). An Adaptive-Sync-capable DP Source device may enable an Adaptive-Sync video transmission to a plugged DP protocol converter only after verifying the following:

(1) Plugged DP protocol converter has DPCD 00007h[6] = 1 and DPCD 02214h[0] = 1

(2) Stream sink plugged to the DP protocol converter indicates support for the Adaptive-Sync refresh rate range in the DisplayID or legacy EDID As is always the case with Adaptive-Sync video transmission, an Adaptive-Sync-capable DP Source device shall use an AUX write transaction to write 1 to the MSA_TIMING_PAR_IGNORE_EN bit in the DOWNSPREAD_CTRL register (DPCD 00107h[7] = 1) prior to enabling an Adaptive-Sync video transmission. When the plugged DP device has DPCD 02214h[0] = 1, a DP Source device shall transmit an Adaptive-Sync SDP before enabling an Adaptive-Sync video transmission.

When transmitting an Adaptive-Sync SDP, a DP Source device shall do the following:

(3) Transmit an Adaptive-Sync SDP on every video frame. For multi-field video modes such as Interlaced and 3D, the Adaptive-Sync SDP shall be transmitted on every video field.

(4) Ensure that the start and end of the Adaptive-Sync SDP transmission occurs within the 1st half of the line (marked by BS symbol sequences) that corresponds to the start of the VSync pulse.

(5) Transmit valid HTotal[15:0], HStart[15:0], HSyncPolarity[0] (HSP), HSyncWidth[14:0]

(HSW), VStart[15:0], VSyncPolarity[0] (VSP), and VSyncWidth[14:0] (VSW) while transmitting an Adaptive-Sync SDP, as well as valid HWidth[15:0] and VHeight[ 15:0]. That is, an Adaptive-Sync-capable DP protocol converter shall ignore only VTotal[15:0] while receiving an Adaptive-Sync SDP.

Table 4 shows Table 2-126: Adaptive-Sync SDP Header Bytes.

Byte #	Bit #	Content
HB0	7:0	Secondary-data Packet IDSpecific to stream (usually 00h)
HB1	7:0	Secondary-data Packet Type22h = Adaptive-Sync
HB2	4:0	Version Number 01h = Version 1. No payload data bytes (same as DP v2.0, as released in June 2019). 02h = Version 2. VESA AdaptiveSync shall support both the DisplayID Adaptive-Sync data block and Adaptive-Sync SDP data structure version 2. All other values are RESERVED for future versions.
	7:5	RESERVED Read all 0s
HB3	5:0	Number of Valid Data Bytes Version 1 00h = No payload data bytes. Version 2 09h = Nine payload data bytes. The Adaptive-Sync SDP has 32 payload data bytes. Unused data bytes shall be zero-padded.
	7:6	RESERVED Read all 0s.

Table 5 shows Table 2-127: Adaptive-Sync SDP Version 2 Payload Data Bytes.

Byte #	Bit #	Content
DB0	Timing Options
	0 1	VARIABLE_FRAME_RATE_DISABLE Adaptive Sync Operation Mode When a Source device sets the MSA_TIMING_PAR_IGNORE_EN and FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE bits in the DOWNSPREAD_CTRL register (DPCD 00107h [7,6] = 11b, respectively): 00b = AVT mode, and video frame duration is bound to change from frame-to-frame. 01b = AVT mode; however, video frame duration is currently fixed. 10b = FAVT mode, and TRR is yet to be reached. 11b = FAVT mode, and TRR is reached. When a Source device programs DPCD 00107h[7,6] = 01b (see Section 2.18 for details): 01b = Adaptive-Sync operation is disabled and the VTotal line count is fixed. 00b, 10b, and 11b = RESERVED.
	2	Adaptive Sync SDP Transmission Disable in PR Active StateCleared to 0 when the Sink device does not support PR. 0 = Source-to-Sink device timing sync using the Adaptive-Sync SDP is enabled. 1 = Source-to-Sink device timing sync using the Adaptive-Sync SDP is disabled.
	3	Remote Frame Buffer (RFB) Update in PR Active StateValid only during a PR Active state. Shall be driven to 0 in PR_State 0_0 (Disabled) -or- PR_State 0_1 (Inactive). Cleared to 0 when the Sink device does not support PR. 0 = No RFB update in the current active video image time interval. 1 = Update the RFB - Capture the incoming video frame/Sus to the RFB.
	7:4	RESERVEDRead all 0s.
DB1	7:0	Minimum Vertical Total7:0 Minimum Vertical Total15:8 Source device shall program DB2:DB1 to the VTotal value that corresponds to the enabled base timing. The value is statically programmed and is valid in both FAVT mode and AVT mode.
DB2	7:0
DB3	7:0	Target Refresh Rate7:0 Target Refresh Rate9:8 AVT mode Source device shall clear DB4[1:0] = 00b and DB3 = 00h. FAVT mode Source device shall program DB4[1:0] and DB3 and DV4[5] to match the average video frame rate.
DB4	1:0
	4:2	RESERVED Read all 0s.
	5	Target Refresh Rate DividerValid only in FAVT mode. Sink device ignores the bit in AVT mode. 0 = 1.000. 1 = 1.001.
	6	Successive Frame Duration Increase ConfigurationIf the Source device engages in a bounded transition for low-flicker performance by using information in the DisplayID Adaptive-Sync data block and setting this bit to 1, the Source device shall: (1) Use the CVT v2.0 RB Timing v3 -or- detailed timing descriptor with 350-ppm offset exposed in the DisplayID, and (2) Constrain the duration increase to the value reported in the DisplayID Adaptive-Sync data block for a guarantee of low-flicker performance 0 = Video frame duration increase transitions are unbounded. 1 = Video frame duration increase transitions are bounded by the time specified in DB5.
	7	Successive Frame Duration Decrease ConfigurationIf the Source device engages in a bounded transition for low-flicker performance by using the information in the DisplayID Adaptive-Sync data block and setting this bit to 1, the Source device shall: (1) Use the CVT v2.0 RB Timing v3 -or- detailed timing descriptor with 350-ppm offset exposed in the DisplayID, and (2) Constrain the decrease duration to the value reported in the DisplayID Adaptive-Sync data block for a guarantee of low-flicker performance 0 = Video frame duration decreases transitions are unbounded. 1 = Video frame duration decrease transitions are bounded by the time specified in DB6.
DB5	7:0	Duration Increase Constraint Value in ms Unit 6.2 format (six integer bits and two fractional bits) that results in a value range of 0.00 to 63.75 ms, inclusive. When the Source device clears DB4[6] = 0, the Source device shall clear DB5 = 00h. When the Source device sets DV4[6] = 1, the Source device shall program DB5 to the value that the Source device is using for the maximum duration increase. The value does not indicate the instantaneous video frame-to-frame duration delta. A 0.00 value indicates that the Source device may invoke a maximum-to-minimum refresh rate transition across a single video frame boundary. To attain optimum flicker performance without jitter impact, the Source device shall keep the DB5 value less than or equal to the limit value reported by the Sink device in the Max Single Frame Duration Increase Allowed for Attaining the Low Flicker Performance byte (Byte 1) of the DisplayID Adaptive-Sync data block's Operation Mode and Range descriptor.
DB6	7:0	Duration Decrease Constraint Value in ms Unit6.2 format (six integer bits and two fractional bits) that results in a value range of 0.00 to 63.75 ms, inclusive. When the Source device clears DB4[7] = 0, the Source device shall clear DB6 = 00h. When the Source device sets DB4[7] = 1, the Source device shall program DB6 to the value that the Source device is using for the maximum duration decrease. The value does not indicate the instantaneous video frame-to-frame duration delta. A 0.00 value indicates that the Source device may invoke a maximum-to-minimum refresh rate transition across a single video frame boundary. To attain optimum flicker performance without jitter impact, the Source device shall keep the DB6 value less than or equal to the limit value reported by the Sink device in the Max Single Frame Duration Decrease Allowed for Attaining the Low Flicker Performance byte (Byte 5) of the DisplayID Adaptive-Sync data block's Operation Mode and Range descriptor.
DB7	7:0	Coasting VTotal7:0 in PR Active StateShall be programmed to the Coasting Vtotal LSB value that the Sink device shall use to maintain the refresh rate when the DPTX has suspended transmission of the Adaptive-Sync SDP in a PR Active state. DB7 = 00h when the Sink device does not support PR.
DB8	7:0	Coasting VTotall15:8 in PR Active StateShall be programmed to the Coasting VTotal MSB value that the Sink device shall use to maintain the refresh rate when the DPTX has suspended transmission of the Adpative-Sync SDP in a PR Active state. DB8 = 00h when the Sink device does not support PR.
DB9through DB31	191:0	RESERVED Read all 0s.

OverDrive/Overdrive Table

OverDrive

OverDrive is a technology used in Sink devices (e.g. monitors) that minimizes motion blur by increasing the switching speed of pixels and reduces screen flicker by increasing the response speed. OverDrive in Sink devices (e.g. monitors) is usually controlled by a built-in controller, and the user can adjust it in the settings menu of the Sink device (e.g. monitor).

OverDrive is often used in Sink devices (e.g. monitors). Sink devices (e.g. monitors) have a fixed response time, so when high-speed moving objects appear on the screen, motion blur can occur. To solve this problem, OverDrive minimizes motion blur by increasing the rate at which pixels are switched, and reduces screen flicker by increasing the response time. However, if OverDrive is set too high, high-speed moving objects can appear to shake when passing on the screen, and an appropriate OverDrive setting is necessary to solve this problem.

Overdrive Table

The Overdrive Table is one of the functions provided by the manufacturer of the sink device (e.g. monitor), and is a table for reference when adjusting the Overdrive function of the sink device (e.g. monitor). The Overdrive Table can usually be downloaded from the manufacturer's website, and through this, the user can appropriately adjust the Overdrive function of the sink device (e.g. monitor) to achieve optimal screen performance.

The Overdrive Table is provided with the model name of the Sink device (e.g. monitor), and various Overdrive options are provided for each model. Users can change the Overdrive settings of the Sink device (e.g. monitor) by referring to the Overdrive Table, and through this, problems such as screen shaking and motion blur can be minimized and optimal screen performance can be achieved.

However, there is a point to be careful about when using the Overdrive Table. Since the Overdrive Table of all Sink devices (e.g. monitors) does not operate in the same way, users must refer to the Overdrive Table for each model and select the appropriate setting.

Problems with prior art

Since the DisplayPort standard has limitations on the transmission speed depending on the supported resolution and whether or not DSC (Display Stream Compression) is used, Adaptive-Sync Frame Range also operates differently. (See Example 1 below.) Therefore, Multi Frame Adaptive-Sync Range must be indicated in EDID, and in this case, appropriate rules are required for proper operation. However, appropriate rules for Multi Frame Adaptive-Sync to operate have not been defined up to now.

This is because when the Adaptive-Sync Frame Range is set from 60Hz to 240Hz, as in Example 2 below, in Adaptive-Sync mode, it does not operate at the Max Frame Range of 240Hz, but at 120Hz, as in Example 2. Therefore, if OverDrive is tuned to 240Hz, excessive Over/Undershoot may occur when operating at the untuned 120Hz. In a Sink (e.g. monitor) with Adaptive-Sync technology applied, when OverDrive tuning according to the Frame Range is performed, it is tuned based on the Max Frame Range and tuning is not performed at frequencies lower than that (tuning only at Max), so excessive Over/Undershoot occurs and this becomes a problem.

Therefore, in order for Multi Frame Adaptive-Sync to work properly, a standardized convention between Source and Sink is needed that only refers to the Max value of the Frame Range. If this standardization is achieved, devices that support Adaptive-Sync can automatically set up Multi Frame Adaptive-Sync and achieve optimal performance.

(Example 1)

(Example 1-1) e.g. Max Frame rate support according to resolution when UHBR20 is supported in DisplayPort 2.1

= 10K (10240x4320) @ 60Hz and 24 bpp 4:4:4 (no compression) → 11000x4500x60x1.03x24 = 73.418Gbps

= 8K (7680x4320) @ 80Hz and 24 bpp 4:4:4 (no compression) → 8800x4500x80x1.03x24 = 78,312Gbps

= 5K (5120x2160) @ 260Hz and 24 bpp 4:4:4 (no compression) → 5500x2250x260x1.03x24 = 79.536Gbps

(Example 1-2) e.g. Max Frame rate support according to DSC usage when UHBR20 is supported in DisplayPort 2.1

= [10K (10240x4320) @ 60Hz (no compression) / 10K (10240x4320) @ 180Hz (DSC 1.2a)] and 24 bpp 4:4:4

= [8K (7680x4320) @ 80Hz (no compression) / 8K (7680x4320) @ 240Hz (DSC 1.2a)] and 24 bpp 4:4:4

= [5K (5120x2880) @ 260Hz (no compression) / 5K (5120x2880) @ 780Hz (DSC 1.2a)] and 24 bpp 4:4:4

If the Frame Ranges currently supported by the Sink are indicated in EDID, the Source device will only operate within that range, as in Example 2 below.

(Example 2)

[Video Timing]

- Video Timing 1: 4k@240hz

- Video Timing 2: 4k@120hz

- Video Timing 3: 4k@100hz

[frame range]

- Adaptive sync frame range1: 40hz - 120hz

- Adaptive sync frame range 2: 60hz - 240hz

- Adaptive sync frame range 3: 24hz - 100hz

[Use Case]

When the user uses T0, there is only one choice for the source. The user gets Adaptive-Sync operation from 60hz - 240hz.

If the user uses T1, 120hz is suitable for both D1 and D2, so there are two choices for the source. The highest refresh rate is always 120hz for T1, but the lowest refresh rate changes depending on the descriptor source selected.

- If the source uses D1, the user gets Adaptive-Sync operation from 40hz - 120hz.

- If the source uses D2, the user gets Adaptive-Sync operation from 60hz - 120hz.

If the user uses T2, 100hz is suitable for all 3 range descriptors, so there are 3 choices for the source. The highest refresh rate is always 100hz for T2, but the lowest refresh rate changes depending on the descriptor source selected.

- If the source uses D1, the user gets Adaptive-Sync operation from 40hz - 100hz.

- If the source uses D2, the user gets Adaptive-Sync operation from 60hz - 100hz.

- If the source uses D3, the user gets Adaptive-Sync operation from 24hz - 100hz.

If the user is using a T3, the source will be 50hz away from the D2, so there are two choices. The highest refresh rate will always be 50hz for the T3, but the lowest refresh rate will vary depending on the descriptor source chosen.

- If the source uses D1, the user gets Adaptive-Sync operation at 40hz - 50hz.

- If the source uses D3, the user gets Adaptive-Sync operation from 24hz - 50hz.

[Video Timing]

- Video Timing1: 4k@240hz

- Video Timing2 : 4k@120hz

- Video Timing3 : 4k@100hz

[Frame Range]

- Adaptive-Sync Frame Range1: 40hz - 120hz

- Adaptive-Sync Frame Range2: 60hz - 240hz

- Adaptive-Sync Frame Range3: 24hz - 100hz

[Use Case]

When user uses T0, source only has 1 choice. user gets Adaptive-Sync operation from 60hz - 240hz.

When user uses T1, source has 2 choices as 120hz fits into both D1 & D2. The highest refresh rate is always T1's 120hz, but lowest refresh rate is changing base on the descriptor source choose.

- When source use D1, user gets Adaptive-Sync operation from 40hz - 120hz.

- When source uses D2, user gets Adaptive-Sync operation from 60hz - 120hz

When user uses T2, source has 3 choices as 100hz fits all 3 range descriptors. The highest refresh rate is always T2's 100hz, but lowest refresh rate is changing base on the descriptor source choose.

- When source use D1, user gets Adaptive-Sync operation from 40hz - 100hz.

- When source uses D2, user gets Adaptive-Sync operation from 60hz - 100hz

- When source uses D3, user gets Adaptive-Sync operation from 24hz - 100hz

When user uses T3, source has 2 choices as 50hz is out of D2. The highest refresh rate is always T3's 50hz, but lowest refresh rate is changing base on the descriptor source choose.

- When source use D1, user gets Adaptive-Sync operation from 40hz - 50hz.

- When source uses D3, user gets Adaptive-Sync operation from 24hz - 50hz

Composition and operation of the invention

The purpose of various embodiments of the present disclosure is to provide a method and device for indicating Sink EDID Multi Frame Range and a method and device for setting Adaptive-Sync Frame Range of Source to ensure compatibility between devices supporting Multi Adaptive-Sync (multiple Frame ranges). The purpose of various embodiments of the present disclosure is to provide a method and device for optimizing the picture quality and performance of Sink (e.g. monitor) and supporting a user to enjoy a comfortable game and video playback experience by establishing requirements for proper operation of Adaptive-Sync operation.

Behavior of the source device

When using the Adaptive-Sync feature, it operates using the frame rate of the selected Video Timing and the frame range that matches the maximum frame among the frame ranges defined in the Adaptive-Sync data block.

(Example 3)

[Video Timing]

- Video Timing1: 4k@240hz

- Video Timing2 : 4k@120hz

- Video Timing3 : 4k@100hz

[Frame Range]

- Adaptive-Sync Frame Range1: 40hz - 120hz

- Adaptive-Sync Frame Range2: 60hz - 240hz

- Adaptive-Sync Frame Range3: 24hz - 100hz

[Use Case]

1. When Video Timing is selected as 4k@240hz in OS, it operates at 60hz - 240hz using Adaptive-Sync Frame Range2.

2. When Video Timing is selected as 4k@120hz in OS, it operates at 40hz - 120hz using Adaptive-Sync Frame Range1.

3. When Video Timing is selected as 4k@100hz in OS, it operates at 24hz - 100hz using Adaptive-Sync Frame Range3.

Operation of the sink device

If the Sink device uses Multi Frame Rate, the maximum value of the Frame Rate and Adaptive-Sync frame range of the Video timing must be entered in EDID. In addition, Overdrive tuning must be performed for each Frame Range. In this case, by tuning the optimal Overdrive value for each Frame Range, excessive Over/Undershoot can be prevented and the screen quality can be improved.

Figure 5 is a diagram illustrating an example of a process for determining a Frame Range when a Source device performs an Adaptive-Sync operation.

Figure 5 is an example embodiment where only a single Adaptive-Sync Data Block Range is supported.

Referring to Figure 5, the Source device receives HPD (hot plug detection) from the Sink device.

The Source device identifies itself by receiving the EDID (extended display identification data)/DPID (DisplayID) from the Sink device. That is, the Source device reads the EDID (extended display identification data)/DPID (DisplayID) of the Sink device.

The Source device identifies the adaptive-sync range supported by the Sink device from the received EDID/DPID. That is, the Source device reads the adaptive-sync range from the EDID/DPID.

The Source device operates with an adaptive sync range. That is, the Source device processes the audio/video signals and transmits them to the Sink device based on the adaptive sync range.

FIG. 6 is a diagram illustrating an example of a process for determining a Frame Range when a Source device performs an Adaptive-Sync operation according to various embodiments of the present disclosure.

Figure 6 is an example of a case where multiple Adaptive-Sync Data Block Ranges are supported.

Referring to FIG. 6, the Source device receives and identifies the EDID (extended display identification data)/DPID (DisplayID) from the Sink device. That is, the Source device reads the EDID (extended display identification data)/DPID (DisplayID) of the Sink device.

The source device determines whether the received EDID/DPID contains an Adaptive-Sync Data Block.

When an Adaptive-Sync Data Block is present in the EDID/DPID, the Source device determines whether there are multiple Adaptive-Sync Data Block Ranges in the Adaptive-Sync Data Block.

When there are multiple Adaptive-Sync Data Block Ranges in an Adaptive-Sync Data Block, the Source device selects a frame range based on the environment in which the video timing frame rate matches the maximum frame rate of the multiple frame ranges.

Based on the selected frame range, the Source device operates with an adaptive sync range (1 frame range). That is, the Source device processes the audio/video signals based on the selected adaptive sync range and transmits them to the Sink device.

If there is no Adaptive-Sync Data Block in EDID/DPID, or if there are no multiple Adaptive-Sync Data Block Ranges in the Adaptive-Sync Data Block (i.e., there is only one Adaptive-Sync Data Block Range in the Adaptive-Sync Data Block), the Source device operates with one adaptive-sync range. That is, the Source device processes the audio/video signal based on one adaptive-sync range and transmits it to the Sink device.

Method of indicating Frame Range in EDID when the Sink device of the present disclosure supports multiple Adaptive-Sync Ranges

Sink supports Multi Adaptive-Sync Range and displays the EDID according to the maximum value of Video Timing and Adaptive-Sync Range. Also, Overdrive tuning is performed for each Adaptive-Sync Frame Range to prevent excessive over/undershoot from occurring regardless of which Adaptive-Sync Frame Range area the Source selects.

(Example 4)

[Video Timing] If EDID is indicated as follows:

- Video Timing1: 4k@240hz

- Video Timing2 : 4k@120hz

- Video Timing3 : 4k@100hz

[Frame Range] must be set to the Max value of Adaptive-Sync Range by referring to Video Timing and displayed in EDID as shown below.

- Adaptive-Sync Frame Range1: 40hz - 240hz

- Adaptive-Sync Frame Range2: 60hz - 120hz

- Adaptive-Sync Frame Range3: 24hz - 100hz

As indicated in the EDID above, the Sink manufacturer tunes OverDrive for each '40hz - 120hz', '60hz - 240hz', and '24hz - 100hz' Frame Range, and brings the OD Table differently for each Frame Range.

[Source device claim related description]

The embodiments described below are specifically described with reference to FIG. 7 in terms of terminal operation. The methods described below are distinguished only for convenience of explanation, and it goes without saying that some components of one method may be substituted for some components of another method, or may be applied in combination with each other, as long as they are not mutually exclusive.

FIG. 7 is a diagram illustrating an example of an operation process of a source device according to various embodiments of the present disclosure.

According to various embodiments of the present disclosure, a method performed by a source device is provided.

A source device includes a processor; a memory; and a transceiver. The memory stores instructions for performing operations based on what is executed by the processor.

At step S701, the Source device receives a hot plug detection (HPD) signal from the Sink device.

At step S702, the source device receives first information related to EDID (Extended Display Identification) or DPID (DisplayID) from the sink device.

At step S703, the Source device determines a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the Sink device.

In step S704, if the Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, the Source device determines a specific Adaptive-Sync Frame Range among the plurality of Adaptive-Sync Frame Ranges, the maximum frame rate of which corresponds to the specific video timing frame rate.

At step S705, the source device transmits processed information based on the specific adaptive synchronization frame range to the sink device.

According to various embodiments of the present disclosure, when the number of adaptive synchronization frame ranges to which the adaptive synchronization data block relates is 1, the specific adaptive synchronization frame range can be determined as one adaptive synchronization frame range to which the adaptive synchronization data block relates.

According to various embodiments of the present disclosure, when the first information includes Display Stream Compression (DSC) information, the specific video timing frame rate can be determined from among the plurality of video timing frame rates or multiple Video Timing Frame Rates.

According to various embodiments of the present disclosure, the plurality of video timing frame rates can be generated by applying DSC to the plurality of video timing frame rates.

According to various embodiments of the present disclosure, the maximum frame rate of the particular adaptive synchronization frame range can be equal to the particular video timing frame rate.

According to various embodiments of the present disclosure, the specific video timing rate may be determined by input information to the source device or by an arbitrary selection by the source device.

According to various embodiments of the present disclosure, the specific adaptive synchronization frame range can be determined based on the specific video timing.

According to various embodiments of the present disclosure, the processed information may be based on tuning of an overdrive value for the particular adaptive synchronization frame range.

According to various embodiments of the present disclosure, a Source device is provided. The Source device includes a processor; a memory; and a transceiver, wherein the processor can be configured to perform a method of operating the Source device according to FIG. 7.

According to various embodiments of the present disclosure, a device for controlling a Source device is provided. The device includes at least one processor and at least one memory operably connected to the at least one processor. The at least one memory may be configured to store instructions for performing a method of operating the Source device according to FIG. 7 based on being executed by the at least one processor.

According to various embodiments of the present disclosure, one or more non-transitory computer readable media (CRM) storing one or more instructions are provided. The one or more instructions, when executed by one or more processors, perform operations, the operations may include a method of operating a Source device according to FIG. 7.

The claims described in the various embodiments of the present disclosure may be combined in various ways. For example, the technical features of the method claims of the various embodiments of the present disclosure may be combined and implemented as a device, and the technical features of the device claims of the various embodiments of the present disclosure may be combined and implemented as a method. In addition, the technical features of the method claims and the technical features of the device claims of the various embodiments of the present disclosure may be combined and implemented as a device, and the technical features of the method claims and the technical features of the device claims of the various embodiments of the present disclosure may be combined and implemented as a method.

Claims (15)

1. In the method of operating the source device,

   A step of receiving a hot plug detection (HPD) signal from a sink device;

   A step of receiving first information related to EDID (Extended Display Identification) or DPID (DisplayID) from the sink device;

   A step of determining a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the sink device;

   When an Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, a step of determining a specific Adaptive-Sync Frame Range among the plurality of Adaptive-Sync Frame Ranges, the maximum frame rate of which corresponds to the specific video timing frame rate;

   Comprising a step of transmitting processed information based on the specific adaptive synchronization frame range to the sink device,

   method.
2. In the first paragraph,

   If the number of adaptive synchronization frame ranges to which the above adaptive synchronization data block relates is 1, the specific adaptive synchronization frame range is determined as one adaptive synchronization frame range to which the above adaptive synchronization data block relates.

   method.
3. In the first paragraph,

   If the first information includes DSC (Display Stream Compression) information, the specific video timing frame rate is determined from among the plurality of video timing frame rates or multiple Video Timing Frame Rates,

   The above plurality of video timing frame rates are generated by applying DSC to the above plurality of video timing frame rates.

   method.
4. In the first paragraph,

   The maximum frame rate of the above specific adaptive synchronization frame range is equal to the above specific video timing frame rate.

   method.
5. In the first paragraph,

   The above specific video timing rate is determined by input information to the source device or by arbitrary selection by the source device.

   method.
6. In the first paragraph,

   The above specific adaptive synchronization frame range is determined based on the above specific video timing.

   method.
7. In the first paragraph,

   The above processed information is based on tuning the overdrive value for the specific adaptive synchronization frame range.

   method.
8. In the source device,

   comprising a processor; memory; and a transceiver;

   The above memory stores instructions for performing operations based on what is executed by the processor,

   The above actions are,

   A step of receiving a hot plug detection (HPD) signal from a sink device;

   A step of receiving first information related to EDID (Extended Display Identification) or DPID (DisplayID) from the sink device;

   A step of determining a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the sink device;

   When an Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, a step of determining a specific Adaptive-Sync Frame Range among the plurality of Adaptive-Sync Frame Ranges, the maximum frame rate of which corresponds to the specific video timing frame rate;

   Comprising a step of transmitting processed information based on the specific adaptive synchronization frame range to the sink device,

   Source device.
9. In Article 8,

   If the number of adaptive synchronization frame ranges to which the above adaptive synchronization data block relates is 1, the specific adaptive synchronization frame range is determined as one adaptive synchronization frame range to which the above adaptive synchronization data block relates.

   Source device.
10. In Article 8,

    If the first information includes DSC (Display Stream Compression) information, the specific video timing frame rate is determined from among the plurality of video timing frame rates or multiple Video Timing Frame Rates,

    The above plurality of video timing frame rates are generated by applying DSC to the above plurality of video timing frame rates.

    Source device.
11. In Article 8,

    The maximum frame rate of the above specific adaptive synchronization frame range is equal to the above specific video timing frame rate.

    Source device.
12. In Article 8,

    The above specific video timing rate is determined by input information to the source device or by arbitrary selection by the source device.

    Source device.
13. In Article 8,

    The above specific adaptive synchronization frame range is determined based on the above specific video timing.

    Source device.
14. In Article 8,

    The above processed information is based on tuning the overdrive value for the specific adaptive synchronization frame range.

    Source device.
15. In one or more non-transitory computer-readable media storing one or more instructions,

    The one or more instructions perform operations based on being executed by one or more processors,

    The above actions are,

    A step of receiving a hot plug detection (HPD) signal from a sink device;

    A step of receiving first information related to EDID (Extended Display Identification) or DPID (DisplayID) from the sink device;

    A step of determining a specific video timing frame rate based on a plurality of Video Timing Frame Rates included in the first information of the sink device;

    When an Adaptive-Sync Data Block included in the first information is related to a plurality of Adaptive-Sync Frame Ranges, a step of determining a specific Adaptive-Sync Frame Range among the plurality of Adaptive-Sync Frame Ranges, the maximum frame rate of which corresponds to the specific video timing frame rate;

    Comprising a step of transmitting processed information based on the specific adaptive synchronization frame range to the sink device,

    Computer readable medium.

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