KR100193889B1 - Via hole formation method of semiconductor device - Google Patents

Abstract

The present invention provides a method for forming a via hole of a semiconductor device, and protects the exposure of the SOG film from the oxygen plasma used to remove the photoresist, thereby preventing the depression caused by the excessive etching of the SOG film, thereby improving the yield of the device.

Description

Via hole formation method of semiconductor device

1A and 1B are cross-sectional views of a device for explaining a via contact forming method of a conventional semiconductor device.

2A to 2G are cross-sectional views of a device for explaining a method of forming a via hole in a conventional semiconductor device.

3A to 3F are cross-sectional views of a device for explaining a method of forming a via hole in a semiconductor device according to the present invention.

* Explanation of symbols for main parts of the drawings

1A, 1 and 11: Silicon substrates 2A, 2 and 12: Metal film

3A: interlayer insulating film 3 and 13: first interlayer insulating film

4A, 4 and 14: SOG film 5 and 15: Second interlayer insulating film

6 and 16: photosensitive film 7 and 17: via hole

8 and 18: metal layer 19: barrier layer

The present invention relates to a method of forming a via hole of a semiconductor device, and more particularly, to a method of forming a via hole of a semiconductor device for connection between multilayer metal interconnections.

In general, as semiconductor devices are highly integrated, metal wirings have a multi-layered structure, and SOG having a very good gap filling property is mainly used to fill a space between these metal wirings. Next, a method of forming a via hole of a conventional semiconductor device will be described with reference to the accompanying drawings.

1A and 1B are cross-sectional views of a device for describing a method of forming a via contact of a conventional semiconductor device, and FIGS. 2A to 2G are cross-sectional views of a device for explaining a method of forming a via hole of a conventional semiconductor device. .

First, in FIG. 1A, an intermetal oxide layer 3A is formed on the entire upper surface of the silicon substrate 1A on which the plurality of metal films 2A are formed, and then the SOG film 4A is formed thereon. It is a cross section. The SOG film 4A is used for planarization of the metal film 2A.

FIG. 1B is a cross-sectional view of the entire upper surface of the silicon substrate 1A after etching. In this case, since the SOG film 4A contains an organic component, the etching rate of the SOG film 4A is increased by oxygen generated when the interlayer insulating film 3A is exposed. ), The SOG film 4A is etched much in the exposed portion (part a), and the SOG film 4A is slightly etched in the part where the metal film 2A is not exposed (part b). Therefore, due to different etching ratios of the SOG film 4A, many difficulties are caused in planarization of the metal film 2A even in one wafer.

2A to 2G are cross-sectional views of devices for explaining a method of forming via holes in a conventional semiconductor device.

FIG. 2A is a cross-sectional view of a state in which the first interlayer insulating film 3, the SOG film 4 and the second interlayer insulating film 5 are sequentially formed on the silicon substrate 1 on which the metal film 2 is formed. FIG. 2B is a cross-sectional view of the photoresist film 6 patterned using a mask (not shown) after forming the photoresist film 6 on the second interlayer insulating film 5.

FIG. 2C is a cross-sectional view of a wet etching state of the second interlayer insulating film 5 using the photosensitive film 6 as a mask, and FIG. 2D illustrates the photosensitive film 6 until a time point at which the metal film 2 is exposed. The second interlayer insulating film 5 is used as a mask. The SOG film 4 and the first intermetallic insulating film 3 are anisotropically etched to form the via holes 7.

FIG. 2E is a cross-sectional view of the state in which the photosensitive film 6 is removed. At this time, since the exposed portion of the SOG film 4 is excessively etched by using an oxygen plasma to remove the photosensitive film 6, a depression c is formed.

FIG. 2F is a cross-sectional view of the metal layer 8 deposited on the entire upper surface, and FIG. 2G is an enlarged cross-sectional view of part A of FIG. 2F. The deposited metal layer 8 is electrically shorted at the recessed portion c of the SOG film 4 as shown in FIG. 2G, thereby lowering the yield of the device.

Accordingly, an object of the present invention is to provide a method for forming a via hole in a semiconductor device which can solve the above-mentioned disadvantages by preventing exposure of the SOG film from the oxygen plasma used for removing the photoresist film.

The present invention for achieving the above object is a first step of sequentially forming a first interlayer insulating film, an SOG film, a second interlayer insulating film and a barrier layer on a silicon substrate on which a metal film is formed; Forming a photoresist film on the barrier layer, patterning the photoresist film using a mask, and then etching the barrier layer using the photoresist film as a mask; and using the photoresist film as a mask from the second step. A third step of removing the photosensitive film after wet etching the interlayer insulating film; and using the barrier layer as a mask from the third step to the time when the metal film is exposed, using the second interlayer insulating film, the SOG film, and the first metal. An anisotropic etching of the interlayer insulating film to form a via hole, and then removing the barrier layer; and depositing a metal layer on the entire upper surface from the fourth step. It is characterized by comprising a fifth stage.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

3A to 3F are cross-sectional views of devices for explaining a method of forming via holes in a semiconductor device according to the present invention.

3A shows a first interlayer insulating film 13, an SOG film 14, a second interlayer insulating film 15, and a barrier layer 19 sequentially formed on the silicon substrate 11 on which the metal film 12 is formed. It is sectional drawing of the made state. The barrier layer 19 then serves as a hard mask.

3B illustrates that the photoresist layer 16 is formed on the barrier layer 19, the photoresist layer 16 is patterned using a mask (not shown), and the barrier layer 19 is formed using the photoresist layer 16 as a mask. ) Is a cross-sectional view of the state etched.

3C is a cross-sectional view of the photoresist layer 16 after the second interlayer insulating layer 15 is wet-etched using the photoresist layer 16 as a mask. The wet etching of the second interlayer insulating film 15 may be performed using the barrier layer 19 as a mask after removing the photosensitive film 16.

3D illustrates the second interlayer insulating film 15, the SOG film 14, and the first intermetallic insulating film 13 using the barrier layer 19 as a mask until the metal layer 12 is exposed. After forming the via hole 17 by isotropic etching, the sectional view of the barrier layer 19 is removed. When the barrier layer 19 is used as a mask, the selective etching ratio of the interlayer insulating films 13 and 15 and the SOG film 14 to the barrier layer 19 must be high, and the barrier layer 19 can be removed. In this case, the selective etching ratio of the barrier layer 19 to the metal layer 12 and the second interlayer insulating layer 15 should be high. Therefore, the barrier layer 19 uses polysilicon or a nitride film, and the thickness thereof is 3000 to 5000 kPa.

FIG. 3E is a cross-sectional view of the metal layer 18 deposited on the entire upper surface, and FIG. 3F is an enlarged cross-sectional view of part A of FIG. 3E. Since the deposited metal layer 18 does not have depressions in the exposed SOG film 14, normal deposition is performed.

As described above, according to the present invention, by protecting the exposure of the SOG film from the oxygen plasma used to remove the photoresist film, it is possible to improve the yield of the device by preventing excessive etching of the SOG film.

Claims (5)

Sequentially forming a first interlayer insulating film, an SOG film, a second intermetallic insulating film, and a barrier layer on the silicon substrate on which the metal film is formed; forming a photosensitive film on the barrier layer, and patterning the photosensitive film using a mask. And etching the barrier layer using the patterned photoresist as a mask, wet etching a portion of the second intermetallic insulating layer using the photoresist as a mask, and then removing the photoresist, and exposing the metal layer. Anisotropically etching the remaining second interlayer insulating film, the SOG film, and the first interlayer insulating film by using the barrier layer as a mask to form a via hole, and then removing the barrier layer; Via hole forming method of a semiconductor device comprising the step of depositing. The method of claim 1, wherein the barrier layer is formed using any one of a polysilicon layer and a nitride film. The method of claim 1, wherein the barrier layer has a thickness of about 3000 to about 5000 microns. 2. The method of claim 1, wherein when the barrier layer is used as a mask, the selective etching ratio between the first and second intermetallic insulating layers and the SOG film is high with respect to the barrier layer, and when the barrier layer is removed, the metal layer and the second A method of forming a via hole in a semiconductor device, characterized in that the selective etching ratio of the barrier layer is high with respect to the interlayer insulating film. The method of claim 1, wherein the wet etching of the second interlayer insulating film is performed by removing the photosensitive film and using the barrier layer as a mask.