JPH02203535A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To dispense with an etching on an epitaxial layer and to simplify and facilitate the manufacturing process of a semiconductor device by a method wherein after an open region, which is used as an active region, is formed by selective etching, the active region is formed at this open region by a selective epitaxial method. CONSTITUTION:An insulating film 23 and a semiconductor material film 24 are formed on the main surface of a semiconductor substrate 21 and a laminated film on a part, which is used as an active region 28 of a semiconductor element, is selectively removed to form an open region 28a. Then, a single crystal silicon film doped with phosphorus is grown on the main surface, which is exposed at this region 28a, of the substrate and with the region 28a filled with the silicon film, the N-type active region 28 with a sidewall to come into contact to the film 24 is formed. In such a way, after the open region is formed in advance at the part, which is used as the active region, the active region is formed by a selective epitaxial method. Accordingly, an etching is not performed on a single crystal substrate. Thereby, a semiconductor device can be easily manufactured without necessitating a complicated process.

Description

Detailed Description of the Invention [Object of the Invention] (Industrial Field of Application) The present invention relates to a method for manufacturing a bipolar semiconductor device, and particularly relates to a method for manufacturing a bipolar semiconductor device. The present invention is used in a method of manufacturing a semiconductor device including a bipolar element having a structure in which a semiconductor material film such as a film is provided and this film is used as an extraction electrode of the bipolar element and an impurity diffusion source for an active region.

(Prior Art) In recent years, in bipolar integrated circuits, a method has been implemented in which a polycrystalline silicon film is used for the base extraction ti of a bipolar transistor in order to increase speed and increase integration.
Among them, 5ICO3 (Side wall Ba5e
A transistor with a structure called "Contact 5 structure" has been developed. The external base (also called a high concentration base extraction region) of this transistor is formed by impurity diffusion from a polycrystalline silicon film provided on the sidewall.

A conventional method for manufacturing an NPN transistor having a 5rcos structure will be described below with reference to FIGS. 7 to 10.

As shown in FIG. 7, first, an N-type epitaxial layer 3 is formed on a P-type silicon substrate 1 on which an N''11 buried region 2 is formed, and then oxide 11Q4, nitride M5, and oxide 116 are sequentially applied in this order. Next, these laminated films and the N-type epitaxial layer 3 in the portions that are to become inactive regions are selectively etched and removed.

Next, as shown in FIG. 8, an oxidized rIIA 7 is formed, and a nitride film 8 is further deposited. Next, only this nitride film in the flat portion is removed, and selective oxidation is performed using the remaining nitride film as a mask to form a thick oxide [9].

Next, as shown in FIG. 9, nitrided 1g18 and oxidized W
After removing A7, undoped polycrystalline silicon M10
Deposit.

Next, as shown in FIG. 10, the polycrystalline silicon film 10 is planarized, leaving only the polycrystalline silicon layer 10 in contact with the external base sidewall.Next, by ion implantation, the base region 12,
An emitter region 13 and a collector extraction region 14 are respectively formed, and a P4 external base 11 is formed by impurity diffusion from the polycrystalline silicon layer 10. Next, after forming an oxide film 15, contact holes are opened and electrodes 16 are formed.

In the bipolar transistor with the S ICO3 structure shown in FIG. 10, the active region necessary for transistor operation is formed on the protrusion of a convex single-crystal substrate, and a polycrystalline silicon film is formed on the IPI wall of the active base region. It was established.

With this structure, active regions such as the element isolation region and the base can be formed by self-alignment technology, and a bipolar semiconductor device with higher speed and higher integration can be obtained.

However, conventional manufacturing methods have drawbacks in that the manufacturing process is very complicated and it is very difficult to control the end point of etching. Furthermore, since silicon is etched, crystal defects are likely to occur, causing leakage.

<Problems to be Solved by the Invention> In response to the strong needs in the market for higher speed and higher integration of semiconductor devices, the above-mentioned bipolar semiconductor device with the 5ICO3 structure was developed. It's very complicated. In addition, with the miniaturization of devices, there are also strict requirements for controlling the end point of etching, which is a problem that is extremely difficult to overcome with conventional techniques. Furthermore, crystal defects are likely to occur as a result of etching, causing leakage and reducing yield.

An object of the present invention is to provide a method for manufacturing a semiconductor device having a structure in which a semiconductor material film (also referred to as a semiconductor film) is provided on the side wall of an active region of a semiconductor element, which does not require complicated steps as in conventional methods and is relatively easy to manufacture. An object of the present invention is to provide a method for manufacturing a semiconductor device, which can form a semiconductor device in a timely manner, suppress generation of crystal defects during the manufacturing process, suppress leakage of the semiconductor device, and improve yield.

[Structure of the Invention] (Means for Solving the Problem) The method for manufacturing a semiconductor device of the present invention includes (a) forming an insulating M (for example, an oxide film) on the main surface of a semiconductor substrate, and further forming an insulating layer on the insulating layer. a step of laminating a semiconductor material g (for example, a polycrystalline silicon film), and (b) selectively removing only a portion of the laminated film of the insulating film and the semiconductor material film that will become an active region of the semiconductor element, and forming a substrate. (C) growing a single crystal layer on the main surface of the substrate exposed in the opening region by selective epitaxial method to fill the opening region and use it as an impurity diffusion source and an extraction electrode; The method is characterized by comprising a step of forming an active region of a semiconductor element so that a side wall is in contact with the semiconductor material film that can be used.

(Function) In the conventional manufacturing method, an epitaxial layer is formed on the main surface of the substrate and then this layer is etched to form an active region, whereas in the manufacturing method of the present invention, the opening region that will become the active region is selectively etched. Since the active region is formed in this region by the selective epitaxial method after the active region is formed, the interface of the active region is not etched, which makes the process simpler and easier than in the past. Furthermore, since the epitaxial layer is not etched, no crystal defects are generated and leaks caused by these defects are also eliminated.

In the semiconductor device formed by the above manufacturing method, the semiconductor elements are isolated by the insulating film.

Further, the semiconductor material film can be used as an impurity diffusion source to the active region adjacent thereto and as an extraction electrode connected to the sidewall of the active region.

(Example) As an example of the present invention, a method for manufacturing an NPN transistor, which is a component of a bipolar integrated circuit, will be described below with reference to FIGS. 1 to 6.

As shown in FIG. 1, the main surface of a P-type silicon substrate 21 is selectively doped with antimony or arsenic at a surface concentration of 10".
After forming the N''-type buried region 22 of ~10102 oato/ci3, an insulating WA 23, for example, thermally oxidized M23, is applied to the entire main surface of the silicon substrate 21 including the buried region.
It forms about μm. Subsequently, a semiconductor material M24, for example, polycrystalline silicon M24 of about 25001 is deposited on the oxide film 23.
are laminated by CVD method. Next, 1× boron (B) is implanted into the polycrystalline silicon film 24 by ion implantation.
Insert approximately 10'atons/C1l'.

Next, as shown in FIG. 2, the polycrystalline silicon film 24 is etched leaving a base formation region and a region to be a base extraction electrode. Next, an oxide film 2 is applied over the entire surface of the substrate.
form 5.

Next, as shown in FIG. 3, the portion of the oxide film 25, 23 that will become the collector extraction region 26 from the buried region 22 is removed by anisotropic etching, and a hole reaching the N'' buried region 22 is formed. High concentration, e.g. 10” atols/cm’, is applied to the holes by selective epitaxial method.
Embed single crystal silicon doped with a certain amount of phosphorus.

Next, as shown in FIG. 4, oxidized WA 27 is formed on the collector extraction region 26 in which the single crystal silicon is buried.

Next, the oxide film 23 of the portion that will become the active region 28 of the semiconductor element (transistor), polycrystalline silicon II! The laminated film consisting of 24 and oxide film 25 is selectively removed by anisotropic etching to form an opening region 28a reaching the N1 buried region 22 on the main surface of the substrate. Subsequently, on the main surface of the substrate exposed in this opening region, single crystal silicon doped with phosphorus, for example, about 10' atoms/c113, is grown by selective epitaxial method to fill the opening region 28a, and the sidewalls are made of polycrystalline silicon M424. N that touches
A mold active region 28 is formed.

Next, as shown in FIG. 5, thermally oxidized WA is applied on the active region 28.
Form 29. At this time, polycrystalline silicon II
! 24 diffuses into the active region 28 to form a P+ extrinsic base region (also referred to as a P+ base extraction region) 30. Next, active region 2 is formed by boron ion implantation.
8, an internal base region (also called an intrinsic base region) 31 is formed. Next, oxide film 2 in the part that will become the emitter region
9 is removed by etching, and an emitter region 32 is formed by arsenic ion implantation. To form the emitter region 32, diffusion of arsenic from polycrystalline silicon may be used instead of ion implantation.

Next, as shown in FIG. 6, an oxide film 33 is formed on the entire surface.
Subsequently, a contact pole is opened and an electrode 34 is formed by a known method.

In the above manufacturing method, the active region of the transistor is formed by filling the opening region by selective epitaxial method. Therefore, unlike the conventional manufacturing method in which active regions are formed by selectively etching the epitaxial layer, the manufacturing method of the present invention solves the problem of extremely difficult etching end point control and eliminates the occurrence of crystal defects associated with etching. . Also, the manufacturing process is simpler and easier than before.

The NPN transistor element formed by the above manufacturing method has a structure equivalent to the conventional structure called 5ICO3, and can be made faster and more highly integrated. That is, oxide film 2
3, an intrinsic region necessary for transistor operation is formed in the active region isolated by the polycrystalline silicon J.
III 24 functions as a base extraction electrode and an impurity diffusion source.

The method for manufacturing a vertical NPN transistor has been described above, but by eliminating the step of forming the base and emitter regions in the NPN transistor described above, the P1 external base region 30 is used as the emitter region and the collector region, and the collector region is used as the base region. It is also possible to form a lateral PNP) transistor.

Furthermore, instead of the polycrystalline silicon film, it is also possible to use a laminated film of a polycrystalline silicon film and a silicide film.

[Effects of the Invention] As described above, in the method of the present invention for manufacturing a semiconductor device having a structure in which a semiconductor material film is provided on the side wall of an active region of a semiconductor element, after forming an opening region in a portion that will become an active region in advance, , the active region is formed by a selective epitaxial method, and the single crystal substrate is not etched in the conventional method. Therefore, it is possible to form a semiconductor device relatively easily without the need for complicated processes as in the conventional method. It was possible to suppress the occurrence of crystal defects during the manufacturing process, significantly reduce leakage in semiconductor devices, and improve yield.

[Brief explanation of the drawing]

1 to 6 are schematic cross-sectional views showing the manufacturing steps in order of process when the manufacturing method of the present invention is applied to an NPN transistor element of a bipolar semiconductor device, and FIGS. 7 to 1O are 1A and 1B are schematic cross-sectional views sequentially showing the manufacturing process of a conventional semiconductor device. 1.21...Semiconductor substrate, 23...Insulation M (oxide film), 24...Semiconductor material M (polycrystalline silicon M)
25.27, 29.33... Oxide film, 28... Active region, 28a... Opening region, 30... P"external base region, 31... P internal base region, 32...
...Emitter area. Figure 1 Figure 4 Figure 2 Figure 5 Figure 3 Figure 6 Figure

Claims (1)

[Claims] 1. Forming an insulating film on the main surface of the semiconductor substrate, further laminating a semiconductor material film on the insulating film, and selectively removing the insulating film and the semiconductor material film to reach the main surface of the semiconductor substrate. a step of forming an opening region; and a step of growing a selective epitaxial layer on the main surface of the semiconductor substrate exposed in the opening region, filling the opening region and forming an active region of a semiconductor element whose sidewalls are in contact with the semiconductor material film. A method for manufacturing a semiconductor device, comprising: