JP4563692B2 - Display panel current drive circuit and current drive apparatus - Google Patents

Description

  The present invention relates to a current drive circuit and a current drive device for a display panel, and more particularly, to a current drive circuit and a current drive device for a display panel that improve the uniform emission luminance of display elements on the display device.

  In recent years, with the progress of miniaturization technology of semiconductor elements, LSIs composed of the semiconductor elements are also increasing in scale. For example, in the field of display devices such as liquid crystal, a data line driving output circuit of a driving circuit receives 8-bit digital data per pixel, generates a liquid crystal driving output voltage of 256 gradations, and has 16.67 million colors. A liquid crystal panel for display is realized.

  That is, the number of bits of 8 bits or 16 bits is used to indicate the number of densities when digitizing an analog image by gradation. In the case of a monochrome image, the minimum gradation is a two-gradation expression in which the brightness of a pixel is represented by 1-bit information of black “0” or white “1”.

  On the other hand, in the case of color, as is well known, it is realized by superimposing the three primary colors consisting of red R, green G, and blue B. For example, when each of red R, green G, and blue B is expressed with 256 gradations, 256 × 256 × 256 = 16.7 million colors can be displayed as a whole.

  An example of driving means used in such a display panel driving circuit is described in Patent Document 1. The conventional current driving means described in the publication has a circuit configuration connecting a plurality of current driving ICs as shown in FIG. Referring to FIG. 14, a plurality of current driving ICs (Integrated Circuits: hereinafter referred to as a driving current circuit) 1 to 4 using a current mirror as a constant current source and a reference current source 5 are connected to each other. Inserted between a potential power source and a low potential power source, and a built-in current mirror is connected in cascade to supply a uniform current to each current driving IC.

  When the current mirror in the current drive IC described above is composed of MOS transistors, the current variation between chips increases as the number of current drive ICs increases due to the VT variation of the MOS transistors.

  On the other hand, another example is described in Japanese Patent Application Laid-Open No. H10-228688, and the driving means shown in FIG. 15 is described in the publication. Referring to FIG. 15, the driving unit includes a current output unit 22 and a sink current adjusting unit 23. The current output unit 22 receives reference current sources I1, I2,..., And In that are different from each other, and the reference current sources I1, I2,. , SWn, the output levels of which are determined by D2,..., Dn, and a combination of reference current sources I1, I2,. Output current. The sink current adjusting unit 23 receives a specific level of reference current output from the switches SW1, SW2,..., SWn, adjusts the level of the sink current, and sets a specific sink current in the data line connected to each pixel. Is sent out.

  This example is a general current drive circuit. For example, in the case of n-bit gradation, a specific level of current is supplied by combining binary current constant currents of I1 to In.

  However, in the binary-weight constant-current current driving circuit, the magnitude of adjacent constant currents is two times different, so that when the output current is monotonously increased, the monotonic increase is poor. Therefore, the current value cannot be increased / decreased with high resolution, and it is difficult to increase the gradation of the drive current. In this example, gamma correction cannot be applied to the output current corresponding to the digital signal.

  Still another conventional example is described in Patent Document 3. This image display means applies gamma correction (γ = 2.0) to the drive current corresponding to the digital signal by adjusting both the current value of the drive current and the current pulse width. However, at the time of low gradation, the current pulse width becomes small, and there is a possibility that a current that can drive the light emitting element to a desired luminance cannot be supplied to the light emitting element.

JP 2001-42827 A JP 2002-244618 A JP 2001-350439 A

  As described above, in the case of Patent Document 1, the conventional display panel driving means connects a plurality of current driving ICs 1 to IC4 with current mirrors and supplies a uniform current to each current driving IC. When the current mirror is composed of MOS transistors, there is a drawback that the current variation between chips increases as the number of current driving ICs increases because of the VT variation of the MOS transistors.

  In the case of Patent Document 2, when a binary-weight constant current is combined, the monotonically increasing output current deteriorates, so that it is difficult to increase the gradation of a specific level of current. In addition, there is a drawback that γ correction cannot be applied to the output current corresponding to the digital signal.

  Furthermore, in the case of Patent Document 3, γ correction is applied to the drive current corresponding to the digital signal by adjusting both the current value and the current pulse width of the drive current. However, if the drive current becomes very small, the MOS transistor There is a drawback that the response speed is lowered.

  The object of the present invention has been made in view of the above-described conventional drawbacks. A uniform current with reference to a reference current source is taken into a plurality of current drive ICs of a display panel, and the current drive IC has high accuracy. An object of the present invention is to provide a drive current device capable of outputting drive current to a display panel and applying γ correction to the drive current.

  The display panel current drive device of the present invention includes a plurality of cascaded current drive circuits, and a reference current source for supplying a reference current to the plurality of current drive circuits from the outside of the plurality of current drive circuits, Each of the plurality of current driving circuits includes a reference resistor, and includes a reference current generation unit that generates at least one internal reference current that flows in response to the reference current, and the at least one internal reference current is A desired number is totaled and output to the display element of the display panel. Further, in the current driving device of the display panel, the reference current generation unit further includes at least one current adjustment resistor, and a reference voltage generated across the reference resistor is applied to each of the at least one current adjustment resistor. The at least one internal reference current is generated.

  In a first application mode of the current driving device for a display panel according to the present invention, a reference resistor of a current driving circuit on the highest potential side of the plurality of current driving circuits is connected to a high potential power source through a voltage adjusting resistor, and the plurality of current driving devices are connected. A reference resistor of a current driving circuit on the lowest potential side of the circuit is connected to the reference current source.

  According to a second application mode of the current driving device for a display panel of the present invention, each of the plurality of current driving circuits has a voltage adjustment circuit connected to a high potential power supply side of the reference resistor, and the plurality of current driving circuits When the circuit is biased, only the voltage adjustment circuit of the current drive circuit on the highest potential side among the plurality of current drive circuits causes a voltage drop, and the remaining current drive circuit is a short circuit.

  The current driving circuit of the display panel according to the present invention includes a reference current generator that includes a reference resistor and generates at least one internal reference current by flowing a reference current from the outside to the reference resistor. One internal reference current is summed in a desired number and output.

  According to a first application mode of the current driving circuit of the display panel of the present invention, the reference current generator includes at least one current adjustment resistor, and a reference voltage generated across the reference resistor is supplied to each of the at least one current adjustment resistor. To generate at least one internal reference current, and the reference current generator further includes a first operational amplifier as a voltage follower that outputs a voltage on the high potential power supply side of the reference resistor, and the reference resistor A plurality of second operational amplifiers as voltage followers that output a voltage on the low potential power supply side, and the reference current generator includes an output of the first operational amplifier at both ends of each of the at least one current adjustment resistor and the second operational amplifier. An output of a corresponding one of the plurality of second operational amplifiers is applied, and a corresponding internal group of the at least one internal reference current is applied. The reference current generation unit further includes a reference current unit between each of the at least one current adjustment resistor and the low-potential power source, and the plurality of second operational amplifiers are configured to generate a current. The internal reference current of the corresponding one of the at least one internal reference current is caused to flow to the low-potential power source by inputting the output of the corresponding one of them into the reference current section.

  The second application form of the current driving circuit of the display panel according to the present invention further includes at least one current driving unit, and each of the at least one current driving unit includes one internal reference current among the at least one internal reference current. A reference current is mirrored to generate a plurality of mirror currents, and a desired number of mirror currents among the plurality of mirror currents are summed and output, and each of the at least one current driver further includes the plurality of mirror currents. A plurality of switches corresponding to the number of switches, and selecting and turning on / off the plurality of switches to sum up the desired number of mirror currents, and the reference current generator further includes at least one current adjustment resistor. Including at least one internal reference current by applying a reference voltage generated across the reference resistor to each of the at least one current adjustment resistor. And each of the at least one current driving unit selects and turns on / off the plurality of switches, so that the current driving circuit sums at least one set of the desired number of mirror currents. Can be output.

  With such a configuration, by changing the resistance value of the current adjustment resistor included in each of the plurality of current drive circuits, the drive current flowing through the display element of the display panel can be changed from the drive current to the input signal characteristic (gamma) of the display panel. Characteristic). Further, by using the first and second application forms of the current driver for the display panel of the present invention, the reference voltage generated in the reference resistor is applied to the current adjustment resistor included in the current driver circuit on the highest potential side of the plurality of current driver circuits. The voltage can be reliably applied, and the variation between the voltages generated in the current adjustment resistors included in the plurality of current driving circuits can be reduced.

Example 1
First, the outline of the present invention will be described. FIG. 1 shows the relationship between a current driving device according to the present invention, a current driving IC of the present invention, which will be described later, and a display panel. As shown in FIG. 1, each of the current driving ICs IC1 to IC4 according to the present invention has a reference resistor Rr, and these resistors are connected in series and further connected to one external reference current source 5. By providing a reference resistor Rr between the two terminals 101 and 102 in these current driving ICs IC1 to IC4, a voltage drop VR is generated in the reference resistor Rr by the reference current IRef flowing from the external reference current source 5. The light emission luminance of the display element on the display device is made uniform.

  Although not shown, around the display panel, for example, in the case of a liquid crystal display panel, as a driving device for driving the liquid crystal panel, a source driver for driving a source line by outputting a driving signal for each line; A gate driver for driving the gate lines is arranged to drive the plurality of source lines in a time division manner.

  In the current drive device of the present invention, a reference resistor Rr included in a plurality of current drive ICs, IC1 to IC4, and an external reference current source 5 are cascade-connected, and a reference current (reference) IRef is connected to each resistor Rr. By flowing, a voltage drop VR is generated in each resistor Rr. Using this voltage drop VR, a uniform current based on the reference current source 5 can be taken into each of the current drivers IC1 to IC4.

  Further, by using this circuit, it is possible to output a highly accurate driving current from the current driving ICs 1 to IC4 to the display panel 6 and to apply a gamma correction to the driving current.

  First, a first embodiment of the present invention will be described with reference to the drawings.

  FIG. 2 shows the configuration of the current drive IC in the first embodiment. Referring to FIG. 2, in the current driver of the present invention, current drivers IC1 to IC4 and a reference current source 5 are connected in cascade between a high potential power supply VDD and a low potential power supply GND. Therefore, the high-precision (relative accuracy 0.5% or less) reference resistor Rr and the reference current source 5 incorporated in each are also cascade-connected, and the reference current IRef is supplied from the high-potential power supply VDD to the reference resistors Rr of the current drivers IC1 to IC4. It is flowing.

  FIG. 3 shows the configuration of the current driving IC. Referring to FIG. 3, the current driving IC includes a reference resistor Rr, operational amplifiers 111 and 112, a current adjustment resistor R, and reference MOS transistors 13 and 14 (constituting a reference current unit), and these elements are used as a reference current generating unit. Configure. The reference resistor Rr is connected between the terminals 101 and 102 and divides the high potential power supply VDD. The operational amplifier 111 is used in a voltage follower, inputs the voltage V1 on the high potential power supply side of the reference resistor Rr to the non-inverting input terminal (+), and outputs a voltage equal to the voltage V1 as the voltage V3. The output voltage V3 becomes the voltage V4 when the internal reference current I from the operational amplifier 111 flows through the current adjustment resistor R.

  The operational amplifier 112 inputs the voltage V2 on the low potential power supply GND side of the reference resistor Rr to the inverting input terminal (−), and outputs the voltage to the low potential side of the current adjustment resistor R. Therefore, a voltage substantially equal to the voltage applied to the reference resistor Rr is applied to both ends of the current adjustment resistor R, and the internal reference current I flows through the reference MOS transistors 13 and 14.

  Here, V1 of the non-inverting input terminal (+) and V3 of the inverting input terminal (−) of the operational amplifier 111, V2 of the inverting input terminal (−) of the operational amplifier 112, and V4 of the non-inverting input terminal (+) are: Each becomes an imaginary short and becomes equal.

Therefore, V1 = V3 and V2 = V4, and the voltages applied to both ends of the resistor R and the resistor Rr are equal.
I = IREF × (Rr / R) (1)
It becomes. From the equation (1), the internal reference current I based on the reference current IRef can be extracted from the current driving ICs 1 to IC4.

  Further, referring to FIG. 3, when considering the difference ΔR between the resistance values of the resistor R and the resistor Rr and the offset voltage ΔVos of the operational amplifier 111 and the operational amplifier 112, the deviation ΔI of the current I from the reference current IRef is

  It becomes. Here, R = Rr, that is, I = IRef.

  When I = 10 μA, R = 200 kΩ, ΔR = 1 kΩ, and ΔVos = 5 mV, ΔI = 0.06 μA and the current variation is 0.6%.

  However, since the current variation with respect to the reference current IRef is the same in any current driving IC, the current variations of the current I of the current driving IC1 to IC4 and the reference current IRef can be made comparable.

  On the other hand, in Japanese Patent Application Laid-Open No. 2001-42827 described in the prior art, a plurality of current drive ICs are connected by a current mirror as shown in FIG. 14 (current mirror ratio is 1: 1). The current variation ΔI4 of the current driver IC 4 farthest from the current source IREF is the largest.

  That is, ΔI1 <ΔI2 <ΔI3 <ΔI4, and the current variation increases as the number of current driving ICs increases.

  Further, in FIG. 3, if a known offset cancel circuit is added to the operational amplifier 111 and the operational amplifier 112, ΔVOS≈0V shown in Expression (2) is satisfied, so that the current variation ΔI can be further reduced.

  Further, by adding an offset cancel circuit to the operational amplifier 111 and the operational amplifier 112 from the equation (2), the voltage drop Vr in FIG. 3 does not affect the current variation ΔI. Therefore, the resistance Rr can be reduced and the voltage drop Vr can be reduced.

  That is, by adding an offset cancel circuit to the operational amplifier 111 and the operational amplifier 112 in FIG. 3, the voltage drop Vr at the resistor Rr can be reduced, and more current drive ICs can be cascaded.

  In the current drive device of the first embodiment described above, the operation power supply of the operational amplifier 111 and the operational amplifier 112 in the current drive IC1 to IC4 in FIG. 2 is the high potential power supply VDD, and the current drive IC in FIG. It shall be applied to the current drive IC1 to IC4. In this case, the V1 voltage in the current driving IC 4 of FIG. 2 is the high potential power supply VDD.

  The operation power supply of the operational amplifier 111 in the current driving IC 4 of FIG. 2 is the high potential power supply VDD, and the input terminal V1 of the operational amplifier 11 is VDD. Therefore, ideally, the equation V3 (output terminal voltage of the operational amplifier 111) = V1 = VDD is established. However, in actuality, since current is supplied to the current adjustment resistor R by passing current through the output transistor of the operational amplifier, a voltage drop of the output transistor occurs, and the relationship of V3 <VDD = V1 is established. Therefore, the equation I = IRef does not hold. However, if an operational amplifier having an output transistor with a large driving capability is used, the voltage drop of the output transistor can be made very small, so that V3≈VDD = V1 can be established. However, in this case, the output transistor of the operational amplifier becomes very large and the current consumption also increases.

  In order to solve the above problem, as shown in FIG. 2, a resistor is inserted in the A portion between the high potential power supply VDD and the current driving IC 4. Here, for example, it is only necessary to obtain a voltage drop of about 500 mV, so depending on the value of the flowing current, by connecting resistors having resistance values of about 50 kΩ to 100 kΩ in series, V1 <VDD, and the current driving IC 4 of FIG. V1 = V3 <VDD, that is, I = IRef.

Therefore, even if the power supply of the operational amplifier 11 in the current driving IC1 to IC4 in FIG. 2 is the high potential power supply VDD, the imaginary of the operational amplifier 111 is connected by connecting a resistor of an appropriate value in series to the A part of FIG. Since the operation is performed so that the short circuit is established, the current I = IRef can be supplied into the current driving IC1 to IC4.
(Example 2)

Next, a second embodiment will be described with reference to the drawings.

  In the first embodiment described above, when an external resistor is not attached to the A part of FIG. 2, it is necessary to mount the voltage drop adjusting circuit 7 in the B part of the current driving IC1 to IC4. FIG. 4 shows the configuration of the voltage drop adjustment circuit 7. The voltage drop adjustment circuit 7 includes a first P-channel MOS transistor 71, a constant current source 72, an inverter 73, a second P-channel MOS transistor 74, a third P-channel MOS transistor 75, and a step-down resistor Rv. Is provided. The first P-channel MOS transistor 71 and the constant current source 72 are cascade-connected between the high potential power supply VDD and the low potential power supply GND. The second P-channel MOS transistor 74 has a source commonly connected to the gate of the P-channel MOS transistor 71 and the step-down voltage input terminal VIN, a drain commonly connected to the step-down voltage output terminal VOUT, and a gate connected to the gate. Is connected to the drain of a P-channel MOS transistor 71 through an inverter 73. The third P-channel MOS transistor 75 has a gate connected to the high potential power supply VDD. The step-down resistor Rv is connected between the step-down voltage input terminal VIN and the step-down voltage output terminal VOUT.

  Next, the operation of the voltage drop adjusting circuit 7 will be described.

  Assuming that the voltage at the VIN terminal = VDD (= 10 V) and the voltage at the VOUT terminal = VDD−2 V, among the current drivers IC1 to IC4 connected in cascade, the N-channel MOS transistor 75 is turned on (conducted). In addition, since the P-channel MOS transistor 71 is not turned on, the input terminal of the P-channel MOS transistor 73 is at the logic level Low L (0 V), and the gate of the P-channel MOS transistor 74 is at the high level H (VDD). Therefore, the P-channel MOS transistor 74 is not turned on.

  That is, since no MOS transistor is turned on in the current driving IC 4, the current passes through the resistor RV, and a voltage drop of RV × I occurs between the VIN terminal and the VOUT terminal.

  In the current driving IC 3, the voltage at the VIN terminal = VDD−2V and the voltage at the VOUT terminal = VDD−4V, so that the P-channel MOS transistor 71 is turned on and the P-channel MOS transistor 74 is also turned on. If the on-resistance of the type MOS transistor 74 is reduced, the current flows through the P-channel type MOS transistor 74, so that the voltage drop between the VIN terminal and the VOUT terminal is very small.

  Here, the N-channel MOS transistor 75 is weakly on. When the current driving IC2 → IC1, the voltage at the VIN terminal = VDD−6V and the voltage at the VOUT terminal = VDD−8V, so that the P-channel MOS transistor 71 and the N-channel MOS transistor 75 are fully turned on.

  The P-channel MOS transistor 74 is also turned on, but is weakly turned on because the voltage at the VIN terminal is low. That is, in this case, the current I mainly passes through the N-channel MOS transistor 75, and the voltage drop is very small as in the current driving IC3.

  FIG. 5A shows voltage characteristics of the relationship between the VIN voltage and the voltage between VIN and VOUT of the voltage drop adjusting circuit 7 in FIG. As shown in FIG. 5B, in order to obtain the characteristics of FIG. 5A, a power supply voltage of 0V to 10V is applied to the input terminal VIN of the voltage drop adjustment circuit 7, and a current source IREF is connected to the output terminal VOUT. To do. Referring to FIG. 5B, the voltage drop adjusting circuit 7 shown in FIG. 4 is connected in series to the B part of FIG. 2, so that the voltage is applied only to the B part of the current driving IC 4 closest to the high potential power supply VDD terminal. It can be seen that a descent can occur.

That is, the waveform shown in FIG. 5 (a) indicates that the voltage drop adjusting circuit 7 in FIG. The voltage drop Vr occurs only in the current drive IC 4 in FIG. 2, and the voltage drop is approximately 0 V in the current drive ICs 1 to 3. Therefore, the current I = IREF can be supplied into the current drivers IC1 to IC4 in FIG.
(Example 3)

Next, a third embodiment will be described.

  FIG. 6 shows the configuration of a plurality of current sources in the current driving IC in the third embodiment. The current drive IC 8 includes a reference resistor Rr, operational amplifiers 111 to 119, current adjustment resistors R1 to R8, reference MOS transistors 131 to 138, and 141 to 148, all of which constitute a reference current generator in the current drive IC. . The reference resistor Rr is connected between the terminals 101 and 102 and divides the high potential power supply VDD. The operational amplifier 111 is used as a voltage follower, inputs the voltage V1 on the high potential power supply side of the reference resistor Rr to the non-inverting input terminal (+), and outputs a voltage equal to the voltage V1 as the voltage V3.

  The current adjustment resistors R1 to R8 pass the output currents I1 to I8 from the operational amplifier 111 to the reference MOS transistors 131 to 138, respectively. The operational amplifiers 112 to 119 input the voltage V2 on the low potential power supply GND side of the reference resistor Rr to the inverting input terminal (−), and outputs a voltage substantially equal to the voltage to the non-inverting input terminal (+) as the voltage V4. A difference voltage between the voltage V3 and the voltage V4 is applied to the current adjustment resistors R1 to R8, and the currents I1 to I8 are passed through the reference MOS transistors 131 to 138 and 141 to 148.

  That is, a plurality of circuits in the current driving IC shown in FIG. 3 used in the second embodiment described above are provided in the current driving IC chip, and the values of R1 to R8 are adjusted to flow to R1 to R8. Since the currents I1 to I8 can be adjusted, a plurality of current sources can be created in the current driving IC.

  Also in the third embodiment, V1 <VDD is obtained by connecting resistors having resistance values of about 50 kΩ to 100 kΩ in series with the A portion in FIG. 2 as described above, and in FIG. 3, V1 = V3, that is, I = Since it becomes IRef, even if the power supply of the operational amplifier 111 in the current driving IC1 to IC4 in FIG. 2 is the high potential power supply VDD, the operational amplifier 111 is connected in series with an appropriate value resistor at the point A in FIG. Operates normally, and the current I = IRef can be supplied into the current driving IC1 to IC4.

Further, by connecting the voltage drop adjusting circuit 7 shown in FIG. 4 in series to the B part of FIG. 2, a voltage drop can be caused only in the B part of the current driving IC 4 closest to the high potential power supply VDD terminal. .
Example 4

Next, a fourth embodiment will be described.

  The current drive circuit 8 of the fourth embodiment has the same configuration as FIG. 8, and only the current drive circuit 8 constitutes a current drive device. The current drive circuit 8 of the fourth embodiment includes a reference resistor Rr, operational amplifiers 111 to 119, current adjustment resistors R1 to R8, reference MOS transistors 131 to 138, 141 to 148, and these elements serve as a reference current generator. Constitute. The operational amplifier 111 is used as a voltage follower, inputs the voltage V1 on the high potential power supply side of the reference resistor Rr to the non-inverting input terminal (+), and outputs a voltage equal to the voltage V1 as the voltage V3.

  The current adjustment resistors R1 to R8 pass the output currents I1 to I8 from the operational amplifier 111 to the reference MOS transistors 131 to 138, respectively. The operational amplifiers 112 to 119 input the voltage V2 on the low potential power supply GND side of the reference resistor Rr to the inverting input terminal (−), and outputs a voltage substantially equal to the voltage to the non-inverting input terminal (+) as the voltage V4. A difference voltage between the voltage V3 and the voltage V4 is applied to the current adjustment resistors R1 to R8, and the currents I1 to I8 are passed through the reference MOS transistors 131 to 138 and 141 to 148.

  In the third embodiment described above, a plurality of current sources are provided for each of the plurality of current drive ICs, such as the current drive ICs 1 to IC4 described in FIG. 2, but in the fourth embodiment, the current drive IC 8 Is mounted on a current driving IC for a small display panel such as a display panel of a mobile phone.

  That is, when a small display panel is a target, since there are few driver data lines for connecting the current drive IC and the display panel, one chip is usually used for the driver current drive IC.

  Therefore, in this embodiment, even when a single current drive IC is mounted on the display panel instead of a plurality of current drive ICs, a plurality of current sources can be provided in the current drive IC.

  A modification of the configuration of the fourth embodiment described above is shown in FIG. In FIG. 6, the output terminals of the operational amplifiers 112 to 119 are connected to the gate terminals of the reference MOS transistors 131 to 138 on the current adjustment resistors R1 to R8 side. In FIG. 7, the output terminals of the operational amplifiers 112 to 119 of the current driving IC 58 are connected to the gate terminals of the reference MOS transistors 161 to 168 on the GND side.

  When a single current driving IC is mounted on a small display panel such as a cellular phone, a constant current circuit can be configured with the configuration of FIG.

  That is, when a plurality of current drive ICs 1 to 4 are connected as in the other embodiments, the voltage V3 at the terminal 101 and the voltage V4 at the terminal 102 are different for the current drive ICs 1 to 4, respectively. The configuration cannot be used in other embodiments.

  For example, when the above-described circuit configuration is the arrangement of the current drive IC 4 close to the high-potential power supply VDD, the voltage V4 = VDD−2V to VDD−3V of the terminal 102, so that the configuration of FIG. When connected to the drive units X and Y, the voltage range of the terminal OUT of the drive unit in FIG. 9 becomes narrow. Here, each of the drive units X and Y includes a plurality of current mirrors and a switch group connected in series to the plurality of current mirrors, and the plurality of drive units X and Y constitute a current drive unit. That is, a portion of the current driving IC excluding the reference current generating unit is a current driving unit.

  That is, the gate voltage of the second-stage MOS transistor of the current mirror is V4 = VDD−2V to VDD−3V.

Therefore, even when a single current driving IC is mounted, the voltage range of the terminal OUT becomes narrow unless the voltage V4 of the terminal 102 is set to be as low as possible.
(Example 5)

Next, a fifth embodiment will be described.

  FIG. 8 shows the configuration of the current drive circuit in the fifth embodiment. The current drive circuit 9 uses the current drive IC 8 that passes the plurality of constant currents I1 to I8 described in the third embodiment. For example, FIG. 9 shows a configuration of a current driving circuit combining the configuration of FIG. 6 and the configuration of FIG. Although not shown, the configuration of FIG. 7 and the configuration of FIG. 8 may be combined.

  In FIG. 8, a current drive circuit 9 is an 8-bit gradation current drive circuit, and the constant currents I1 to I8 shown in FIG. 8 flow through the currents I1 to I8 generated by the plurality of current sources shown in FIG. .

  That is, the current drive circuit 9 is configured by connecting the selection switches SW1 to SW255 in parallel between the current output terminal OUT and the 255 current sources I1 to I8, all of which are drive current units in the current drive IC. Configure.

  In this case, the current drive units X and Y in FIG. 9 correspond to the current drive units Q and R in FIG. Here, I1 to I8 shown in FIG. 8 are different from the current weighted by the 8-bit binary weight.

  That is, when the binary weight current is 8 bits, there are eight current sources having a ratio of 128, 64, 32, 16, 8, 4, 2, 1. By selecting these by switching, a current value of 1 to 255 (1 LSB = 1 and full scale is 255 LSB) can be obtained (corresponding to n = 8 in FIG. 15).

  However, in the case of the present invention, the current values of the constant current sources I1 to I8 are equal to 1LSB (one gradation), and the current values of the constant current sources I1 to I8 are different. It depends on the gradation. For example, 1LSB = I1 up to 1-32LSB, 1LSB = I2 up to 33-64LSB, and similarly 1LSB = I8 up to 216-255LSB (see FIG. 8).

  By adjusting the current values of the constant current sources from I1 to I8, the relationship between the input signal and the drive current can be obtained as shown in a gamma characteristic diagram to be described later.

  In the current drive circuit of FIG. 8, when the current driven from the OUT terminal monotonically increases, the drive current monotonously increases by sequentially turning on SW1 to SW255 arranged in order from the left end, and thus the monotonic increase of the drive current. Is kept.

  FIG. 10 shows the configuration of the switches SW1 to SW255 of the current drive circuit. Since the switches SW1 to SW255 are 8 bits, the circuit configuration shown in FIG. 10 is obtained. If the drains and sources of the eight MOS switches are connected according to each switch, when the drive current is monotonously increased, SW1 to SW255 are used. It will be turned on one by one.

  When the drive current monotonously increases, as shown in FIG. 11, since the weights of the constant currents I1 to I8 are different, the relationship between the input signal and the drive current is a line graph showing a curve of gamma characteristics.

  This line graph can be approximated to a curve of γ = 2.2 which is a gamma characteristic by adjusting the constant currents I1 to I8 in FIG. 8, that is, by adjusting the current adjusting resistors R1 to R8 in FIG. Accordingly, gamma correction of the drive current is possible in the current drive circuit of FIG.

  Further, by adjusting the division of the digital signal covered by the constant current sources I1 to I8 in FIG. 10 (equal intervals in FIG. 11), the drive signal versus digital signal characteristic is more γ = 2.2. It can be approximated to a curve.

  That is, in FIG. 11, for example, in the region I8 where the drive current is large, the linearity is conspicuous even though it is similar to γ = 2.2. Therefore, it may be adjusted such that the range of 1LSB = I8 from 216 to 255LSB is reduced to 232 to 255LSB by narrowing the range of the digital signal covered by the constant current source I8. Conversely, since the current value of the constant current source is a current value for 1 LSB, the range of the digital signal covered by the constant current source I1 can naturally be expanded to 1 to 48 LSB.

Furthermore, by adjusting the resistors R1 to R8 in FIG. 6, the constant current sources I1 to I8 in FIG. 8 can be adjusted to change the drive current value, that is, the γ value of the line graph.
(Example 6)

Next, a sixth embodiment will be described.

  FIG. 12 shows a configuration diagram of a current source when there are three types of RGB drive current patterns for an input signal in the sixth embodiment. The current driving IC 21 includes a reference resistor Rr, first three primary color corresponding switches SWB1, SWG1, and SWR1, second three primary color corresponding switches SWB2, SWG2, and SWR2, operational amplifiers 111 and 112, reference MOS transistors 13 and 14, and current adjustment. Resistors RB, RG, and RR are provided, all of which constitute a reference current generator in the current driving IC. The first three primary color correspondence switches SWB2, SWG2, and SWR2 and the second three primary color correspondence switches SWB1, SWG1, and SWR1 are used to select a drive current amount according to the drive current and gamma characteristics. The second three primary color corresponding switch means SWB2, SWG2, and SWR2 are respectively provided between the output terminal of the operational amplifier 111 and the current limiting resistors RB, RG, and RR, and these resistors are connected to the load MOS transistor 13 of the operational amplifier 112. The

  The fifth embodiment described above is suitable when there are a plurality of drive current patterns for input signals, for example, when the drive current values and γ characteristics for the RGB (red, green, blue) light emitting elements of the display panel are different. As a current source, the current driving device 21 shows one of the current sources I1 to I8 shown in FIG.

  When current driving is performed on the R (red) light emitting element of the display panel, the current driving device 21 turns on only SWR1 and SWR2, and causes IR to flow through the resistor RR of the current source.

  When current driving is performed on the G (green) light emitting element of the display panel, only SWG1 and SWG2 are turned on, and IG is passed through the resistor RG of the current source.

  When current drive is performed on the B (blue) light emitting element of the display panel, only SWB1 and SWB2 are turned on, and IB is caused to flow through the resistor RB of the current source.

  As described above, by switching the switch according to the circuit configuration of the current driving device 21, it is possible to create a characteristic that the driving current changes with respect to the input signal in accordance with RGB.

  At this time, the difference in the circuit configuration between the sixth embodiment and the fifth embodiment described above is only the six switches in FIG. 12 and the resistors RR, RG, and RB. The current drive circuit of the sixth embodiment is exactly the same as the current drive circuit 9 shown in FIG. Therefore, it is possible to produce a current driving IC that performs current driving corresponding to each of R, G, and B with a slight change in circuit configuration and chip area.

  As described above, the current driving device for a display panel according to the present invention causes one external reference current source and a voltage drop due to the reference current flowing through the external reference current source to emit light from the display element on the display device. A reference resistor provided between two terminals in the current drive IC in order to make the luminance uniform, and each reference resistor in the plurality of current drive ICs and one external reference current source are cascade-connected. Configured. Therefore, a highly accurate drive current can be output from the current driver to the display panel, and gamma correction can be applied to the drive current, which contributes to product differentiation in the display panel current driver market.

  Here, those skilled in the art will recognize that the present invention is not limited to the above-described embodiments and descriptions, and can be modified or changed without departing from the technical idea and technical scope of the appended claims. Will be understood.

  For example, in FIG. 9, the current driving IC 10 is configured to suck the driving current through the output terminal, but a configuration in which the driving current is discharged through the output terminal as in the current driving IC 60 illustrated in FIG. 13 is also possible. The current driving IC 60 can be configured by replacing the inverting input terminal and the non-inverting input terminal of the operational amplifier of the current driving IC 10 and using the N-channel reference MOS transistor as a P-channel reference MOS transistor. In the drive current device configured to discharge drive current, a plurality of current drive ICs 60 are cascade-connected, and the reference current IREF from the external reference current source is between the high potential power supply VDD and the current drive IC 60 on the highest potential side. Inserted.

It is the figure which showed the relationship between the current drive IC in the 1st Embodiment of this invention, and a display panel. It is a structure of the current drive IC in the 1st Embodiment of this invention. It is a structure of the current source in the current drive IC in the first embodiment of the present invention. It is a voltage drop adjustment circuit diagram in the 2nd Embodiment of this invention. (A) is a voltage characteristic view of a voltage drop adjustment circuit, (b) is a schematic diagram which shows the bias state of a current drive device when the voltage characteristic of a voltage drop adjustment circuit is measured. It is a figure for showing the several current source in the current drive IC in the 3rd Embodiment of this invention. It is a structure of the current drive circuit in the modification of the 4th Embodiment of this invention. It is a structure of the current drive circuit in the 5th Embodiment of this invention. It is the structure which combined the current source and current drive circuit in the 5th Embodiment of this invention. It is the structure of the switch of a current drive circuit. It is a figure which shows the gamma characteristic of the relationship of the drive current with respect to an input signal. This is a configuration of a current drive IC when there are three types of drive currents corresponding to the three primary colors RGB in response to input signals in the sixth embodiment of the present invention. FIG. 10 is a circuit diagram of a current driving IC for illustrating that the current driving device of the present invention can employ not only the current sink type current driving IC of FIG. 9 but also a current discharge type current driving IC. It is the structure of the current drive device which connects several conventional current drive ICs. This is a configuration of a general current driving circuit.

Explanation of symbols

1-4, 8, 10, 21, 58, 60 Current drive IC
5 Reference current source 6 Display panel 7 Voltage drop adjustment circuit 9 Current drive circuit 13, 14, 131-138, 141-148, 161-168 Reference MOS transistor 22 Current output unit 23 Sink current adjustment unit 71, 74 P channel type MOS Transistor 72 Constant current source 73 Inverter 75 N-channel MOS transistor 101, 102 Terminals 111, 112, 113, 114, 115, 116, 117, 118, 119 Operational amplifier I Internal reference currents I1-I8 Constant current source IREF Reference current R, R1, R2, R3, R4, R5, R6, R7, R8 Current adjustment resistor Rr Reference resistor Rv Step-down resistor R1, R2-R8, RB, RG, RR Current limiting resistor SW1-SW255 Select switch SWB1, SWG1, SWR1 No. 1 for the three primary colors SWB2, SWG2, WR2 second three primary colors corresponding switch VDD high-potential power supply GND low-potential power supply Vr voltage drop V3 inverting input terminal voltage V4 non-inverting input terminal voltage VOUT step-down voltage output terminal ΔVos offset voltage X, Y, P, Q current driving portions

Claims (19)

A plurality of cascaded current drive circuits; and
A reference current source for supplying a reference current to the plurality of current drive circuits from the outside of the plurality of current drive circuits,
Each of the plurality of current drive circuits includes:
A reference current generating unit including a reference resistor and generating at least one internal reference current that flows in response to the reference current; and adding a desired number of the at least one internal reference current to the display panel Output to the display element,
The reference current generation unit includes a first operational amplifier as a voltage follower that outputs a voltage on the high potential power supply side of the reference resistor, and a plurality of second operational amplifiers as voltage followers that output a voltage on the low potential power supply side of the reference resistor. An operational amplifier, and the reference current generator applies an output of the first operational amplifier and an output of a corresponding one of the plurality of second operational amplifiers to both ends of each of the at least one current adjustment resistor. A current driving device for a display panel, characterized by generating a corresponding internal reference current among at least one internal reference current .   The reference current generation unit further includes at least one current adjustment resistor, and a reference voltage generated across the reference resistor is applied to each of the at least one current adjustment resistor to generate the at least one internal reference current. Item 6. A display panel current driver according to Item 1.   The reference resistor of the current drive circuit on the highest potential side of the plurality of current drive circuits is connected to a high potential power supply through a voltage adjustment resistor, and the reference resistor of the current drive circuit on the lowest potential side of the plurality of current drive circuits is the reference current 3. The display panel current driving device according to claim 1, wherein the current driving device is connected to a source.   Each of the plurality of current drive circuits has a voltage adjustment circuit connected to the high potential power supply side of the reference resistor, and when the plurality of current drive circuits are biased, of the plurality of current drive circuits 3. The display panel current drive device according to claim 1, wherein only the voltage adjustment circuit of the current drive circuit on the highest potential side causes a voltage drop, and the remaining current drive circuit is a short circuit.   The voltage adjustment circuit includes a high potential terminal and a low potential terminal, a step-down resistor connected between the high potential terminal and the low potential terminal, and first and second conductive types connected in parallel to the step-down resistor. And a plurality of current drive circuits for stepping down a voltage adjustment circuit of a current drive circuit on the highest potential side of the plurality of current drive circuits when the plurality of current drive circuits are biased. 5. The display panel current drive according to claim 4, wherein a voltage drop occurs only in the resistor, and the voltage adjustment circuit of the remaining current drive circuit is configured to be a short circuit by turning on at least one of the first and second MOS transistors. apparatus. The reference current generation unit further includes a reference current unit between each of the at least one current adjustment resistor and the low potential power source, and outputs an output of a corresponding one of the plurality of second operational amplifiers. 6. The display panel current drive according to claim 2 , wherein when the current reference section is input to the current section, the corresponding internal reference current of the at least one internal reference current is caused to flow to the low potential power source. 7. apparatus. Each of the plurality of current driving circuits further includes at least one current driving unit, and each of the at least one current driving unit mirrors one internal reference current of the at least one internal reference current to provide a plurality of current driving units. of generating a mirror current, a current driving device for a display panel according to any one of claims 1 to 6 and outputs the sum of the desired number of mirror current of the plurality of mirror current. Each of the at least one current driver further includes a plurality of switches corresponding to the plurality of mirror currents, and the plurality of switches are selected and turned on / off to sum the desired number of mirror currents. Item 8. A display panel current driver according to Item 7 . Each of the at least one current driver further includes a plurality of switches corresponding to the plurality of mirror currents, selects the plurality of switches to be turned on / off, and sums the desired number of mirror currents. 8. The display according to claim 7 , wherein each of the current driving circuits is configured to determine a luminance of light emitted from the display element by summing at least one set of the desired number of mirror currents and outputting the sum to the display element. Panel current drive. Three sub-resistors are provided corresponding to three primary colors as each of the at least one current adjustment resistor, and a switch circuit for selecting three primary colors is provided between the three sub-resistors and the first operational amplifier. Item 10. The display panel current driver according to any one of Items 2 to 9 . The switch circuit is provided between a first switch group provided between the three sub resistors and the output of the first operational amplifier, and between the three sub resistors and an inverting input terminal of the first operational amplifier. 11. The current driving device for a display panel according to claim 10 , further comprising a second switch group. A reference current generator that includes a reference resistor and generates at least one internal reference current by flowing a reference current from the outside to the reference resistor, and sums up the desired number of the at least one internal reference current. Output ,
The reference current generation unit outputs at least one current adjustment resistor, a first operational amplifier as a voltage follower that outputs a voltage on the high potential power source side of the reference resistor, and a voltage on the low potential power source side of the reference resistor A plurality of second operational amplifiers as voltage followers, wherein the reference current generating unit includes an output of the first operational amplifier and a corresponding one of the plurality of second operational amplifiers at each end of the at least one current adjustment resistor. The output of the power supply is applied to generate a corresponding internal reference current among the at least one internal reference current.
Current drive circuit for a display panel, characterized in that. The reference current generation unit further includes a reference current unit between each of the at least one current adjustment resistor and the low potential power source, and outputs an output of a corresponding one of the plurality of second operational amplifiers. 13. The current driving circuit for a display panel according to claim 12 , wherein an internal reference current corresponding to one of the at least one internal reference currents is supplied to the low potential power source by inputting to the current section. Further, at least one current driving unit is provided, each of the at least one current driving unit mirrors one internal reference current of the at least one internal reference current to generate a plurality of mirror currents, and 14. The display panel current drive circuit according to claim 12 , wherein a desired number of mirror currents of the mirror currents are summed and output. Each of the at least one current driver further includes a plurality of switches corresponding to the plurality of mirror currents, and the plurality of switches are selected and turned on / off to sum the desired number of mirror currents. current drive circuit for a display panel of claim 14, wherein. Three sub-resistors are provided corresponding to three primary colors as each of the at least one current adjustment resistor, and a switch circuit for selecting three primary colors is provided between the three sub-resistors and the first operational amplifier. Item 16. The current driving circuit for a display panel according to any one of Items 12 to 15 . A first resistor connected between the first terminal and the second terminal, the first terminal and the second terminal, to which a reference current generated by a reference current source is input, and a first resistor in response to the reference current comprising a current generating circuit for generating a first current, a,
The current generating circuit responds to a voltage appearing at one end of the second resistor and the first resistor, and a voltage applying circuit for applying a driving voltage to one end of the second resistor, and appears at the other end of the first resistor A first drive circuit that responds to a voltage and drives the other end of the second resistor to flow the first current through the second resistor;
The voltage of one end of the first resistor is applied to one end of the second resistor, and the voltage of the other end of the first resistor is applied to the other end of the second resistor. apparatus. The current generating circuit is further responsive to a third resistor having one end applied with the driving voltage and the voltage appearing at the other end of the first resistor, and driving the third resistor to generate a second current. The apparatus of Claim 17 provided with the 2nd drive circuit which flows through 3 resistance. An output terminal, a first switch that supplies the first current to the output terminal when activated by being connected between the first drive circuit and the output terminal, and between the second drive circuit and the output terminal The apparatus according to claim 18 , further comprising: a second switch that supplies the second current to the output terminal when activated by being connected to the terminal.

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