JP2012164863A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method and a semiconductor device which can more easily achieve downsizing.SOLUTION: A semiconductor device A4 provided by the present invention comprises a plurality of terminals 41, 42, a first semiconductor chip 21, a second semiconductor chip 22 provided on the first semiconductor chip 21, and an encapsulation resin 1 covering the first semiconductor chip 21, the second semiconductor chip 22 and the plurality of terminals 41, 42. The plurality of terminals 41, 42 include the first terminal 41 connected with the first semiconductor chip 21 and the second terminal 42 connected with the second semiconductor chip 22. Bottom faces 41a, 42a in a thickness direction of the plurality of terminals 41, 42 are exposed on the encapsulation resin 1.

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

  Conventionally, semiconductor devices in the form of packages called SON (Small Outline Non-leaded Package) and QFN (Quad Flat Non Leaded Package) have been widely manufactured. FIG. 29 shows a cross-sectional view of an example of a QFN type semiconductor device (see Patent Document 1). A semiconductor device X shown in FIG. 29 includes a resin case 91, base leads 92, a semiconductor chip 93, lead terminals 94, and connection wires 95. The semiconductor chip 93 is fixed to the base lead 92 and is connected to the lead terminal 94 via the connection wire 95. Such a semiconductor device X is manufactured using a lead frame. The lead frame is manufactured by forming a metal plate having a thickness of about 0.2 mm into a desired pattern by punching or etching with a precision press.

  When manufacturing the semiconductor device X using the lead frame, the semiconductor chip 93 is installed on the base lead 92, the semiconductor chip 93 and the lead terminal 94 are connected by the connection wire 95, and then the lead frame is attached by the resin case 91. cover. Thereafter, unnecessary lead frame portions are cut and removed.

  Along with miniaturization of various electronic devices, miniaturization and high functionality of the semiconductor device X are required. One way to reduce the size is to reduce the thickness of the semiconductor device X. In reducing the thickness of the semiconductor device X, the thickness of the base lead 92 and the lead terminal 94 is a disadvantageous factor. For this reason, it has been proposed to manufacture a packaged semiconductor device without using a lead frame. For example, a technique is known in which a terminal is formed by plating on a metal base and the base is removed by etching later.

  However, when the terminal is formed by plating as described above without using the lead frame, the thickness of the terminal is about 20 μm, which may be easily dropped from the resin case. In manufacturing a semiconductor device without using a lead frame, securing the pull-out strength of the terminal is an issue.

JP 2009-246395 A

  The present invention has been conceived under the circumstances described above, and it is an object of the present invention to provide a method for manufacturing a semiconductor device and a semiconductor device that can be easily miniaturized.

  The semiconductor device provided by the first aspect of the present invention includes a plurality of terminals, a first semiconductor chip, a second semiconductor chip installed on the first semiconductor chip, and the first semiconductor chip. , The second semiconductor chip, and a sealing resin covering the plurality of terminals, wherein the plurality of terminals are connected to the first semiconductor chip and the second terminal. And a second terminal connected to the semiconductor chip, wherein one surface in the thickness direction of the plurality of terminals is exposed from the sealing resin.

  In a preferred embodiment, a support member that supports one surface in the thickness direction of the first semiconductor chip is provided, and one surface in the thickness direction of the support member is exposed from the sealing resin. Yes.

  For example, the support member is made of silver.

  In a preferred embodiment, the first semiconductor chip has a first electrode terminal on the other surface in the thickness direction, and connects the first electrode terminal and the first terminal. One wire is provided.

  Preferably, the first terminal has an opening filled with the sealing resin.

  In another preferred embodiment, the first terminal is arranged at a position overlapping the first semiconductor chip in the thickness direction view, and the first semiconductor chip is arranged on one side in the thickness direction. A first electrode terminal is provided on the end face, and a conductive connection member is provided for connecting the first electrode terminal and the first terminal.

  For example, the conductive adhesive member is a solder bump.

  In a more preferred embodiment, one surface in the thickness direction of the second semiconductor chip is fixed to the first semiconductor chip, and the second semiconductor chip is the other surface in the thickness direction. A second electrode terminal, and a second wire for connecting the second electrode terminal and the second terminal.

  In a more preferred embodiment, a fixing member for joining the second semiconductor chip and the first semiconductor chip is provided.

  For example, the fixing member is a DAF tape.

  More preferably, the second terminal has an opening filled with the sealing resin.

  The method for manufacturing a semiconductor device provided by the second aspect of the present invention includes a step of forming a plurality of terminals on a base, a step of installing a first semiconductor chip on the base, and the first semiconductor A step of placing a second semiconductor chip on the chip, a step of sealing the first semiconductor chip, the second semiconductor chip and the plurality of terminals with a resin, and a step of removing the base. It is characterized by having.

  Preferably, the step of forming a plurality of terminals on the base includes a step of performing an electroless plating process on the base.

  In a preferred embodiment, the first semiconductor chip has a first electrode terminal on an end face far from the base in the thickness direction of the plurality of terminals, and the first semiconductor is mounted on the base. The step of installing the chip includes a step of bonding an end surface of the first semiconductor chip closer to the base in the thickness direction to the base via an adhesive member, the first electrode terminal, Connecting any of the plurality of terminals with a first wire.

  For example, the adhesive member is a silver paste.

  In a preferred embodiment, the step of forming the plurality of terminals on the base includes a step of forming openings that expose the base in the thickness direction of the base in the plurality of terminals.

  In another preferred embodiment, the first semiconductor chip has a first electrode terminal on an end surface closer to the base in the thickness direction of the plurality of terminals, and the first base has a first electrode. The step of installing the semiconductor chip includes a step of connecting any one of the first electrode terminal and the plurality of terminals with a conductive connecting member.

  For example, the conductive connection member is a solder bump.

  In another preferred embodiment described above, in the preferred embodiment, in the step of forming the plurality of terminals on the base, the plurality of terminals may be formed in a lattice shape.

  In a more preferred embodiment, the second semiconductor chip has a second electrode terminal on an end surface far from the base in the thickness direction of the plurality of terminals, and the second electrode terminal A step of connecting any one of the plurality of terminals with a second wire;

  In a more preferred embodiment, in the step of installing the second semiconductor chip on the first semiconductor chip, an end surface of the first semiconductor chip farther from the base in the thickness direction of the plurality of terminals, The end surface of the second semiconductor chip closer to the base is joined by a fixing member.

  For example, the fixing member is a DAF tape.

  According to such a manufacturing method, a semiconductor device incorporating a plurality of semiconductor chips can be manufactured smoothly. A semiconductor device is used by being incorporated in an electronic circuit. The structure in which a plurality of semiconductor chips as described above are stacked is preferable for increasing the number of semiconductor chips per unit area on an electronic circuit. Furthermore, since it has the process of removing the base corresponding to the lead in the semiconductor device X shown in the conventional description, the semiconductor device using the manufacturing method described above can suppress an increase in thickness.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

1 is a plan view showing a semiconductor device according to a first embodiment of the present invention. It is sectional drawing which follows the II-II line | wire of FIG. FIG. 2 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 7 is a plan view of a principal portion showing a state where terminals are formed on a base in the example of the method for manufacturing the semiconductor device of FIG. 1. FIG. 7 is a plan view of relevant parts showing a state where a semiconductor chip is mounted in an example of the method for manufacturing the semiconductor device of FIG. 1. FIG. 7 is a plan view of relevant parts showing a state where a semiconductor chip and a terminal are connected by a wire in the example of the method for manufacturing the semiconductor device of FIG. 1; FIG. 3 is a cross-sectional view of a principal part showing a state where a sealing resin is formed in an example of the method for manufacturing the semiconductor device of FIG. 1. FIG. 3 is a cross-sectional view of a principal part showing a state where a base is removed in an example of the method for manufacturing the semiconductor device of FIG. 1. It is a bottom view which shows the semiconductor device based on 2nd Embodiment of this invention. It is a bottom view which shows the semiconductor device based on 3rd Embodiment of this invention. It is a top view which shows the semiconductor device based on 4th Embodiment of this invention. It is sectional drawing which follows the XII-XII line | wire of FIG. 12 is an essential part plan view showing a state in which terminals are formed on a base in the example of the method for manufacturing the semiconductor device of FIG. FIG. 12 is a plan view of relevant parts showing a state where a semiconductor chip is mounted in an example of the method for manufacturing the semiconductor device of FIG. 11; FIG. 12 is a plan view of relevant parts showing a state where an additional semiconductor chip is mounted in the example of the method for manufacturing the semiconductor device of FIG. 11. 12 is an essential part plan view showing a state in which a semiconductor chip and a terminal are connected by a wire in the example of the method for manufacturing the semiconductor device of FIG. FIG. 12 is an essential part plan view showing a state where an additional semiconductor chip and a terminal are connected by an additional wire in the example of the method for manufacturing the semiconductor device of FIG. 11; It is a top view which shows the semiconductor device based on 5th Embodiment of this invention. It is sectional drawing which follows the XIX-XIX line | wire of FIG. FIG. 19 is a bottom view of the semiconductor device shown in FIG. 18. FIG. 19 is a plan view of a principal portion showing a state in which terminals are formed on a base in the example of the method for manufacturing the semiconductor device of FIG. 18. FIG. 19 is an essential part plan view showing a state where a first semiconductor chip is mounted in an example of the method for manufacturing the semiconductor device in FIG. 18; It is sectional drawing which follows the XXIII-XXIII line | wire of FIG. FIG. 19 is an essential part cross-sectional view showing a state in which a second semiconductor chip is mounted in an example of the method for manufacturing the semiconductor device of FIG. 18; FIG. 19 is an essential part cross-sectional view showing a state where a third semiconductor chip is mounted in an example of the method for manufacturing the semiconductor device of FIG. 18; FIG. 19 is a substantial part plan view showing a state in which the second and third semiconductor chips and the terminals are connected by wires in the example of the method for manufacturing the semiconductor device of FIG. 18; It is a top view which shows the semiconductor device based on 6th Embodiment of this invention. It is sectional drawing which follows the XXVIII-XXVIII line of FIG. It is sectional drawing which shows an example of the conventional semiconductor device.

  Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the drawings.

  1 to 3 show a semiconductor device according to a first embodiment of the present invention. The semiconductor device A1 of this embodiment includes a sealing resin 1, a semiconductor chip 2, a support member 3, ten terminals 4, and ten wires 5. The sealing resin 1 is, for example, black and cannot be seen from the outside, but for the sake of convenience of explanation, FIG. 1 shows the inside of the sealing resin 1. The x, y, and z directions used in the following description are directions orthogonal to each other, and the z direction is the thickness direction of the sealing resin 1, the semiconductor chip 2, the support member 3, and the terminal 4. In the following, the lower side in FIG. 2 in the z direction is the bottom side, and the upper side in FIG. 2 is the front side.

  The sealing resin 1 completely covers the semiconductor chip 2 and each wire 5, and covers the support member 3 and each terminal 4 so that the bottom surface 3a of the support member 3 and the bottom surface 4a of each terminal 4 are exposed. The sealing resin 1 is made of, for example, an epoxy resin and is formed in a rectangular parallelepiped shape that extends long in the x direction shown in FIG. As an example, the x direction dimension of the sealing resin 1 is 2.10 mm, the y direction dimension is 1.60 mm, and the z direction dimension is 0.35 to 0.4 mm. These dimensions can be appropriately changed according to the size of the semiconductor chip 2.

  The semiconductor chip 2 is made of a semiconductor material such as Si, and a fine circuit is formed inside. The bottom surface 2 a of the semiconductor chip 2 is fixed to the support member 3. Ten electrode terminals 201 are provided on the surface 2 b of the semiconductor chip 2. The ten electrode terminals 201 are arranged in a rectangular shape when viewed in the z direction. Each electrode terminal 201 is connected to a fine circuit in the semiconductor chip 2. The semiconductor chip 2 is used by being incorporated in an electronic circuit, for example. At that time, the semiconductor chip 2 exhibits its function by connecting each electrode terminal 201 to the wiring in the electronic circuit. The number of electrode terminals 201 can be changed as appropriate according to the function of the semiconductor chip 2.

  The support member 3 is made of, for example, silver and has a substantially rectangular shape in the z direction as illustrated in FIGS. 1 and 3 and is disposed at the center in the x and y directions of the semiconductor device A1. Furthermore, as shown in FIG. 2, the bottom surface 3 a of the support member 3 is in the same position as the bottom surface 1 a of the sealing resin 1 in the z direction.

  The ten terminals 4 are arranged in a rectangular shape surrounding the semiconductor chip 2 as shown in FIG. Each terminal 4 is formed in a rectangular shape as viewed in the z direction, and is connected to each electrode terminal 201 by a gold wire 5. In order to prevent improper contact when the wire 5 is installed, the terminals 4 are separated from each other by about 0.50 mm, for example. In order to ensure such an interval, the pair of terminals 4 arranged at the center in the y direction are arranged so as to extend long in the x direction, and the other terminals 4 are arranged so as to extend long in the y direction. Yes. The length of each terminal 4 in the longitudinal direction is, for example, 0.35 mm. Note that the number of terminals 4 corresponds to the number of electrode terminals 201 of the semiconductor chip 2 and can be changed as appropriate according to the function of the semiconductor chip 2.

  Although omitted in FIG. 2 for simplification, each terminal 4 is constituted by a plurality of metal layers laminated by, for example, electroless plating. Preferred examples of the plurality of metal layers constituting each terminal 4 are a gold layer, a nickel layer, and a palladium layer. At this time, a gold layer is disposed on the bottom surface 4a side, a nickel layer is disposed in the center, and a palladium layer is disposed on the surface 4b side. Such a terminal 4 has a thickness of, for example, 0.015 mm.

  Each terminal 4 is provided with an opening 401. In the example illustrated in FIG. 1, the opening 401 has a circular shape in the z direction and is formed so as to penetrate in the z direction. Each opening 401 is filled with sealing resin 1. The diameter of the opening 401 is about 0.06 to 0.07 mm. As shown in FIG. 1, the opening 401 in each terminal 4 is formed near the end closer to the semiconductor chip 2 in the longitudinal direction of each terminal 4.

  Each terminal 4 includes a pad portion 402 to which the wire 5 is connected. The pad portion 402 is a region including an end portion far from the semiconductor chip 2 in the longitudinal direction of each terminal 4. The length of each terminal 4 in each pad portion 402 in the longitudinal direction is, for example, 0.21 mm. The length of the pad portion 402 is selected to be a desirable length for properly arranging the wires 5. The opening 401 described above is disposed at a position closer to the semiconductor chip 2 in the longitudinal direction of each terminal 4 than the pad portion 402 so as not to disturb the arrangement of the wires 5. The pad portion 402 is set at a relatively far position from the semiconductor chip 2 because the wire 5 is easier to install.

  Next, an example of a manufacturing method of the semiconductor device A1 will be described below with reference to FIGS.

  The base 6 is used for manufacturing the semiconductor device A1. The base 6 is a copper plate having a thickness in the z direction of about 0.125 mm, for example. The base 6 has a rectangular shape including a large number of semiconductor devices A1 when viewed in the z direction.

  When manufacturing the semiconductor device A <b> 1, first, the base 6 is prepared, and the process of forming the terminals 4 on the surface of the base 6 is performed. In the step of forming the terminals 4, a metal plating layer is formed on the entire surface of the base 6 by, for example, electroless plating. Thereafter, the metal plating layer is formed into a desired shape by etching. By doing in this way, many terminals 4 can be formed on the base 6, as shown in FIG.

  Next, a step of installing the semiconductor chip 2 on the base 6 is performed. FIG. 5 shows a state where the semiconductor chip 2 is installed on the base 6. In this step, first, a step of attaching an adhesive material made of silver paste to the bottom surface of the semiconductor chip 2 is performed. Next, as shown in FIG. 5, a step of installing the semiconductor chip 2 in a region surrounded by the terminals 4 is performed. The support member 3 is obtained by curing the adhesive material.

  Next, the process of connecting the semiconductor chip 2 and each terminal 4 with the wire 5 is performed. FIG. 6 shows a state after the wire 5 is connected. As shown in FIG. 6, each semiconductor chip 2 is provided with ten electrode terminals 201. In this step, the wire 5 is connected between each electrode terminal 201 and the pad portion 402 of each terminal 4. This step can be performed, for example, using a commercially available wire bonding capillary.

  Next, a step of forming the sealing resin 1 is performed. FIG. 7 shows a state after the sealing resin 1 is formed. This step can be performed by, for example, a transfer mold method. In this method, the base 6 is installed in a mold, and a process of pouring liquefied epoxy resin into the mold is performed. At this time, the liquefied epoxy resin also flows into the opening 401.

  Next, a step of removing the base 6 is performed. FIG. 8 shows a state after the base 6 is removed. The step of removing the base 6 is performed by etching the base 6 from the bottom surface side. The etching treatment may be performed by mechanical polishing or may be performed using a liquid agent that melts copper. By this step, as shown in FIG. 8, the bottom surface 3 a of the support member 3 and the bottom surface 4 a of each terminal 4 are exposed to the bottom surface 1 a side of the sealing resin 1.

  In the state shown in FIG. 8, the sealing resin 1 is the same size as the base 6 in the z-direction view. By cutting the sealing resin 1 of FIG. 8, the semiconductor device A1 shown in FIG. 1 can be obtained.

  Next, the operation of the semiconductor device A1 and the manufacturing method thereof will be described.

  Since each terminal 4 is formed on the surface of the base 6 by plating, the thickness of each terminal 4 is thinner than the thickness of the terminal 94 of the semiconductor device X shown in the conventional description. The manufacturing method described above has a preferable configuration for reducing the thickness.

  In this embodiment, each terminal 4 is provided with an opening 401, and the opening 401 is filled with the sealing resin 1, and each terminal 4 and the sealing resin are compared with the case where the opening 401 is not provided. The area in contact with 1 is large. For this reason, the frictional force acting between each terminal 4 and the sealing resin 1 is large, and each terminal 4 is difficult to drop off from the sealing resin 1. Therefore, according to the configuration of the semiconductor device A1, it is possible to solve the problem caused by making each terminal 4 thinner and to improve the reliability.

  In the present embodiment, the bottom surface 3 a of the support member 3 on which the semiconductor chip 2 is mounted is exposed from the sealing resin 1. Furthermore, the support member 3 is made of silver and has excellent thermal conductivity. Accordingly, heat generated when the semiconductor chip 2 is driven is quickly released to the outside of the semiconductor device A1 through the support member 3.

  9 to 28 show another embodiment of the present invention. In these drawings, the same or similar elements as those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.

  FIG. 9 shows a semiconductor device according to the second embodiment of the present invention. In the semiconductor device A2 of this embodiment, the shape of the opening 401 of each terminal 4 is different from that of the semiconductor device A1, and other configurations are the same as those of the semiconductor device A1.

  As shown in FIG. 9, the opening 401 in the present embodiment has a rectangular shape as viewed in the z direction, and is formed so as to be recessed from the long side of each terminal 4 in the short direction. In the example shown in FIG. 9, the center terminal 4 in the y direction has openings 401 on both sides in the y direction. This is because the center terminal 4 is easier to secure the width than the other terminals 4. If a sufficient width can be secured, the openings 401 may be provided on both sides of the other terminals 4.

  FIG. 10 shows a semiconductor device according to the third embodiment of the present invention. In the semiconductor device A3 of the present embodiment, the shape of each terminal 4 and the opening 401 is different from that of the semiconductor device A1, and other configurations are the same as those of the semiconductor device A1.

  Note that the shape of the opening 401 illustrated in FIG. 10 is an example. The opening 401 in the present embodiment may be any shape that is recessed inward from the edge of each terminal 4 and may have any shape as viewed in the z direction. Further, in the example shown in FIG. 10, the opening 401 is recessed in the longitudinal direction from the short side of each terminal 4, but may have a shape recessed in the lateral direction from the long side.

  As shown in FIG. 10, each terminal 4 in the present embodiment has a shape in which the width in the short-side direction becomes shorter as the distance from the semiconductor chip 2 increases in the longitudinal direction. Each opening 401 is formed so as to be recessed in the longitudinal direction from an end edge closer to the semiconductor chip 2 in the longitudinal direction of each terminal 4.

  According to this embodiment, the opening 401 can be made relatively large. This is a preferable configuration for increasing the contact area between each terminal 4 and the sealing resin 1.

  11 and 12 show a semiconductor device according to the fourth embodiment of the present invention. The semiconductor device A4 of this embodiment includes a sealing resin 1, two semiconductor chips 21, 22, a support member 31, a fixing member 32, 32 terminals 41, 36 terminals 42, 32 wires 51, and 36. A wire 52 is provided.

  The sealing resin 1 completely covers the semiconductor chips 21 and 22, the fixing member 32 and the wires 51 and 52, and supports the bottom surface 31 a of the support member 31 and the bottom surfaces 41 a and 42 a of the terminals 41 and 42. 31 and the terminals 41 and 42 are covered. The sealing resin 1 is made of, for example, an epoxy resin and is formed in a square shape as viewed in the z direction.

  The semiconductor chip 21 is made of a semiconductor material such as Si, and a fine circuit is formed inside. The bottom surface 21 a of the semiconductor chip 21 is fixed to the support member 31. 32 electrode terminals 211 are provided on the surface 21 b of the semiconductor chip 21. The 32 electrode terminals 211 are arranged in a rectangular shape when viewed in the z direction. Each electrode terminal 211 is connected to a fine circuit in the semiconductor chip 21. The semiconductor chip 21 is used by being incorporated in an electronic circuit, for example. At that time, the semiconductor chip 21 exhibits its function by connecting each electrode terminal 211 to the wiring in the electronic circuit. The number of electrode terminals 211 can be changed as appropriate according to the function of the semiconductor chip 21.

  Support member 31 is formed of, for example, silver paste. As shown in FIG. 11, the support member 31 has a substantially rectangular shape when viewed in the z direction, and is disposed at the center in the x and y directions of the semiconductor device A4. Furthermore, as shown in FIG. 12, the bottom surface 31 a of the support member 31 is in the same position as the bottom surface 1 a of the sealing resin 1 in the z direction.

  The semiconductor chip 22 is made of a semiconductor material such as Si, and a fine circuit is formed inside. The semiconductor chip 22 is smaller in size as viewed in the z direction than the semiconductor chip 21. The bottom surface 22 a of the semiconductor chip 22 is fixed to the surface 21 b of the semiconductor chip 21 through a fixing member 32. 36 electrode terminals 221 are provided on the surface 22 b of the semiconductor chip 22. The 36 electrode terminals 221 are arranged in a rectangular shape when viewed in the z direction. Each electrode terminal 221 is connected to a fine circuit in the semiconductor chip 22. The semiconductor chip 22 is used together with the semiconductor chip 21 in an electronic circuit. At that time, the semiconductor chip 22 exhibits its function by connecting each electrode terminal 221 to the wiring in the electronic circuit. The number of electrode terminals 221 can be changed as appropriate according to the function of the semiconductor chip 22.

  The fixing member 32 is, for example, a die attach film tape (hereinafter referred to as a DAF tape). As shown in FIG. 11, the fixing member 32 has a substantially rectangular shape as viewed in the z direction, and is disposed inside a rectangular frame formed by the 32 electrode terminals 211.

  The 32 terminals 41 are arranged in a frame shape surrounding the semiconductor chips 21 and 22 as shown in FIG. In the example shown in FIG. 11, the 32 terminals 41 are divided into four columns of eight terminals 41. In two of the four columns, the eight terminals 41 are arranged along the x direction, and in the other two columns, they are arranged along the y direction. Each terminal 41 has a rectangular shape when viewed in the z direction, and the arrangement direction is the short direction of each terminal 41. Each terminal 41 has an opening 401 and a pad portion 402, like each terminal 4 in the semiconductor device A1 described above. Each pad portion 402 of each terminal 41 is connected to each electrode terminal 211 by a gold wire 51. The number of terminals 41 corresponds to the number of electrode terminals 211 of the semiconductor chip 21 and can be changed as appropriate according to the function of the semiconductor chip 21. The wire 51 corresponds to the first wire in the present invention.

  As shown in FIG. 11, the 36 terminals 42 are arranged in a frame shape surrounding a frame created by the 32 terminals 41. In the example shown in FIG. 11, the 36 terminals 42 are divided into four columns of nine terminals 42. Nine terminals 42 are arranged along the x direction in two of the four rows, and are arranged along the y direction in the other two rows. Each terminal 42 has a rectangular shape viewed in the z direction, and the arrangement direction is a short direction of each terminal 42. Each terminal 42 has an opening portion 401 and a pad portion 402, like the respective terminals 4 in the semiconductor device A1 described above. Each pad portion 402 of each terminal 42 is connected to each electrode terminal 221 by a gold wire 52. The number of terminals 42 corresponds to the number of electrode terminals 221 of the semiconductor chip 22 and can be changed as appropriate according to the function of the semiconductor chip 22. The wire 52 corresponds to the second wire in the present invention.

  Although omitted in FIG. 12 for the sake of simplicity, each of the terminals 41 and 42 is composed of a plurality of metal layers like the terminal 4 in the semiconductor device A1. The thickness of each of such terminals 41 and 42 is, for example, 0.015 mm.

  Next, an example of a manufacturing method of the semiconductor device A4 will be described below with reference to FIGS.

  When manufacturing the semiconductor device A4, the base 6 is used as in the case of the semiconductor device A1.

  When manufacturing the semiconductor device A4, first, the base 6 is prepared, and the process of forming the terminals 41 and 42 on the surface of the base 6 is performed. FIG. 13 shows a state in which the terminals 41 and 42 are formed. This step can be performed by performing an electroless plating process similarly to the case of forming the terminal 4 of the semiconductor device A1, and then forming the opening 401. In this step, a covering member that exposes the terminals 41 and 42 is installed on the base 6.

  Next, a process of installing the semiconductor chip 21 on the base 6 is performed. FIG. 14 shows a state where the semiconductor chip 21 is installed on the base 6. In this step, first, a step of attaching an adhesive material made of silver paste to the bottom surface of the semiconductor chip 21 is performed. Next, as shown in FIG. 14, the semiconductor chip 21 is installed in a region surrounded by the terminals 41. The support member 31 is formed by curing the adhesive material.

  Next, a step of installing the semiconductor chip 22 on the semiconductor chip 21 is performed. FIG. 15 shows a state where the semiconductor chip 22 is installed on the semiconductor chip 21. In this step, first, a step of attaching a DAF tape to the bottom surface of the semiconductor chip 22 is performed. Next, as shown in FIG. 15, the semiconductor chip 22 is installed in a region surrounded by each electrode terminal 211. The DAF tape is the fixing member 32.

  Next, the process of connecting the semiconductor chip 21 and each terminal 41 with the wire 51 is performed. FIG. 16 shows a state after the wire 51 is installed. As shown in FIG. 16, the semiconductor chip 21 is provided with 32 electrode terminals 211. In this step, the wire 51 is installed between each electrode terminal 211 and the pad portion 402 of each terminal 41. The wire 51 can be installed using a commercially available wire bonding capillary, for example.

  Next, the process of connecting the semiconductor chip 22 and each terminal 42 with the wire 52 is performed. FIG. 17 shows a state after the wire 52 is connected. As shown in FIG. 17, the semiconductor chip 22 is provided with 36 electrode terminals 221. In this step, each electrode terminal 221 and the pad portion 402 of each terminal 42 are connected by a wire 52. This step can be performed, for example, using a commercially available wire bonding capillary.

  Next, a step of forming the sealing resin 1 is performed. This step can be performed by, for example, a transfer mold method, similarly to the method described in the method for manufacturing the semiconductor device A1.

  Next, a step of removing the base 6 is performed. This step is performed by etching the base 6 from the bottom side as in the method described in the method for manufacturing the semiconductor device A1. By removing the sealing resin 1 after removing the base 6, the semiconductor device A4 shown in FIGS. 11 and 12 can be obtained.

  Next, the operation of the semiconductor device A4 and the manufacturing method thereof will be described.

  The semiconductor device A4 is used by being incorporated in circuit boards of various electronic devices. In order to reduce the size of the circuit board, it is effective to incorporate more semiconductor chips in the same area. In the semiconductor device A4, the semiconductor chip 22 is fixed to the surface 21b of the semiconductor chip 21. According to such a configuration, the number of semiconductor chips per unit area can be increased as compared with the case where the two semiconductor chips 21 and 22 are separately resin-sealed and incorporated in an electronic circuit. Therefore, the semiconductor device A4 has a configuration that is useful for reducing the size of the circuit board.

  18 to 20 show a semiconductor device according to the fifth embodiment of the present invention. The semiconductor device A5 of this embodiment includes a sealing resin 1, three semiconductor chips 23, 24, and 25, nine conductive connection members 33, fixing members 34 and 35, 25 terminals 43, and 16 wires 53. It has. The semiconductor device A5 is an example of an area array type semiconductor device, and as shown in FIG. 20, 25 terminals 43 are arranged in a lattice pattern in the z direction. Out of the 25 terminals 43, the outer 16 are connected to the semiconductor chips 24 and 25, and the inner 9 are connected to the semiconductor chip 23. In the present embodiment, each terminal 43 is square when viewed in the z direction.

  The sealing resin 1 completely covers the semiconductor chips 23, 24, 25, the conductive connection members 33, the fixing members 34, 35 and the wires 53, and covers the terminals 43 so that the bottom surface 43 a of the terminals 43 is exposed. ing. The sealing resin 1 is made of, for example, an epoxy resin and is formed in a square shape as viewed in the z direction.

  The semiconductor chip 23 is made of a semiconductor material such as Si, and a fine circuit is formed inside. In the example illustrated in FIG. 18, the semiconductor chip 23 has a square shape when viewed in the z direction, and is disposed inside a rectangular frame formed by 16 terminals 43. On the bottom surface 23a of the semiconductor chip 23, nine electrode terminals 231 arranged in a lattice shape when viewed in the z direction are provided. Each electrode terminal 231 is connected to a fine circuit in the semiconductor chip 23. The number of electrode terminals 231 can be changed as appropriate according to the function of the semiconductor chip 23.

  Of the 25 terminals 43, the inner nine terminals 43 are arranged at positions overlapping the semiconductor chip 23 when viewed in the z direction, and correspond to the first terminals in the present invention. More specifically, the nine terminals 43 are arranged to face the nine electrode terminals 231 provided on the bottom surface 23 a of the semiconductor chip 23.

  Each conductive connecting member 33 is formed of, for example, a solder bump, and joins each terminal 43 and each electrode terminal 231 as shown in FIG.

  The semiconductor chip 24 is made of a semiconductor material such as Si, and a fine circuit is formed inside. In the example shown in FIG. 18, the semiconductor chip 24 has a smaller square than the semiconductor chip 23 in the z direction. The bottom surface 24 a of the semiconductor chip 24 is fixed to the surface 23 b of the semiconductor chip 23 via a fixing member 34. Eight electrode terminals 241 are provided on the surface 24 b of the semiconductor chip 24. The eight electrode terminals 241 are arranged at the peripheral edge of the surface 24b so as to leave a central portion when the semiconductor chip 24 is viewed in the z direction. In the example shown in FIG. 18, each electrode terminal 241 is arranged near both ends and the center of each side of the surface 24b. Each electrode terminal 241 is connected to a fine circuit in the semiconductor chip 24. The number of electrode terminals 241 can be changed as appropriate according to the function of the semiconductor chip 24.

  The semiconductor chip 25 is made of a semiconductor material such as Si, and a fine circuit is formed inside. In the example shown in FIG. 18, the semiconductor chip 25 is a square smaller than the semiconductor chip 24 when viewed in the z direction. The bottom surface 25 a of the semiconductor chip 25 is fixed to the surface 24 b of the semiconductor chip 24 through a fixing member 35. Eight electrode terminals 251 are provided on the surface 25 b of the semiconductor chip 25. In the example illustrated in FIG. 18, the eight electrode terminals 251 are arranged at positions that do not overlap the eight electrode terminals 241 when viewed in the x direction or the y direction. Each electrode terminal 251 is connected to a fine circuit in the semiconductor chip 25. The number of electrode terminals 251 can be changed as appropriate according to the function of the semiconductor chip 25.

  The fixing members 34 and 35 are, for example, DAF tapes. As shown in FIG. 18, the fixing member 34 is substantially rectangular when viewed in the z direction, and covers most of the surface 23 b of the semiconductor chip 23. As described above, the electrode terminal 231 of the semiconductor chip 23 is provided on the bottom surface 23a. For this reason, it is possible to make the size of the fixing member 34 substantially the same as that of the semiconductor chip 23. This is advantageous when a relatively large size semiconductor chip 24 is installed on the semiconductor chip 23. The fixing member 35 is installed inside a frame formed by the eight electrode terminals 241.

  As shown in FIG. 18, each electrode terminal 241, 251 is connected to each terminal 43 by a gold wire 53. The wire 53 connected to the electrode terminal 241 corresponds to the second wire in the present invention. Of the 25 terminals 43, the eight terminals 43 connected to the electrode terminals 241 correspond to the second terminals in the present invention.

  Next, an example of a manufacturing method of the semiconductor device A5 will be described below with reference to FIGS.

  When manufacturing the semiconductor device A5, the base 6 is used as in the case of the semiconductor devices A1 to A4.

  When manufacturing the semiconductor device A <b> 5, first, the base 6 is prepared, and the step of forming the terminals 43 on the surface of the base 6 is performed. FIG. 21 shows a state in which the terminal 43 is formed. This step is performed by electroless plating as in the case of forming the terminal 4 of the semiconductor device A1.

  Next, a step of installing the semiconductor chip 23 on the base 6 is performed. 22 and 23 show a state where the semiconductor chip 23 is installed on the base 6. This step can be performed using a commonly used solder bump forming method. In this method, solder bumps are formed on the nine terminals 43 at the center to align with the electrode terminals 231. The conductive connection member 33 is a solder bump formed at this time.

  Next, a step of installing the semiconductor chip 24 on the semiconductor chip 23 is performed. FIG. 24 shows a state where the semiconductor chip 24 is installed on the semiconductor chip 23. In this step, first, a step of attaching a DAF tape to the bottom surface 24a of the semiconductor chip 24 is performed. Next, as shown in FIG. 24, the semiconductor chip 25 is installed on the surface 23 b of the semiconductor chip 23. The DAF tape is the fixing member 34.

  Next, a process of installing the semiconductor chip 25 on the semiconductor chip 24 is performed. FIG. 25 shows a state where the semiconductor chip 25 is installed on the semiconductor chip 24. In this step, first, a step of attaching a DAF tape to the bottom surface 25a of the semiconductor chip 25 is performed. Next, as shown in FIG. 25, the semiconductor chip 24 is placed on the surface 24 b of the semiconductor chip 24. The DAF tape serves as the fixing member 35.

  Next, a process of connecting the semiconductor chips 24 and 25 and the plurality of terminals 43 with the wires 53 is performed. FIG. 26 shows a state after the wire 53 is connected. In this step, the electrode terminals 241 and 251 and the terminals 43 arranged so as to surround the semiconductor chip 23 are connected by wires 53. This step can be performed, for example, using a commercially available wire bonding capillary.

  Next, a step of forming the sealing resin 1 is performed. This step can be performed by, for example, a transfer mold method, similarly to the method described in the method for manufacturing the semiconductor device A1.

  Next, a step of removing the base 6 is performed. This step is performed by etching the base 6 from the bottom side as in the method described in the method for manufacturing the semiconductor device A1. The semiconductor device A5 shown in FIG. 18 can be obtained by cutting the sealing resin 1 after removing the base 6.

  Next, the operation of the semiconductor device A5 and its manufacturing method will be described.

  The semiconductor device A5 is used by being incorporated in circuit boards of various electronic devices. In order to reduce the size of the circuit board, it is effective to incorporate more semiconductor chips in the same area. The semiconductor device A5 includes three semiconductor chips 23, 24, and 25 stacked in the z direction. According to such a configuration, the number of semiconductor chips per unit area can be increased as compared with the case where the three semiconductor chips 23, 24, and 25 are separately resin-sealed and incorporated in an electronic circuit. . Therefore, the semiconductor device A5 has a configuration that is useful for reducing the size of the circuit board.

  Further, in the semiconductor device A5, some of the terminals 43 are arranged at positions overlapping the semiconductor chip 23 when viewed in the z direction. This is an advantageous configuration for reducing the size of the semiconductor device A5 when viewed in the z direction.

  Furthermore, in the semiconductor device A5, the nine terminals 43 arranged at positions overlapping the semiconductor chip 23 when viewed in the z direction are joined to the electrode terminals 231 provided on the bottom surface 23a of the semiconductor chip 23 by the conductive connection member 33. ing. These nine terminals 43 are difficult to drop off from the sealing resin 1.

  27 and 28 show a semiconductor device according to the sixth embodiment of the present invention. In the semiconductor device A6 of this embodiment, the opening 401 as described in the semiconductor devices A1 to A3, for example, is formed in some of the terminals 43, and other configurations are the same as those of the semiconductor device A5.

  As shown in FIG. 27, the opening 401 is provided in 16 terminals 43 arranged so as to surround the semiconductor chip 23 and connected to the wire 53. By providing the opening 401, these terminals 43 are less likely to drop off from the sealing resin 1.

  As shown in FIG. 28, the nine terminals 43 arranged at positions overlapping the semiconductor chip 23 in the z direction view are not provided with openings 401. Since these nine terminals 43 are joined to the bottom surface 23a of the semiconductor chip 23 via the conductive connection member 33, there is no need to provide the opening 401.

  The semiconductor device manufacturing method and the semiconductor device according to the present invention are not limited to the above-described embodiments. Various changes can be made to the design of the semiconductor device manufacturing method and the specific configuration of the semiconductor device according to the present invention.

  For example, although the semiconductor device A4 includes two semiconductor chips 21 and 22, another semiconductor chip may be stacked on the surface of the semiconductor chip 22 using a DAF tape.

  The semiconductor device A5 includes the three semiconductor chips 23, 24, and 25. However, the semiconductor device A5 may include the two semiconductor chips 23 and 24 without providing the semiconductor chip 25.

A1 to A6 Semiconductor device 1 Sealing resin 2, 21, 22, 23, 24, 25 Semiconductor chip 201, 211, 221, 231, 241, 251 Electrode terminal 3, 31 Support member 32, 34, 35 Fixing member 33 Conductive connection Member 4, 41, 42, 43 Terminal 401 Opening 402 Pad part 5, 51, 52, 53 Wire 6 Base

Claims (22)

Multiple terminals,
A first semiconductor chip;
A second semiconductor chip installed on the first semiconductor chip;
Sealing resin covering the first semiconductor chip, the second semiconductor chip, and the plurality of terminals;
With
The plurality of terminals include a first terminal connected to the first semiconductor chip and a second terminal connected to the second semiconductor chip,
One surface of the plurality of terminals in the thickness direction is exposed from the sealing resin. A support member for supporting one surface of the first semiconductor chip in the thickness direction;
The semiconductor device according to claim 1, wherein one surface of the support member in the thickness direction is exposed from the sealing resin.   The semiconductor device according to claim 2, wherein the support member is made of silver. The first semiconductor chip has a first electrode terminal on the other surface in the thickness direction,
4. The semiconductor device according to claim 2, further comprising a first wire that connects the first electrode terminal and the first terminal. 5.   The semiconductor device according to claim 1, wherein the first terminal has an opening filled with the sealing resin. The first terminal is disposed at a position overlapping the first semiconductor chip in the thickness direction view,
The first semiconductor chip has a first electrode terminal on one end face in the thickness direction,
The semiconductor device according to claim 1, further comprising a conductive connection member that connects the first electrode terminal and the first terminal.   The semiconductor device according to claim 6, wherein the conductive connection member is a solder bump. One surface in the thickness direction of the second semiconductor chip is fixed to the first semiconductor chip,
The second semiconductor chip includes a second electrode terminal on the other surface in the thickness direction,
The semiconductor device according to claim 1, further comprising a second wire that connects the second electrode terminal and the second terminal.   The semiconductor device according to claim 8, further comprising a fixing member that joins the second semiconductor chip and the first semiconductor chip.   The semiconductor device according to claim 9, wherein the fixing member is a DAF tape.   The semiconductor device according to claim 8, wherein the second terminal has an opening filled with the sealing resin. Forming a plurality of terminals on the base;
Installing a first semiconductor chip on the base;
Installing a second semiconductor chip on the first semiconductor chip;
Sealing the first semiconductor chip, the second semiconductor chip and the plurality of terminals with a resin;
Removing the base;
A method for manufacturing a semiconductor device, comprising:   The method of manufacturing a semiconductor device according to claim 12, wherein the step of forming a plurality of terminals on the base includes a step of performing an electroless plating process on the base. The first semiconductor chip has a first electrode terminal on an end surface far from the base in the thickness direction of the plurality of terminals,
The step of installing the first semiconductor chip on the base includes the step of adhering the end surface closer to the base in the thickness direction of the first semiconductor chip to the base via an adhesive member; The method for manufacturing a semiconductor device according to claim 12, further comprising a step of connecting the first electrode terminal and any one of the plurality of terminals with a first wire.   The method of manufacturing a semiconductor device according to claim 14, wherein the adhesive member is a silver paste.   The step of forming the plurality of terminals on the base includes a step of forming an opening that exposes the base in the thickness direction of the base in the plurality of terminals. The manufacturing method of the semiconductor device in any one. The first semiconductor chip has a first electrode terminal on an end surface closer to the base in the thickness direction of the plurality of terminals,
The step of installing the first semiconductor chip on the base includes a step of connecting any one of the first electrode terminal and the plurality of terminals with a conductive connection member. A method for manufacturing a semiconductor device.   The method of manufacturing a semiconductor device according to claim 17, wherein the conductive adhesive member is a solder bump.   The method for manufacturing a semiconductor device according to claim 17, wherein in the step of forming a plurality of terminals on the base, the plurality of terminals are formed in a lattice shape. The second semiconductor chip has a second electrode terminal on an end surface far from the base in the thickness direction of the plurality of terminals,
The method for manufacturing a semiconductor device according to claim 12, further comprising a step of connecting the second electrode terminal and any of the plurality of terminals with a second wire.   In the step of installing the second semiconductor chip on the first semiconductor chip, an end surface of the first semiconductor chip far from the base in the thickness direction of the plurality of terminals, and the second semiconductor chip 21. The method of manufacturing a semiconductor device according to claim 12, wherein an end face closer to the base is joined by a fixing member.   The method of manufacturing a semiconductor device according to claim 21, wherein the fixing member is a DAF tape.

Images