JP2007179040A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of decreasing the effect due to variations in the characteristics of transistors, supplying a predetermined current, even if there is change in the voltage-current characteristics of load, and fully improving the writing speed of a signal, even when the amount of signal current is small. <P>SOLUTION: In the semiconductor device, a current-voltage converting element and a transistor are connected in series; and an amplifier circuit detects a voltage which is applied, when a current flows to the current-voltage converting element, and sets a gate-source voltage of the transistor based on the voltage. Accordingly, since the amplifier circuit has a low output impedance, the writing speed of a signal can be improved sufficiently, even when the amount of a signal current is small. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a function of controlling a current supplied to a load with a transistor. In particular, the present invention relates to a display device including a pixel formed of a current-driven light-emitting element whose luminance changes with current and a signal line driver circuit for driving the pixel.

  In a display device using a self-luminous light emitting element typified by an organic light emitting diode (also referred to as an organic light emitting diode (OLED), an organic EL element, or an electroluminescence (EL) element), as a driving method thereof. A simple matrix system and an active matrix system are known. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-brightness display. In recent years, an active matrix system in which a current flowing through a light emitting element is controlled by a thin film transistor (TFT) provided in a pixel circuit is used. Development is underway.

  In the case of an active matrix display device, a problem has been recognized that the current flowing through the light-emitting element changes due to variations in the current characteristics of the driving TFT, resulting in variations in luminance. In other words, a driving TFT that drives a current flowing through the light emitting element is used in the pixel circuit, and the current flowing through the light emitting element changes due to variations in characteristics of these driving TFTs, resulting in variations in luminance. It was. Therefore, even if the characteristics of the driving TFT in the pixel circuit vary, the current flowing through the light emitting element does not change, and various circuits for suppressing variations in luminance have been proposed (for example, see Patent Documents 1 to 4).

  Patent Documents 1 to 3 disclose circuit configurations for preventing fluctuations in the current value flowing through the light emitting element due to variations in characteristics of the driving TFTs arranged in the pixel circuit. This configuration is called a current writing type pixel or a current input type pixel. Patent Document 4 discloses a circuit configuration for suppressing changes in signal current due to variations in TFTs in a source driver circuit.

  FIG. 54 shows a first configuration example of a conventional active matrix display device disclosed in Patent Document 1. The pixel in FIG. 54 includes a source signal line 5401, first to third gate signal lines 5402 to 5404, a current supply line 5405, TFTs 5406 to 5409, a storage capacitor 5410, an EL element 5411, and a signal current input current source 5412. .

  The operation from signal current writing to light emission will be described with reference to FIG. In the figure, the figure numbers indicating the respective parts are the same as those in FIG. FIGS. 55A to 55C schematically show the flow of current. FIG. 55D shows the relationship between currents flowing through the respective paths when signal current is written. FIG. 55E shows the voltage accumulated in the storage capacitor 5410 when the signal current is written, that is, the TFT 5408. The gate-source voltage is shown.

  First, a pulse is input to the first gate signal line 5402 and the second gate signal line 5403, and the TFTs 5406 and 5407 are turned on. At this time, the current flowing through the source signal line, that is, the signal current is Idata.

  Since the current Idata flows through the source signal line, the current path is divided into I1 and I2 in the pixel as shown in FIG. These relationships are shown in FIG. Needless to say, Idata = I1 + I2.

  At the moment when the TFT 5406 is turned on, since the charge is not held in the storage capacitor 5410, the TFT 5408 is turned off. Therefore, I2 = 0 and Idata = I1. That is, during this time, only a current due to charge accumulation in the storage capacitor 5410 flows.

  Thereafter, electric charges are gradually accumulated in the storage capacitor 5410, and a potential difference starts to be generated between both electrodes (FIG. 55E). When the potential difference between both electrodes becomes Vth (FIG. 55 (E), point A), the TFT 5408 is turned on and I2 is generated. As described above, since Idata = I1 + I2, I1 gradually decreases, but current still flows, and charge is accumulated in the storage capacitor.

  In the storage capacitor 5410, electric charge accumulation continues until the potential difference between the electrodes, that is, the gate-source voltage of the TFT 5408 reaches a desired voltage, that is, a voltage (VGS) that allows the TFT 5408 to pass the Idata current. When the accumulation of the electric charge is finished (point B in FIG. 55E), the current I1 stops flowing, and further, the current corresponding to the VGS flows in the TFT 5408, and Idata = I2 (FIG. 55B). . Thus, a steady state is reached. Thus, the signal writing operation is completed. Finally, selection of the first gate signal line 5402 and the second gate signal line 5403 is completed, and the TFTs 5406 and 5407 are turned off.

  Subsequently, the light emission operation is started. A pulse is input to the third gate signal line 5404 and the TFT 5409 is turned on. Since the previously written VGS is held in the holding capacitor 5410, the TFT 5408 is turned on, and a current of Idata flows from the current supply line 5405. As a result, the EL element 5411 emits light. At this time, if the TFT 5408 operates in the saturation region, even if the source-drain voltage of the TFT 5408 changes, Idata can flow without change.

  Such an operation for outputting the set current is referred to as an output operation. As a merit of the current writing type pixel, even when the characteristics of the TFT 5408 vary, the storage capacitor 5410 holds the gate-source voltage necessary to flow the current Idata, so that a desired current can be obtained. Can be accurately supplied to the EL element, and therefore, it is possible to suppress luminance variation due to variation in TFT characteristics.

  The above example relates to a technique for correcting a change in current due to variations in drive TFTs in a pixel circuit, but the same problem occurs in a source driver circuit. Patent Document 4 discloses a circuit configuration for preventing a change in signal current due to manufacturing variations of TFTs in a source driver circuit.

  The current (Is) having the same current value (Ir) flowing from the supply transistor (M5) that supplies the current for driving the light emitting element (EL) is supplied to the drive control circuit (2a) via the reference transistor (M4). Then, based on the current (Is), the source / drain voltage information (Vs) of the reference transistor (M4), and the source / drain voltage information (Vr, Vdrv) of the supply transistor (M5), the current (Is) is set to a desired value. A current supply circuit (1) and a drive control circuit (2a) having a configuration capable of controlling the source / drain voltage information (Vs, Vr) to be equal to each other so as to approach the current value (Idrv). A driving circuit for a light emitting element is known (see Patent Document 5).

  In order to guide a light emitting element provided in series between the first power source and the second power source, a driving transistor for driving the light emitting element, and a control signal for controlling the driving transistor to the gate of the driving transistor. A differential amplifier for generating a control signal by comparing a voltage at a connection point between the first switching transistor, a light-emitting element and a driving transistor, and a control voltage indicating a luminance of a pixel input to the display device There is known a drive circuit configured to guide the control signal to the gate of the drive transistor via the first switching transistor (see Patent Document 6).

As described above, the conventional technology is configured such that the signal current and the current for driving the TFT, or the signal current and the current flowing through the light emitting element are equal to each other, or the proportional relationship is maintained.
JP-T-2002-517806 International Publication No. 01/06484 Pamphlet Special table 2002-514320 gazette International Publication No. 02/39420 Pamphlet Special table 2003-108069 gazette Special table 2003-58106 gazette

However, since the parasitic capacitance of the wiring used for supplying the signal current to the driving TFT and the light emitting element is extremely large, when the signal current is small, the time constant for charging the parasitic capacitance of the wiring is increased, and the signal writing speed is increased. There is a problem that it becomes slow. That is, even if a signal current is supplied to the transistor, it takes a long time to generate a voltage necessary to flow the transistor at the gate terminal, and the signal writing speed becomes slow. Yes.

  As can be seen from FIG. 55A, when a current is input, the gate terminal and the drain terminal of the TFT 5408 are connected. Therefore, the gate-source voltage (Vgs) and the drain-source voltage (Vds) are equal. On the other hand, as can be seen from FIG. 55C, when a current is supplied to the load, the drain-source voltage is determined by the characteristics of the load.

  FIG. 56 shows the relationship between the current flowing through the TFT 5408 and the EL element 5411 and the voltage applied to each. FIG. 57 shows the voltage / current characteristics 5701 of the EL element 5411 and the voltage / current characteristics of the TFT 5408 in the configuration shown in FIG. The intersection of each graph is the operating point.

  First, when the current value is large (when the absolute value of the gate-source voltage of the TFT 5408 is large), in the voltage-current characteristic 5702a of the TFT 5408, when current is input, Vgs = Vds. Operate. When a current is supplied to the EL element 5411, the intersection of the voltage-current characteristic 5701 of the EL element 5411 and the voltage-current characteristic 5702 a of the TFT 5408 is an operating point 5705 a. That is, the drain-source voltage differs between when a current is input and when a current is supplied to the EL element 5411. However, since the current value is constant in the saturation region, a current having a correct magnitude can be supplied to the EL element 5411.

  However, in actual transistors, the current often does not become a constant value even in the saturation region due to the kink (Early) effect. Therefore, when a current is supplied to the EL element 5411, the intersection of the voltage-current characteristic 5701 of the EL element 5411 and the voltage-current characteristic 5702c of the TFT 5408 becomes the operating point 5705c, and the current value changes.

  On the other hand, when the current value is small (when the absolute value of the gate-source voltage of the TFT 5408 is small), in the voltage-current characteristic 5703a of the TFT 5408, when current is input, Vgs = Vds. Operate. When a current is supplied to the EL element 5411, the intersection of the voltage / current characteristic 5701 of the EL element 5411 and the voltage / current characteristic 5703 a of the TFT 5408 is an operating point 5707 a.

  In consideration of the kink (Early) effect, when a current is supplied to the EL element 5411, an intersection of the voltage-current characteristic 5701 of the EL element 5411 and the voltage-current characteristic 5703c of the TFT 5408 becomes an operating point 5707c. Therefore, the current value when supplying the EL element 5411 is different from that when the current is input.

  When the current value is large (when the absolute value of the gate-source voltage of the TFT 5408 is large) and when the current value is small (when the absolute value of the gate-source voltage of the TFT 5408 is small), the former is the operating point. There is not much deviation between 5704 and the operating point 5705c. That is, the drain-source voltage of the transistor is not much different between when the current is input and when the current is supplied to the EL element 5411. However, when the current value is small, the operating point 5706 and the operating point 5707c are not greatly shifted. That is, the drain-source voltage of the transistor varies greatly between when a current is input and when a current is supplied to the EL element 5411. Therefore, the deviation of the current value is large.

  As a result, more current flows through the EL element 5411. Therefore, when an image with low luminance is displayed, a brighter image is actually displayed. For this reason, it may occur that a little light is emitted even though black is desired to be displayed. As a result, the contrast is lowered.

  In the case of the configuration of FIG. 54, as shown in FIG. 55A, when a signal current is input, the gate and drain of the TFT 5408 are connected. That is, Vgs = Vds. In a normal transistor, when Vgs = 0, almost no current flows. However, current may flow depending on the value of the threshold voltage (Vth). For example, in the case of a P-channel transistor, current flows when Vth> 0, and in the case of an N-channel transistor, Vth <0. In such a case, when Vgs = Vds, the operation is performed not in the saturation region but in the linear region. Therefore, the operation is performed in the linear region in FIG. Therefore, if the operation is performed in the saturation region at the time of FIG. 55 (C), the current value changes between the time of FIG. 55 (A) and the time of FIG. 55 (C).

  That is, when Vgs = 0, a transistor having a threshold voltage (Vth) that allows current to flow operates only in a linear region in a state where Vgs = Vds, and in a saturation region. I can't make it work.

  For example, in the case of the configuration shown in FIGS. 54 and 55, the TFT 5408 is operated in the saturation region. Therefore, as shown in FIG. 58, even when the voltage-current characteristic 5701a of the EL element 5411 is shifted due to deterioration, the operating point only moves from the operating point 5705a to the operating point 5705b. That is, even if the voltage applied to the EL element 5411 or the drain-source voltage of the TFT 5408 changes, the current flowing through the EL element 5411 does not change. Accordingly, image sticking of the EL element 5411 can be reduced.

  However, in the case of the configuration described in Patent Document 6, the voltage at the connection point between the EL element and the driving transistor is compared with the control voltage indicating the luminance of the pixel input to the display device. Therefore, when the voltage-current characteristics of the EL element shift, the current flowing through the EL element 5411 changes. That is, burn-in of the EL element 5411 occurs.

  In the case of the configuration described in Patent Document 5, the transistors M7 and M9 need to have the same current characteristics. If it varies, the current flowing through the light emitting element (EL) also varies. Similarly, the transistors M8 and M11, the transistors M10 and M12, and the like need to have the same current characteristics. Thus, in many transistors, it is necessary that current characteristics be uniform. If they are not aligned, the current flowing through the light emitting element (EL) also varies. As a result, the production yield decreases, the cost increases, the circuit layout area increases, and the power consumption increases.

  In view of such a problem, the present invention reduces the influence of transistor characteristic variation, can supply a predetermined current even if the voltage-current characteristic of a load changes, and even if the signal current is small, An object of the present invention is to provide a semiconductor device capable of sufficiently improving the writing speed.

In the semiconductor device of the present invention, a current-voltage conversion element and a transistor are connected in series, and a voltage applied when a current flows through the current-voltage conversion element is detected by an amplifier circuit. Based on the voltage, the amplifier circuit is connected to the gate of the transistor. Set the source-to-source voltage.

A first configuration of a semiconductor device of the present invention includes a current-voltage conversion element, a transistor, and an amplifier circuit, and the current-voltage conversion element and one of a source terminal or a drain terminal of the transistor are connected, In the amplifier circuit, a first input terminal is connected to one of a source terminal or a drain terminal of the transistor, a predetermined potential is input to the second input terminal, and an output terminal is connected to the gate terminal of the transistor. Yes. The amplifier circuit controls the potential of the gate terminal of the transistor so that the potential difference between the first input terminal and the second input terminal becomes a predetermined potential difference.

One aspect of the semiconductor device of the present invention is a semiconductor device including a circuit for controlling a current supplied to a load by a transistor, and one of a source terminal and a drain terminal of the transistor is connected to a current-voltage conversion element, and the transistor An amplifier circuit is provided for controlling the voltage generated in the current-voltage conversion element by controlling the potential of the gate terminal of the transistor so that the transistor operates in the saturation region.

In one embodiment of the semiconductor device of the present invention, one of a source terminal and a drain terminal is supplied with a predetermined potential, the other of the source terminal and the drain terminal is connected to a current-voltage conversion element, and a first input terminal An amplifier circuit connected to the other of the source terminal and the drain terminal of the transistor, supplied with a predetermined potential to the second input terminal, and connected to the gate terminal of the transistor;

According to one embodiment of the semiconductor device of the present invention, a transistor includes a capacitor between one of a source terminal or a drain terminal and a gate terminal, and the other of the source terminal and the drain terminal is connected to a current-voltage conversion element, and a first input And an amplifier circuit in which a terminal is connected to the other of the source terminal and the drain terminal of the transistor, a predetermined potential is supplied to the second input terminal, and an output terminal is connected to the gate terminal of the transistor.

In one embodiment of the semiconductor device of the present invention, one of a source terminal and a drain terminal is supplied with a predetermined potential, the other of the source terminal and the drain terminal is connected to a current-voltage conversion element, and a first input terminal An amplifier circuit connected to the other of the source terminal and the drain terminal of the transistor, a predetermined potential supplied to the second input terminal, and an output terminal connected to the gate terminal of the transistor, and a gate terminal of the transistor One electrode is connected, and the other electrode has a capacitor element to which a predetermined potential is supplied.

One of the semiconductor devices of the present invention has the above structure, and the transistor is an N-type transistor.

One of the semiconductor devices of the present invention has the above structure, and the transistor is a P-type transistor.

The second basic configuration of the semiconductor device of the present invention includes a current-voltage conversion element, a transistor, and an amplifier circuit, and the current-voltage conversion element and one of the source terminal or the drain terminal of the transistor are connected to each other. A predetermined potential is supplied to the gate terminal of the transistor, and the amplifier circuit includes a first input terminal connected to one of a source terminal or a drain terminal of the transistor, and a second input terminal connected to the transistor. The transistor is connected to the gate terminal, and the output terminal is connected to the other of the source terminal and the drain terminal of the transistor. The amplifier circuit controls the other potential of the source terminal or the drain terminal of the transistor so that the first input terminal and the second input terminal have a predetermined potential difference.

A specific configuration of the second configuration of the semiconductor device of the present invention will be described below.

One aspect of the semiconductor device of the present invention is a semiconductor device including a circuit for controlling a current supplied to a load by a transistor, and one of a source terminal and a drain terminal of the transistor is connected to a current-voltage conversion element, and the transistor An amplifying circuit is provided for controlling the voltage generated in the current-voltage conversion element by controlling the other potential of the source terminal or the drain terminal of the transistor so that the transistor operates in a saturation region.

One of the semiconductor devices of the present invention is a transistor in which one of a source terminal and a drain terminal is connected to a current-voltage conversion element, a gate terminal is supplied with a predetermined potential, and a first input terminal is the source terminal of the transistor or One of the drain terminals is connected, the second input terminal is connected to the gate terminal of the transistor, and the output terminal is connected to an amplifier circuit connected to the other of the source terminal or the drain terminal of the transistor.

According to one embodiment of the semiconductor device of the present invention, a transistor includes a capacitor between one of a source terminal or a drain terminal and a gate terminal, and the other of the source terminal or the drain terminal is connected to a current-voltage conversion element; Amplification in which the input terminal is connected to the other of the source terminal or the drain terminal of the transistor, the second input terminal is connected to the gate terminal of the transistor, and the output terminal is connected to one of the source terminal or the drain terminal of the transistor A circuit.

One of the semiconductor devices of the present invention is a transistor in which one of a source terminal and a drain terminal is connected to a current-voltage conversion element, a gate terminal is supplied with a predetermined potential, and a first input terminal is the source terminal of the transistor or An amplifier circuit connected to one of the drain terminals, a second input terminal connected to the gate terminal of the transistor, an output terminal connected to the other of the source terminal or the drain terminal of the transistor, and a gate terminal of the transistor One electrode is connected, and the other electrode has a capacitor element to which a predetermined potential is supplied.

One of the semiconductor devices of the present invention has the above structure, and the transistor is an N-type transistor.

One of the semiconductor devices of the present invention has the above structure, and the transistor is a P-type transistor.

  Note that various types of switches can be used for the switch described in the specification as long as the current flow can be controlled. Therefore, an electrical switch or a mechanical switch can be applied. It may be a transistor, a diode, or a logic circuit combining them. Therefore, when a transistor is used as a switch, the polarity (conductivity type) of the transistor is not particularly limited. However, when it is desirable that the off-state current is small, it is desirable to use a transistor having a polarity with a small off-state current. As a transistor with low off-state current, there are a transistor provided with an LDD region and a transistor having a multi-gate structure. Further, when the transistor used as a switch operates at a source terminal potential close to a low potential side power supply (Vss, GND, 0 V, etc.), the N channel type is used. When operating in a state close to a power supply (Vdd or the like), it is desirable to use a P channel type. This is because the absolute value of the gate-source voltage can be increased, so that the transistor can easily function as a switch. Note that both N-channel and P-channel switches may be used as CMOS switches.

In the present invention, being connected is synonymous with being electrically connected. Therefore, another element, a switch, or the like may be disposed between them.

Note that various forms of display elements can be used. For example, a display medium whose contrast is changed by an electromagnetic action, such as an EL element (an organic EL element, an inorganic EL element, or an EL element including an organic substance and an inorganic substance), an electron-emitting element, a liquid crystal element, and electronic ink can be used. . Note that a display device using an EL element is an EL display, and a display device using an electron-emitting device is a liquid crystal display such as a field emission display (FED) or a SED type flat display (SED: Surface-conduction Electron-Emitter Display). There is a liquid crystal display as a display device using an element, and an electronic paper as a display device using electronic ink.

  Note that in the present invention, applicable transistor types are not limited, and a thin film transistor (TFT) using a non-single-crystal semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor substrate, or an SOI substrate is used. A MOS transistor, a junction transistor, a bipolar transistor, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be applied. There is no limitation on the kind of the substrate over which the transistor is provided, and the transistor can be provided on a single crystal substrate, an SOI substrate, a glass substrate, a plastic substrate, or the like.

Note that as described above, the transistor in the present invention may be any type of transistor, and may be formed on any substrate. Therefore, the entire circuit may be formed on a glass substrate, may be formed on a plastic substrate, may be formed on a single crystal substrate, or may be formed on an SOI substrate. However, it may be formed on any substrate. Alternatively, a part of the circuit may be formed on a certain substrate, and another part of the circuit may be formed on another substrate. That is, all of the circuits may not be formed on the same substrate. For example, part of a circuit is formed using a TFT over a glass substrate, another part of the circuit is formed over a single crystal substrate, and the IC chip is connected with COG (Chip On Glass) to form glass. You may arrange | position on a board | substrate. Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board.

In this specification, one pixel represents the minimum unit of an image. Therefore, in the case of a full-color display device composed of R (red), G (green), and B (blue) color elements, one pixel is a dot of the R color element, a dot of the G color element, and a B color element. It shall be composed of dots.

Note that in this specification, the pixels are arranged in a matrix, not only in the case of a so-called grid pattern in which vertical stripes and horizontal stripes are combined, but also in full-color display with three color elements (for example, RGB). When performing the above, the case where the dots of the three color elements are arranged in a so-called delta arrangement is also included. In addition, the size of the light emitting area may be different for each dot of the color element.

A transistor is an element having at least three terminals including a gate electrode, a drain region, and a source region, and has a channel formation region between the drain region and the source region. Here, since the source region and the drain region vary depending on the structure and operating conditions of the transistor, it is difficult to limit which is the source region or the drain region. Therefore, in this embodiment, regions functioning as a source region and a drain region are referred to as a first terminal and a second terminal, respectively.

Note that in this specification, a semiconductor device refers to a device having a circuit including a semiconductor element (such as a transistor or a diode). The display device is not only a display panel body in which a plurality of pixels including display elements on a substrate and peripheral drive circuits for driving these pixels are formed, but also a flexible printed circuit (FPC) and a printed wiring board ( Including those to which PWB) is attached. A light-emitting device refers to a display device using a self-luminous display element in particular.

  The semiconductor device of the present invention reduces the influence of transistor characteristic variations, can supply a predetermined current even when the voltage-current characteristics of the load change, and sufficiently increases the signal writing speed even when the signal current is small. Can be improved.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
The basic principle of the present invention can be applied to a display device in which a pixel is formed using a light emitting element capable of controlling light emission luminance by a flowing current value. An EL element is given as a typical light emitting element.

Further, the present invention can be applied not only to a pixel having a light emitting element such as an EL element but also to various analog circuits having a current source. In this embodiment, the basic principle of the present invention will be described.

First, FIG. 1 shows a basic configuration of a semiconductor device based on the basic principle of the present invention. The transistor 101, the capacitor 102, the current-voltage conversion element 103, and the amplifier circuit 104 are included. Note that the transistor 101 is an N-channel transistor.

The transistor 101 has a first terminal (one of a source terminal or a drain terminal) connected to the wiring 105 and a second terminal (the other of the source terminal or the drain terminal) connected to the wiring 107 via the current-voltage conversion element 103. A gate terminal is connected to the wiring 106 through the capacitor 102. Note that a high power supply potential Vdd is supplied to the wiring 107, and a low power supply potential Vss is supplied to the wiring 105 and the wiring 106. Note that Vdd> Vss.

Note that the capacitor 102 only needs to hold the gate-source voltage of the transistor 101. Therefore, as long as the potential of the wiring 105 to which the first terminal serving as the source terminal of the transistor 101 is connected is constant, the capacitor 102 only needs to hold the gate potential of the transistor 101. Therefore, the potential supplied to the wiring 106 is not limited as long as the capacitor 102 can hold the gate potential of the transistor 101. The potential supplied to the wiring 105 and the wiring 106 may be the same. Therefore, the wiring 105 and the wiring 106 may be a series of the same wirings instead of different wirings. Further, since the capacitor 102 is provided to hold the gate potential of the transistor 101, the capacitor 102 is not necessarily provided when the gate capacitance of the transistor 101 can be substituted.

The amplifier circuit 104 has a first input terminal connected to a wiring between the second terminal of the transistor 101 and the current-voltage conversion element 103, a second input terminal connected to the wiring 108, and an output terminal of the transistor 101. Connected to the gate terminal. Note that a predetermined potential is supplied to the wiring 108. A connection point between the wiring between the second terminal of the transistor 101 and the current-voltage conversion element 103 and the first input terminal of the amplifier circuit 104 is a node 109.

Next, the operation will be described. The voltage of the current-voltage conversion element 103 is detected at the first input terminal of the amplifier circuit 104. That is, the potential of the node 109 is input to the first input terminal of the amplifier circuit 104. Then, the amplifier circuit 104 outputs a potential from the output terminal so that the potential difference between the potential input to the first input terminal and the potential input to the second input terminal becomes a predetermined potential difference. That is, the amplifier circuit 104 controls the gate potential of the transistor 101 so that the potential difference between the potential of the node 109 and the potential supplied to the wiring 108 becomes a predetermined potential difference. Note that the predetermined potential difference includes a case where the potential difference is 0V.

In this manner, the transistor 101 can obtain a gate potential for setting the potential of the node 109 to a desired potential. The voltage applied to the current-voltage conversion element 103 can be set to a desired voltage by setting the node 109 to a desired potential. At this time, a current Idata corresponding to the desired voltage applied to the current-voltage conversion element 103 flows to the current-voltage conversion element 103. This current Idata also flows through the transistor 101. The transistor 101 has a gate-source voltage necessary to pass Idata.

At this time, the voltage between the gate and the source of the transistor 101 has an appropriate magnitude for flowing Idata without depending on the current characteristics (such as mobility and threshold voltage) and the size (gate width and gate length) of the transistor 101. It has become. Therefore, the current Idata can flow through the transistor 101 even when the current characteristics and size of the transistor corresponding to the transistor 101 in the semiconductor device vary. As a result, the transistor 101 can operate as a current source and can supply current to various loads (another transistor, a pixel, a signal line driver circuit, and the like).

Note that in general, an operation region of a transistor (here, for the sake of simplicity, an N-channel transistor) can be divided into a linear region and a saturation region. The boundary is when (Vgs−Vth) = Vds where the drain-source voltage is Vds, the gate-source voltage is Vgs, and the threshold voltage is Vth. When (Vgs−Vth)> Vds, the operation is performed in a linear region, and the current value is determined by the magnitudes of Vds and Vgs. On the other hand, when (Vgs−Vth) <Vds, the operation is performed in the saturation region, and ideally, even when Vds changes, the current value hardly changes. That is, the current value is determined only by the magnitude of Vgs.

Therefore, in which region the transistor 101 operates is determined from the drain-source voltage Vds and the gate-source voltage Vgs of the transistor 101 and the threshold voltage Vth of the transistor 101. That is, when Vgs−Vth <Vds, the transistor 101 operates in the saturation region. In the saturation region, in the ideal case, even if Vds changes, the value of the current flowing through the transistor does not change. Therefore, when the current Idata flows through the transistor 101, that is, when the setting operation is performed and when the current is supplied from the transistor 101 to the load, the current flows through the transistor 101 even when Vds changes. The current value does not change.

However, even if the transistor operates in the saturation region, the current value may change due to the kink (early) effect. In that case, by controlling the potential of the second input terminal of the amplifier circuit 104, the potential of the node 109, that is, the potential of the second terminal of the transistor 101 (which in this case becomes the drain terminal) can be controlled. (Early) The influence of the effect can be reduced.

For example, when the setting operation is performed and when the output operation is performed, Vds is approximately equal by appropriately controlling the potential of the second input terminal of the amplifier circuit 104 according to the magnitude of the current Idata. can do.

Even when the voltage-current characteristics of the load change due to deterioration. By appropriately controlling the potential input to the second input terminal of the amplifier circuit 104, Vds when performing the setting operation can be made approximately equal to Vds when performing the output operation. Therefore, an appropriate current can be supplied. Thereby, when the load is an EL element or the like, the burn-in of the EL element can be prevented.

Note that the amplifier circuit 104 has a low output impedance. Therefore, a large current can be supplied. Accordingly, the gate terminal of the transistor 101 can be quickly set to a desired potential. That is, the writing speed of the current Idata is increased and writing can be completed quickly. Further, even when the current Idata is small, the gate terminal of the transistor 101 can be quickly set to a desired potential, so that signal writing failure can be prevented.

The amplifier circuit 104 has a function of detecting, amplifying and outputting a potential difference between the first input terminal and the second input terminal. In FIG. 1, the first input terminal of the amplifier circuit 104 and the second terminal of the transistor 101 (which becomes the drain terminal at this time) are connected, and the output terminal of the amplifier circuit 104 and the gate terminal of the transistor 101 are connected. . When the gate potential of the transistor 101 changes, the drain potential of the transistor 101 also changes, so the potential of the first input terminal of the amplifier circuit 104 also changes. Further, when the drain potential of the transistor 101 changes, the potential of the first input terminal of the amplifier circuit 104 also changes, so the output potential of the amplifier circuit 104 also changes. Then, the gate potential of the transistor 101 also changes. That is, a feedback circuit is formed. Therefore, a potential that stabilizes the state of each terminal is output from the amplifier circuit 104 through the feedback operation as described above.

That is, in FIG. 1, a potential that stabilizes the potential of the second terminal (here, the drain terminal) of the transistor 101 is output from the amplifier circuit 104 to the gate terminal of the transistor 101. At this time, the drain potential of the transistor 101 can be controlled by a potential supplied to the wiring 108. Therefore, the voltage applied to the current-voltage conversion element 103 can be controlled by the potential supplied to the wiring 108, that is, the current Idata flowing through the transistor 101 can be controlled.

As described above, by using the feedback circuit including the amplifier circuit 104, a gate potential for allowing a desired current to flow through the transistor 101 can be set. At this time, since the amplifier circuit 104 is used, the setting of the gate potential of the transistor 101 can be completed quickly, and writing can be completed in a short time. The set transistor 101 can be used as a current source circuit, and can supply current to various loads.

The current-voltage conversion element 103 may be any element that generates a voltage between the terminals of the element when a current flows through the element. Therefore, a resistance element, a rectifying element, or the like can be applied. FIG. 3 shows the case where a resistance element is applied to the current-voltage conversion element 103 of the semiconductor device of FIG. In the semiconductor device of FIG. 3, the resistance element 301 corresponds to the current-voltage conversion element 103 of FIG. 4A and 4B illustrate the case where a diode-connected transistor is used as the rectifying element for the current-voltage conversion element 103 of the semiconductor device in FIG. In the semiconductor device in FIG. 4A, the transistor 401 and the transistor 402 in FIG. 4B correspond to the current-voltage conversion element 103 in FIG. The P-channel transistor 401 has a first terminal (one of a source terminal and a drain / drain terminal) connected to the wiring 107, a second terminal (the other of the source terminal and the drain terminal) connected to a gate terminal, and the transistor 101 To the second terminal. In the N-channel transistor 402, a first terminal (one of a source terminal and a drain / drain terminal) is connected to the second terminal of the transistor 101, and a second terminal (the other of the source terminal or the drain terminal) is connected to a gate terminal. Together with the wiring 107.

In FIG. 1, an N-channel transistor is used as the transistor for setting the gate-source voltage, but the present invention is not limited to this. FIG. 12 shows a configuration in the case where a P-channel transistor is applied.

The semiconductor device illustrated in FIG. 12 includes a transistor 1201, a capacitor 1202, a current-voltage conversion element 1203, and an amplifier circuit 1204. Note that the transistor 1201 is a P-channel transistor.

The transistor 1201 has a first terminal (one of a source terminal and a drain terminal) connected to the wiring 1205, and a second terminal (the other of the source terminal and the drain terminal) connected to the wiring 1207 via the current-voltage conversion element 1203. A gate terminal is connected to the wiring 1206 through the capacitor 1202. Note that the low power supply potential Vss is supplied to the wiring 1207 and the high power supply potential Vdd is supplied to the wiring 1205 and the wiring 1206. Here, Vss <Vdd.

Note that the capacitor 1202 only needs to hold the gate-source voltage of the transistor 1201. Therefore, if the potential of the wiring 1205 to which the first terminal which is the source terminal of the transistor 1201 is connected is constant, the capacitor 1202 only needs to hold the gate potential of the transistor 1201. Therefore, the potential supplied to the wiring 1206 is not limited as long as the capacitor 1202 can hold the gate potential of the transistor 1201. The potential supplied to the wiring 1205 and the wiring 1206 may be the same. Therefore, the wiring 1205 and the wiring 1206 may be a series of the same wirings instead of different wirings. Further, since the capacitor 1202 is provided to hold the gate potential of the transistor 1201, the capacitor 1202 is not necessarily provided when the gate capacitance of the transistor 1201 can be substituted.

The amplifier circuit 1204 has a first input terminal connected to a wiring between the second terminal of the transistor 1201 and the current-voltage conversion element 1203, a second input terminal connected to the wiring 1208, and an output terminal of the transistor 1201. Connected to the gate terminal. Note that a predetermined potential is supplied to the wiring 1208. A node between the wiring between the second terminal of the transistor 1201 and the current-voltage conversion element 1203 and the first input terminal of the amplifier circuit 1204 is a node 1209.

Next, the operation will be briefly described. The voltage of the current-voltage conversion element 1203 is detected at the first input terminal of the amplifier circuit 1204. That is, the potential of the node 1209 is input to the first input terminal of the amplifier circuit 1204. Then, the amplifier circuit 1204 outputs a potential from the output terminal so that the potential difference between the potential input to the first input terminal and the potential input to the second input terminal becomes a predetermined potential difference. That is, the amplifier circuit 1204 controls the gate potential of the transistor 1201 so that the potential difference between the potential of the node 1209 and the potential supplied to the wiring 1208 becomes a predetermined potential difference. Note that the predetermined potential difference includes a case where the potential difference is 0V.

In this manner, the transistor 1201 can obtain a gate potential for setting the potential of the node 1209 to a desired potential. Then, by setting the node 1209 to a desired potential, the voltage applied to the current-voltage conversion element 1203 can be set to a desired voltage. At this time, a current Idata corresponding to the desired voltage applied to the current-voltage conversion element 1203 flows to the current-voltage conversion element 1203. This current Idata also flows through the transistor 1201. The transistor 1201 has a gate-source voltage necessary for flowing Idata.

At this time, the voltage between the gate and the source of the transistor 1201 has an appropriate magnitude for flowing Idata without depending on the current characteristics (such as mobility and threshold voltage) and the size (gate width and gate length) of the transistor 1201. It has become. Therefore, even if the current characteristics and size of the transistor corresponding to the transistor 1201 in the semiconductor device vary, the current Idata can flow through the transistor 1201. As a result, the transistor 1201 can operate as a current source, and can supply current to various loads (another transistor, a pixel, a signal line driver circuit, and the like).

When the current Idata flows through the transistor 1201, that is, when the setting operation is performed and when the current is supplied from the transistor 1201 to the load, the current flows through the transistor 1201 even if Vds changes. The current value does not change. However, even if the transistor operates in the saturation region, the current value may change due to the kink (early) effect. In that case, by controlling the potential of the second input terminal of the amplifier circuit 1204, the potential of the node 1209, that is, the potential of the second terminal of the transistor 1201 (which at this time becomes the drain terminal) can be controlled. (Early) The influence of the effect can be reduced.

For example, when the setting operation is performed and when the output operation is performed, Vds is substantially equal by appropriately controlling the potential of the second input terminal of the amplifier circuit 1204 according to the magnitude of the current Idata. can do.

Even when the voltage-current characteristics of the load change due to deterioration. By appropriately controlling the potential input to the second input terminal of the amplifier circuit 1204, Vds when performing the setting operation can be made approximately equal to Vds when performing the output operation. Therefore, an appropriate current can be supplied. Thereby, when the load is an EL element or the like, the burn-in of the EL element can be prevented.

Note that the amplifier circuit 1204 has low output impedance. Therefore, a large current can be supplied. Accordingly, the gate terminal of the transistor 1201 can be quickly set to a desired potential. That is, the writing speed of the current Idata is increased and writing can be completed quickly. Further, even when the current Idata is small, the gate terminal of the transistor can be quickly brought to a desired potential, so that signal writing failure can be prevented.

The amplifier circuit 1204 has a function of detecting, amplifying and outputting a potential difference between the first input terminal and the second input terminal. In FIG. 12, the first input terminal of the amplifier circuit 1204 and the second terminal of the transistor 1201 (which becomes the drain terminal at this time) are connected, and the output terminal of the amplifier circuit 1204 and the gate terminal of the transistor 1201 are connected. . When the gate potential of the transistor 1201 changes, the drain potential of the transistor 1201 also changes, so the potential of the first input terminal of the amplifier circuit 1204 also changes. Further, when the drain potential of the transistor 1201 changes, the potential of the first input terminal of the amplifier circuit 1204 also changes, so the output potential of the amplifier circuit 1204 also changes and the gate potential of the transistor 1201 also changes. That is, a feedback circuit is formed. Therefore, a potential that stabilizes the state of each terminal is output from the amplifier circuit 1204 through the feedback operation as described above.

In other words, in FIG. 12, a potential at which the drain terminal of the transistor 1201 is stabilized is output from the amplifier circuit 1204 to the gate terminal of the transistor 1201. At this time, the drain potential of the transistor 1201 can be controlled by a potential supplied to the wiring 1208. Therefore, the voltage applied to the current-voltage conversion element 1203 can be controlled by the potential supplied to the wiring 1208, that is, the current Idata flowing through the transistor 1201 can be controlled.

As described above, by using the feedback circuit including the amplifier circuit 1204, a gate potential for allowing a desired current to flow through the transistor 1201 can be set. At this time, since the amplifier circuit 1204 is used, the setting of the gate potential of the transistor 1201 can be completed quickly, and writing can be completed in a short time. The set transistor 1201 can be used as a current source circuit, and can supply current to various loads.

(Embodiment 2)
In the first embodiment, the current flowing through the transistor is controlled by detecting the drain potential of the transistor connected in series with the current-voltage conversion element and setting the gate potential of the transistor by the amplifier circuit. In this embodiment mode, a structure in which the drain potential of a transistor connected in series with a current-voltage conversion element is detected and the source potential of the transistor is set by an amplifier circuit to control the current flowing through the transistor will be described.

The semiconductor device illustrated in FIG. 20 includes a transistor 2001, a capacitor 2002, a current-voltage conversion element 2003, and an amplifier circuit 2004. Note that the transistor 2001 is an N-channel transistor.

Note that the transistor 2001 has a first terminal (one of a source terminal or a drain terminal) connected to the output terminal of the amplifier circuit 2004 and a second terminal (the other of the source terminal or the drain terminal) via a current-voltage conversion element 2003. The wiring 2005 is connected, and the gate terminal is connected to the wiring 2007. In addition, the gate terminal of the transistor 2001 is connected to the second input terminal of the amplifier circuit 2004 and is connected to the wiring 2006 through the capacitor 2002. A first input terminal of the amplifier circuit 2004 is connected to a wiring between the second terminal of the transistor 2001 and the current-voltage conversion element 2003. A node 2008 is an intersection of a wiring between the second terminal of the transistor 2001 and the current-voltage conversion element 2003 and a first input terminal of the amplifier circuit 2004. Note that a high power supply potential Vdd is supplied to the wiring 2005, a low power supply potential Vss is supplied to the wiring 2006, and a predetermined potential is supplied to the wiring 2007. Here, Vss <Vdd.

Note that the capacitor 2002 only needs to hold the gate-source voltage of the transistor 2001. Therefore, if the output of the amplifier circuit 2004 is continuously supplied to the first terminal serving as the source terminal of the transistor 2001, the capacitor 2002 only needs to hold the gate potential of the transistor 2001. Therefore, since the capacitor 2002 only needs to hold the gate potential of the transistor 2001, the potential supplied to the wiring 2006 is not limited. Further, when the gate capacitance of the transistor 2001 can be substituted, the capacitor 2002 is not necessarily provided.

Next, the operation will be briefly described. The voltage of the current-voltage conversion element 2003 is detected at the first input terminal of the amplifier circuit 2004. That is, the potential of the node 2008 is input to the first input terminal of the amplifier circuit 2004. The amplifier circuit 2004 outputs a potential from the output terminal so that the potential difference between the potential input to the first input terminal and the potential input to the second input terminal becomes a predetermined potential difference. That is, the amplifier circuit 2004 controls the source potential of the transistor 2001 so that the potential difference between the potential of the node 2008 and the potential supplied to the wiring 2007 becomes a predetermined potential difference.

In this manner, the transistor 2001 can acquire a source potential for setting the potential of the node 2008 to a desired potential. Then, by setting the node 2008 to a desired potential, the voltage applied to the current-voltage conversion element 2003 can be changed to a desired voltage. At this time, a current Idata corresponding to the desired voltage applied to the current-voltage conversion element 2003 flows through the current-voltage conversion element 2003. This current Idata also flows through the transistor 2001. The transistor 2001 has a gate-source voltage necessary for flowing Idata.

At this time, the voltage between the gate and the source of the transistor 2001 has an appropriate magnitude for flowing Idata without depending on the current characteristics (such as mobility and threshold voltage) and the size (gate width and gate length) of the transistor 2001. It has become. Therefore, the transistor 2001 can pass the current Idata even if the current characteristics and size of the transistor 2001 vary. As a result, the transistor 2001 can operate as a current source, and can supply current to various loads (another transistor, a pixel, a signal line driver circuit, and the like).

When the current Idata flows through the transistor 2001, that is, when the setting operation is performed and when the current is supplied from the transistor 2001 to the load, the current flows through the transistor 2001 even when Vds changes. The current value does not change. However, even if the transistor operates in the saturation region, the current value may change due to the kink (early) effect. In that case, by controlling the potential of the second input terminal of the amplifier circuit 2004, the potential of the node 2008, that is, the potential of the second terminal of the transistor 2001 (which becomes the drain terminal at this time) can be controlled. (Early) The influence of the effect can be reduced.

For example, when the setting operation is performed and when the output operation is performed, Vds is substantially equal by appropriately controlling the potential of the second input terminal of the amplifier circuit 2004 according to the magnitude of the current Idata. can do.

Even when the voltage-current characteristics of the load change due to deterioration. By appropriately controlling the potential input to the second input terminal of the amplifier circuit 2004, Vds when performing the setting operation can be made approximately equal to Vds when performing the output operation. Therefore, an appropriate current can be supplied. Thereby, when the load is an EL element or the like, the burn-in of the EL element can be prevented.

Note that the amplifier circuit 2004 has a low output impedance. Therefore, a large current can be supplied. Accordingly, the source potential of the transistor 2001 can be set quickly. That is, the writing speed of the current Idata is increased and writing can be completed quickly. Further, even when the current Idata is small, the source terminal of the transistor can be quickly set to a desired potential, so that signal writing failure can be prevented.

The amplifier circuit 2004 has a function of detecting, amplifying and outputting a potential difference between the first input terminal and the second input terminal. In FIG. 20, the first input terminal of the amplifier circuit 2004 and the second terminal of the transistor 2001 (which becomes the drain terminal at this time) are connected, and the output terminal of the amplifier circuit 2004 and the first terminal of the transistor 2001 (the source at this time) Are connected). When the drain potential of the transistor 2001 changes, the potential of the first input terminal of the amplifier circuit 2004 also changes. Therefore, the output potential of the amplifier circuit 2004 also changes, and the source potential of the transistor 2001 also changes. Then, when the source potential of the transistor 2001 changes, the drain potential also changes. That is, a feedback circuit is formed. Therefore, a potential that stabilizes the state of each terminal is output from the amplifier circuit 2004 through the feedback operation as described above.

That is, in FIG. 20, a potential that stabilizes the potential of the drain terminal of the transistor 2001 is output from the amplifier circuit 2004 to the source terminal of the transistor 2001. At this time, the drain potential of the transistor 2001 can be controlled by a potential supplied to the wiring 2007. Therefore, the voltage applied to the current-voltage conversion element 2003 can be controlled by the potential supplied to the wiring 2007, that is, the current Idata flowing through the transistor 2001 can be controlled.

As described above, by using the feedback circuit including the amplifier circuit 2004, a source potential for allowing a desired current to flow through the transistor 2001 can be set. At this time, since the amplifier circuit 2004 is used, the setting of the source potential of the transistor 2001 can be completed quickly, and writing can be completed in a short time. The set transistor 2001 can be used as a current source circuit, and can supply current to various loads.

Note that although an N-channel transistor is used as a transistor in FIG. 20, a P-channel transistor can be applied to the semiconductor device described in this embodiment. The configuration in that case is shown in FIG.

The semiconductor device illustrated in FIG. 24 includes a transistor 2401, a capacitor 2402, a current-voltage conversion element 2403, and an amplifier circuit 2404. Note that the transistor 2401 is a P-channel transistor.

Note that the transistor 2401 has a first terminal (source terminal or drain terminal) connected to the output terminal of the amplifier circuit 2404 and a second terminal (source terminal or drain terminal) connected to the wiring 2405 through the current-voltage conversion element 2403. The gate terminal is connected to the wiring 2407. The gate terminal of the transistor 2401 is connected to the second input terminal of the amplifier circuit 2404 and is connected to the wiring 2406 through the capacitor 2402. A first input terminal of the amplifier circuit 2404 is connected to a wiring between the second terminal of the transistor 2401 and the current-voltage conversion element 2403. Note that a predetermined potential is supplied to the wiring 2407. A node 2408 is an intersection of a wiring between the second terminal of the transistor 2401 and the current-voltage conversion element 2403 and the first input terminal of the amplifier circuit 2404. Note that the low power supply potential Vss is supplied to the wiring 2405, the high power supply potential Vdd is supplied to the wiring 2406, and a predetermined potential is supplied to the wiring 2407. Here, Vss <Vdd.

Note that the capacitor 2402 only needs to hold the gate-source voltage of the transistor 2401. Therefore, if the output of the amplifier circuit 2404 is continuously supplied to the first terminal which is the source terminal of the transistor 2401, the capacitor 2402 only needs to hold the gate potential of the transistor 2401. Therefore, since the capacitor 2402 only needs to hold the gate potential of the transistor 2401, the potential supplied to the wiring 2406 is not limited. Further, when the gate capacitance of the transistor 2401 can be substituted, the capacitor 2402 is not necessarily provided.

Next, the operation will be briefly described. The voltage of the current-voltage conversion element 2403 is detected at the first input terminal of the amplifier circuit 2404. That is, the potential of the node 2408 is input to the first input terminal of the amplifier circuit 2404. Then, the amplifier circuit 2404 outputs a potential from the output terminal so that the potential difference between the potential input to the first input terminal and the potential input to the second input terminal becomes a predetermined potential difference. That is, the amplifier circuit 2404 controls the source potential of the transistor 2401 so that the potential difference between the potential of the node 2408 and the potential supplied to the wiring 2407 becomes a predetermined potential difference.

In this manner, the transistor 2401 can acquire a source potential for setting the potential of the node 2408 to a desired potential. Then, by setting the node 2408 to a desired potential, the voltage applied to the current-voltage conversion element 2403 can be changed to a desired voltage. At this time, a current Idata corresponding to the desired voltage applied to the current-voltage conversion element 2403 flows to the current-voltage conversion element 2403. This current Idata also flows through the transistor 2401. The transistor 2401 has a gate-source voltage necessary to pass Idata.

At this time, the voltage between the gate and the source of the transistor 2401 has an appropriate magnitude for flowing Idata without depending on the current characteristics (such as mobility and threshold voltage) and the size (gate width and gate length) of the transistor 2401. It has become. Therefore, the transistor 2401 can pass the current Idata even if the current characteristics and size of the transistor 2401 vary. As a result, the transistor 2401 can operate as a current source, and can supply current to various loads (another transistor, a pixel, a signal line driver circuit, and the like).

When the current Idata flows through the transistor 2401, that is, when the setting operation is performed and when the current is supplied from the transistor 2401 to the load, the current flows through the transistor 2401 even when Vds changes. The current value does not change. However, even if the transistor operates in the saturation region, the current value may change due to the kink (early) effect. In that case, by controlling the potential of the second input terminal of the amplifier circuit 2404, the potential of the node 2408, that is, the potential of the second terminal of the transistor 2401 (which becomes the drain terminal at this time) can be controlled. (Early) The influence of the effect can be reduced.

For example, when the setting operation is performed and when the output operation is performed, Vds is approximately equal by appropriately controlling the potential of the second input terminal of the amplifier circuit 2404 according to the magnitude of the current Idata. can do.

Even when the voltage-current characteristics of the load change due to deterioration. By appropriately controlling the potential input to the second input terminal of the amplifier circuit 2404, Vds when performing the setting operation can be made approximately equal to Vds when performing the output operation. Therefore, an appropriate current can be supplied. Thereby, when the load is an EL element or the like, the burn-in of the EL element can be prevented.

Note that the amplifier circuit 2404 has a low output impedance. Therefore, a large current can be supplied. Accordingly, the source potential of the transistor 2401 can be set quickly. That is, the writing speed of the current Idata is increased and writing can be completed quickly. Further, even when the current Idata is small, the source terminal of the transistor can be quickly set to a desired potential, so that signal writing failure can be prevented.

The amplifier circuit 2404 has a function of detecting, amplifying and outputting a potential difference between the first input terminal and the second input terminal. In FIG. 24, the second input terminal of the amplifier circuit 2404 and the second terminal of the transistor 2401 (which becomes the drain terminal at this time) are connected, and the output terminal of the amplifier circuit 2404 and the first terminal of the transistor 2401 (at this time, the source) Are connected). When the drain potential of the transistor 2401 changes, the potential of the first input terminal of the amplifier circuit 2404 also changes, so that the output potential of the amplifier circuit 2404 also changes and the source potential of the transistor 2401 also changes. When the source potential of the transistor 2401 changes, the drain potential also changes. That is, a feedback circuit is formed. Therefore, a potential that stabilizes the state of each terminal is output from the amplifier circuit 2404 through the feedback operation as described above.

That is, in FIG. 24, a potential that stabilizes the potential of the drain terminal of the transistor 2401 is output from the amplifier circuit 2404 to the source terminal of the transistor 2401. At this time, the drain potential of the transistor 2401 can be controlled by a potential supplied to the wiring 2407. Therefore, the voltage applied to the current-voltage conversion element 2403 can be controlled by the potential supplied to the wiring 2407, that is, the current Idata flowing through the transistor 2401 can be controlled.

As described above, by using the feedback circuit including the amplifier circuit 2404, a source potential for allowing a desired current to flow through the transistor 2401 can be set. At this time, since the amplifier circuit 2404 is used, the setting of the source potential of the transistor 2401 can be completed quickly, and writing can be completed in a short time. The set transistor 2401 can be used as a current source circuit, and can supply current to various loads.

(Embodiment 3)
In this embodiment, a structure applicable to the amplifier circuit of the semiconductor device described in Embodiments 1 and 2 will be described. An operational amplifier or a differential amplifier circuit can be applied as the amplifier circuit. The operational amplifier may be a voltage feedback operational amplifier, a current feedback operational amplifier, or an operational amplifier to which various correction circuits such as a phase compensation circuit are added. Note that the amplifier circuit described in this embodiment can be used in other embodiments described later.

Note that the operational amplifier normally operates so that the potential of the non-inverting input terminal is equal to the potential of the inverting input terminal. However, due to characteristic variation, the potential of the non-inverting input terminal and the potential of the inverting input terminal are equal. It may not be possible. That is, an offset voltage may occur. In that case, similarly to a normal operational amplifier, the potential of the non-inverting input terminal and the potential of the inverting input terminal may be adjusted so as to be equal. However, in this embodiment mode, the transistor may be controlled to operate in the saturation region. Therefore, an offset voltage may be generated in the operational amplifier as long as the transistor operates within the saturation region, and even if the offset voltage varies, the operation of the semiconductor device is not affected. For this reason, even if an operational amplifier is formed using transistors that have large variations in current characteristics, the semiconductor device operates normally.

First, a structure applicable to the amplifier circuit of the semiconductor device described in Embodiment 1 is described. FIG. 2 shows the case where an operational amplifier is applied to the amplifier circuit 104 of the semiconductor device of FIG. That is, the operational amplifier 201 is used as the amplifier circuit 104 in FIG. The operational amplifier 201 has a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal corresponds to the first input terminal of the amplifier circuit 104, and the inverting input terminal is the second input terminal of the amplifier circuit 104. And the output terminal corresponds to the output terminal of the amplifier circuit 104.

The operational amplifier 201 amplifies the potential difference between the inverting input terminal and the non-inverting input terminal and outputs a voltage from the output terminal. That is, when the potential of the node 109, that is, the potential of the non-inverting input terminal of the operational amplifier 201 is higher than the potential supplied to the wiring 108, that is, the potential of the inverting input terminal, the output voltage of the operational amplifier 201 becomes a positive voltage. Then, when the gate potential of the transistor 101 is increased by the output from the operational amplifier 201 and the current flowing through the transistor 101 is increased, the potential of the node 109 is decreased. Then, the potential of the non-inverting input terminal of the operational amplifier 201 is also lowered. Therefore, the potential difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier 201 is reduced. Then, the absolute value of the output voltage of the operational amplifier 201 is also reduced.

That is, when the potential of the node 109, that is, the potential of the non-inverting input terminal of the operational amplifier 201 is lower than the potential supplied to the wiring 108, that is, the potential of the inverting input terminal, the output voltage of the operational amplifier 201 becomes a negative voltage. Then, due to the output from the operational amplifier 201, when the gate potential of the transistor 101 decreases and the current flowing through the transistor 101 decreases, the potential of the node 109 increases. Then, the potential of the non-inverting input terminal of the operational amplifier 201 also increases. Therefore, the potential difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier 201 is reduced. Then, the absolute value of the output voltage of the operational amplifier 201 is also reduced.

Thus, there is a potential difference between the first input terminal and the second input terminal of the operational amplifier 201, and the potential of the node 109 is settled. Note that the certain potential difference includes a case where the potential difference is 0V. That is, it includes a so-called virtual short-circuit state in which the potential difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier 201 is approximately 0V. In this configuration, the operational amplifier 201 is connected so as to provide negative feedback.

Next, FIG. 13 illustrates the case where an operational amplifier is applied to the amplifier circuit 1204 of the semiconductor device in FIG. That is, the operational amplifier 1301 is used as the amplifier circuit 1204 in FIG. The operational amplifier 1301 has a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal corresponds to the first input terminal of the amplifier circuit 1204, and the inverting input terminal is the second input terminal of the amplifier circuit 1204. The output terminal corresponds to the output terminal of the amplifier circuit 1204.

The operational amplifier 1301 amplifies the potential difference between the inverting input terminal and the non-inverting input terminal and outputs a voltage from the output terminal. That is, if the potential of the node 1209, that is, the potential of the non-inverting input terminal of the operational amplifier 1301, is higher than the potential supplied to the wiring 1208, that is, the potential of the inverting input terminal, the output voltage of the operational amplifier 1301 becomes a positive voltage. When the gate potential of the transistor 1201 increases due to the output from the operational amplifier 1301 and the current flowing through the transistor 1201 decreases, the potential of the node 1209 decreases. Then, the potential of the non-inverting input terminal of the operational amplifier 1301 is also lowered. Therefore, the potential difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier 1301 is reduced. Then, the output voltage of the operational amplifier 1301 also decreases. Thus, the potential of the node 1209 is settled so that the first input terminal and the second input terminal of the operational amplifier 1301 have a certain potential difference. In this configuration, an operational amplifier 1301 is connected so as to provide negative feedback.

Next, FIG. 11 shows the case where a differential amplifier circuit is applied to the amplifier circuit 104 of the semiconductor device of FIG. That is, the differential amplifier circuit 1101 is used as the amplifier circuit 104 in FIG. The differential amplifier circuit 1101 includes a first transistor 1102, a second transistor 1103, a third transistor 1104, and a fourth transistor 1105.

The first transistor 1102 has a first terminal (one of a source terminal and a drain terminal) connected to the wiring 1107, and a second terminal (the other of the source terminal and the drain terminal) is a second terminal (source) of the third transistor 1104. Or one of drain terminals) and the gate terminal is connected to the second terminal of the transistor 101 at a node 109.

The second transistor 1103 has a first terminal (one of a source terminal and a drain terminal) connected to the wiring 1107 and a second terminal (the other of the source terminal and the drain terminal) connected to the second terminal of the fourth transistor 1105. (The source terminal or the drain terminal) and the gate terminal is connected to the wiring 108.

The third transistor 1104 has a gate terminal connected to the second terminal and the gate terminal of the fourth transistor 1105, and a first terminal (the other of the source terminal and the drain terminal) connected to the wiring 1106. ing.

In addition, the first terminal (the other of the source terminal and the drain terminal) of the fourth transistor 1105 is connected to the wiring 1106. A node 1108 to which the second terminal of the second transistor 1103 and the second terminal of the fourth transistor 1105 are connected is connected to the gate terminal of the transistor 101.

Note that a high power supply potential Vdd is supplied to the wiring 1106 and a low power supply potential Vss is supplied to the wiring 1107. The gate terminal of the first transistor 1102 corresponds to the first input terminal of the amplifier circuit 104, and the gate terminal of the second transistor 1103 corresponds to the second input terminal of the amplifier circuit 104. A node 1108 corresponds to the output terminal of the amplifier circuit 104.

Here, the operation of the differential amplifier circuit 1101 will be briefly described. The third transistor 1104 has a second terminal and a gate terminal connected to each other. That is, since the second terminal of the third transistor 1104 serves as a drain terminal, the third transistor 1104 is connected to the drain terminal and the gate terminal, and operates in a saturation region. In addition, the gate-source voltage of the first transistor 1102 is determined by the potential of the node 109, and the potential of the node 1109 is determined by the value. The potential of the node 1109 is also input to the gate terminal of the fourth transistor 1105. Thus, the gate-source voltage of the fourth transistor 1105 is determined. Further, the gate-source voltage of the second transistor 1103 is determined by the potential supplied to the wiring 108. The potential of the node 1108 is determined by the values of the gate-source voltage of the fourth transistor 1105 and the gate-source voltage of the second transistor 1103.

Here, the case where the characteristics of the first transistor 1102 and the second transistor 1103 are equal and the characteristics of the third transistor 1104 and the fourth transistor 1105 are equal is described. In this case, when the potential of the node 109 and the potential supplied to the wiring 108 are equal, the potential of the node 1109 and the potential of the node 1108 are equal, and when the potential of the node 109 is higher than the potential supplied to the wiring 108, The potential approaches the potential of the wiring 1107. Then, the gate-source voltage of the fourth transistor 1105 increases, and the potential of the node 1108 approaches the potential of the wiring 1106. Therefore, the potential output from the output terminal of the differential amplifier circuit 1101 increases.

Then, since the gate potential of the transistor 101 is increased, the gate-source voltage of the transistor 101 is increased. That is, the current flowing through the transistor 101 is increased. Accordingly, since the current flowing through the current-voltage conversion element 103 also increases, the voltage drop at the current-voltage conversion element 103 increases, and the potential of the node 109 decreases.

When the potential of the node 109 is lower than the potential supplied to the wiring 108, the potential of the node 1109 approaches the potential of the wiring 1106. Then, the gate-source voltage of the fourth transistor 1105 decreases, and the potential of the node 1108 approaches the potential of the wiring 1107. Therefore, the potential output from the output terminal of the differential amplifier circuit 1101 is lowered.

Then, since the gate potential of the transistor 101 becomes low, the gate-source voltage of the transistor 101 becomes low. That is, the current flowing through the transistor 101 is reduced. Accordingly, since the current flowing through the current-voltage conversion element 103 is also reduced, the voltage drop at the current-voltage conversion element 103 is reduced, and the potential of the node 109 is increased.

As described above, the semiconductor device having this structure operates so that the potential of the node 109 is lowered when the potential of the node 109 is higher than the potential supplied to the wiring 108, and the potential of the node 109 is supplied to the wiring 108. When the potential is lower than the potential, the node 109 operates so as to increase the potential. Then, the differential amplifier circuit 1101 operates so that the potential of the node 109 becomes equal to the potential of the wiring 108. Note that in the case where the first transistor 1102 and the second transistor 1103 have different characteristics, the transistor operates so as to have a predetermined potential difference. That is, the semiconductor device described in this embodiment mode is negative feedback.

Next, a case where an operational amplifier is applied to the amplifier circuit of the semiconductor device described in Embodiment Mode 2 will be described.

FIG. 21 shows the case where an operational amplifier is applied to the amplifier circuit 2004 of the semiconductor device in FIG. That is, the operational amplifier 2101 is used as the amplifier circuit 2004 in FIG. The operational amplifier 2101 has a non-inverting input terminal, an inverting input terminal, and an output terminal, the non-inverting input terminal corresponds to the second input terminal of the amplifier circuit 2004, and the inverting input terminal corresponds to the first input terminal of the amplifier circuit 2004. The output terminal corresponds to the output terminal of the amplifier circuit 2004.

Note that when the potential of the node 2008 is higher than the potential supplied to the wiring 2007, the semiconductor device having this structure operates so that the potential of the node 2008 becomes lower than the potential supplied to the wiring 2007. When the voltage decreases, the potential of the node 2008 is increased. That is, the semiconductor device described in this embodiment mode is negative feedback.

Next, FIG. 25 illustrates the case where an operational amplifier is applied to the amplifier circuit 2404 of the semiconductor device in FIG. That is, the operational amplifier 2501 is used as the amplifier circuit 2404 in FIG. The operational amplifier 2501 has a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal corresponds to the second input terminal of the amplifier circuit 2404 and the inverting input terminal corresponds to the first input terminal of the amplifier circuit 2404. The output terminal corresponds to the output terminal of the amplifier circuit 2404.

Note that the semiconductor device having this structure operates such that when the potential of the node 2408 becomes higher than the potential supplied to the wiring 2407, the potential of the node 2408 becomes lower, and the potential of the node 2408 becomes lower than the potential supplied to the wiring 2407. When the potential is lower, the potential of the node 2408 is increased. That is, the semiconductor device described in this embodiment mode is negative feedback.

(Embodiment 4)
In this embodiment mode, the semiconductor device structure in the case where a transistor in which a gate-source voltage is set is used as a current source and current is supplied to a load in the semiconductor device described in Embodiment Modes 1 to 3. Indicates.

First, in the case of using the basic principle of the semiconductor device shown in FIG. 1 of Embodiment 1, the configuration of a semiconductor device that supplies current to a load using a transistor having a gate-source voltage set as a current source is shown in FIG. Show. In the configuration of FIG. 5, the same reference numerals are used for portions common to FIG. 1.

The semiconductor device in FIG. 5 can supply current to the load 501 using the transistor 101 in which the gate-source voltage is set as a current source. The load 501 is connected between the second terminal of the transistor 101 and the wiring 505. A switch 502 is connected between the load 501 and the second terminal of the transistor 101. A switch 503 is connected between the second terminal of the transistor 101 and the node 109. A switch 504 is connected between the output terminal of the amplifier circuit 104 and the gate terminal of the transistor 101. Note that the high power supply potential Vdd2 is supplied to the wiring 505. The high power supply potential Vdd2 is Vdd2 <Vss, and may be equal to or different from the high power supply potential Vdd supplied to the wiring 107. Therefore, the wiring 505 may be the same wiring as the wiring 107.

Next, the operation of the semiconductor device having this structure will be described with reference to FIGS.

FIG. 6A shows a setting operation of the semiconductor device having this configuration. The switches 503 and 504 are turned on, and the switch 502 is turned off. Then, a current flows through the current-voltage conversion element 103. Then, the potential of the node 109 is input to the first input terminal of the amplifier circuit 104, and the amplifier circuit 104 sets the potential of the gate terminal of the transistor 101 so that the potential difference between the first input terminal and the second input terminal becomes a predetermined potential difference. Set. Thus, the gate-source voltage of the transistor 101 is set. That is, the writing of the signal current is completed. Next, the switch 504 and the switch 503 are turned off. When the switch 504 is turned off, the gate-source voltage of the transistor 101 can be held by the capacitor 102. Thus, the transistor 101 can be used as a current source.

FIG. 6B shows an output operation of the semiconductor device having this structure. The switches 503 and 504 are turned off and the switch 502 is turned on. Then, the current set by the transistor 101 can be supplied to the load 501.

66, a transistor 6601 may be applied to the switch 502 in FIG. 5 so that the gate terminal of the transistor 6601 and the gate terminal of the transistor 101 are connected. Accordingly, the transistor 101 and the transistor 6601 function as multi-gate transistors during the output operation. Therefore, the current flowing through the load 501 during the output operation can be made smaller than the current set during the setting operation. That is, the gate-source voltage of the transistor can be set by a large current during the setting operation.

Next, in the semiconductor device shown in FIG. 12 of the first embodiment, FIG. 14 shows a configuration in the case where current is supplied to a load using a transistor having a gate-source voltage set as a current source. In the configuration of FIG. 14, the same reference numerals are used in common with FIG. 12.

The semiconductor device in FIG. 14 can supply current to the load 1401 using the transistor 1201 in which the gate-source voltage is set as a current source. The load 1401 is connected between the second terminal of the transistor 1201 and the wiring 1405. A switch 1402 is connected between the load 1401 and the second terminal of the transistor 1201. A switch 1403 is connected between the second terminal of the transistor 1201 and the node 1209. A switch 1404 is connected between the output terminal of the amplifier circuit 1204 and the gate terminal of the transistor 1201. Note that the low power supply potential Vss2 is supplied to the wiring 1405. The low power supply potential Vss2 is Vss2 <Vdd, and may be equal to or different from the low power supply potential Vss supplied to the wiring 1207. Therefore, the wiring 1405 may be the same wiring as the wiring 1207.

Next, the operation of the semiconductor device having this structure will be described with reference to FIGS.

FIG. 15A shows a setting operation of the semiconductor device having this configuration. The switches 1403 and 1404 are turned on, and the switch 1402 is turned off. Then, a current flows through the current-voltage conversion element 1203. Then, the potential of the node 1209 is input to the first input terminal of the amplifier circuit 1204, and the amplifier circuit 1204 sets the potential of the gate terminal of the transistor 1201 so that the potential difference between the first input terminal and the second input terminal becomes a predetermined potential difference. Set. Thus, the gate-source voltage of the transistor 1201 is set. That is, the writing of the signal current is completed. Next, the switch 1404 and the switch 1403 are turned off. When the switch 1404 is turned off, the gate-source voltage of the transistor 1201 can be held by the capacitor 1202. Thus, the transistor 1201 can be used as a current source.

FIG. 15B shows an output operation of the semiconductor device having this structure. The switches 1403 and 1404 are turned off and the switch 1402 is turned on. Then, the current set by the transistor 1201 can be passed through the load 1401.

Next, in the semiconductor device shown in FIG. 20 of the second embodiment, FIG. 22 shows a configuration in the case where current is supplied to a load using a transistor having a gate-source voltage set as a current source. In the configuration of FIG. 22, the same reference numerals are used for portions common to FIG. 20.

The semiconductor device in FIG. 22 can supply current to the load 2201 using the transistor 2001 in which the gate-source voltage is set as a current source. The load 2201 is connected between the second terminal of the transistor 2001 and the wiring 2207. A switch 2202 is connected between the load 2201 and the second terminal of the transistor 2001. A switch 2205 is connected between the second terminal of the transistor 2001 and the node 2008. A switch 2204 is connected between the output terminal of the amplifier circuit 2004 and the first terminal of the transistor 2001. A switch 2203 is connected between the second input terminal of the amplifier circuit 2004 and the gate terminal of the transistor 2001. The first terminal of the transistor 2001 is connected to the wiring 2208 through the switch 2206. Note that the high power supply potential Vdd2 is supplied to the wiring 2207. The high power supply potential Vdd2 is Vdd2> Vss, and may be equal to or different from the high power supply potential Vdd supplied to the wiring 2005. Therefore, the wiring 2207 may be the same wiring as the wiring 2005.

Next, the operation of the semiconductor device having this structure will be described with reference to FIGS.

FIG. 23A shows a setting operation of the semiconductor device having this configuration. The switches 2203, 2204, and 2205 are turned on, and the switches 2202 and 2206 are turned off. Then, a current flows through the current-voltage conversion element 2003. The potential of the node 2008 is input to the first input terminal of the amplifier circuit 2004. The amplifier circuit 2004 sets the potential of the source terminal of the transistor 2001 so that the potential difference between the first input terminal and the second input terminal becomes a predetermined potential difference. Set. Thus, the gate-source voltage of the transistor 2001 is set. That is, the writing of the signal current is completed. Next, FIG. 23B shows an output operation of the semiconductor device having this structure. The switches 2203, 2204, and 2205 are turned off. When the switch 2203 is turned off, the gate potential of the transistor 2001 can be held by the capacitor 2002. Thus, the transistor 2001 can be used as a current source. When the switch 2202 and the switch 2206 are turned on, the current set by the transistor 2001 can be supplied to the load 2201.

Note that in the case where the wiring 2006 is not connected to the source terminal of the transistor 2001 and a certain potential is supplied to the wiring 2006, a setting operation (FIG. 23A) and an output operation (FIG. 23B) are performed. Thus, the source potential of the transistor 2001 may change. In that case, the gate-source voltage of the transistor 2001 may also change. When the gate-source voltage of the transistor 2001 changes, the value of the current flowing through the transistor 2001 also changes. Therefore, it is necessary to prevent the gate-source voltage of the transistor 2001 from changing between the setting operation and the output operation. In order to realize this, for example, the wiring 2006 may be connected to the source terminal of the transistor 2001. In such a case, even if the source potential of the transistor 2001 changes, the gate potential also changes accordingly, and as a result, the gate-source voltage can be prevented from changing.

Alternatively, the potential of the wiring 2208 may be controlled to be equal to the output potential of the amplifier circuit 2004 during the setting operation. For example, a voltage follower circuit or the like may be connected to the wiring 2208 to control the potential of the wiring 2208.

Alternatively, current may be supplied from the amplifier circuit 2004 even during an output operation as shown in FIG.

Note that as illustrated in FIG. 67, a transistor 6701 may be applied to the switch 2202 in FIG. 22 so that the gate terminal of the transistor 6701 and the gate terminal of the transistor 2001 are connected. Thus, the transistor 2001 and the transistor 6701 function as multi-gate transistors during the output operation. Therefore, the current flowing through the load 2201 during the output operation can be made smaller than the current set during the setting operation. That is, the gate-source voltage of the transistor can be set by a large current during the setting operation.

Next, in the semiconductor device shown in FIG. 24 of the second embodiment, FIG. 26 shows a configuration in the case where current is supplied to a load using a transistor having a gate-source voltage set as a current source. In the configuration of FIG. 26, the same reference numerals are used for portions common to FIG.

The semiconductor device in FIG. 26 can supply current to the load 2601 using the transistor 2401 in which the gate-source voltage is set as a current source. The load 2601 is connected between the second terminal of the transistor 2401 and the wiring 2607. A switch 2602 is connected between the load 2601 and the second terminal of the transistor 2401. A switch 2605 is connected between the second terminal of the transistor 2401 and the node 2408. A switch 2604 is connected between the output terminal of the amplifier circuit 2404 and the first terminal of the transistor 2401. A switch 2603 is connected between the first input terminal of the amplifier circuit 2404 and the gate terminal of the transistor 2401. The first terminal of the transistor 2401 is connected to the wiring 2608 through the switch 2606. Note that the low power supply potential Vss2 is supplied to the wiring 2607. The low power supply potential Vss2 is Vss2 <Vdd, and may be equal to or different from the low power supply potential Vss supplied to the wiring 2405. Therefore, the wiring 2607 may be the same wiring as the wiring 2405. Note that in this embodiment, the wiring 2406 is connected to a first terminal (here, a source terminal) of the transistor 2401.

Next, the operation of the semiconductor device having this configuration will be described with reference to FIGS.

FIG. 27A shows a setting operation of the semiconductor device having this configuration. The switch 2605, the switch 2603, and the switch 2604 are turned on, and the switch 2602 and the switch 2606 are turned off. Then, a current flows through the current-voltage conversion element 2403. Then, the potential of the node 2408 is input to the first input terminal of the amplifier circuit 2404, and the amplifier circuit 2404 sets the potential of the source terminal of the transistor 2401 so that the potential difference between the first input terminal and the second input terminal becomes a predetermined potential difference. Set. Thus, the gate-source voltage of the transistor 2401 is set. That is, the writing of the signal current is completed. Next, the switch 2603, the switch 2604, and the switch 2605 are turned off. When the switch 2603 and the switch 2604 are turned off, the gate-source voltage of the transistor 2401 can be held by the capacitor 2402. Thus, the transistor 2401 can be used as a current source.

FIG. 27B shows an output operation of the semiconductor device having this structure. The switches 2605, 2604, and 2603 are turned off, and the switches 2602 and 2606 are turned on. Then, the current set by the transistor 2401 can be passed through the load 2601.

(Embodiment 5)
In this embodiment, a semiconductor device capable of amplifying or attenuating a current set in a transistor during a setting operation and outputting it during an output operation will be described. That is, a current mirror circuit is applied to the semiconductor device of the present invention, or the gate length of a transistor serving as a current source is changed between a setting operation and an output operation.

First, FIG. 59 shows a structure in which a current mirror circuit is applied to a structure using the basic principle of the semiconductor device shown in FIG. In addition, about the structure which is common in FIG. 5, the description is abbreviate | omitted using a common code | symbol.

In FIG. 59, a transistor 5901 connected to the gate terminal of the transistor 101 is included. The transistor 5901 has a first terminal (one of a source terminal and a drain terminal) connected to the wiring 5902 and a second terminal (the other of the source terminal and the drain terminal) connected to the wiring 5904 through a load 5903. . Note that the wiring 5902 is preferably set to have substantially the same potential as the wiring 105. Then, the gate-source voltages of the transistor 101 and the transistor 5901 can be made substantially equal, so that the current flowing through the transistor 5901 can be easily set.

Subsequently, an operation of the semiconductor device in FIG. 59 will be described.

During the setting operation, the switches 503 and 504 are turned on. Then, a current flows through the current-voltage conversion element 103. The amplifier circuit 104 controls the gate potential of the transistor 101 so that the potential of the node 109 and the potential of the wiring 108 have a predetermined potential difference. Thus, the current Idata flowing through the transistor 101 can be set.

At this time, the gate terminal of the transistor 5901 is also at approximately the same potential as the gate terminal of the transistor 101. Therefore, when the potentials of the wiring 105 and the wiring 5902 are approximately equal, the gate-source voltages of the transistor 101 and the transistor 5901 are substantially equal. Therefore, when the channel length of the transistor 101 is L1, the channel width is W1, the channel length of the transistor 5901 is L2, and the channel width is W2, the transistors 101 and 5901 are such that (W1 / L1) = (W2 / L2). Is designed such that the current Idata also flows through the transistor 5901.

During the output operation, the switches 503 and 504 are turned off. Then, the gate potential of the transistor 101 and the transistor 5901 is held by the capacitor 102. That is, the gate-source voltage of the transistor 101 and the transistor 5901 is held by the capacitor 102. Accordingly, a current set by the transistor 5901 can be supplied to the load 5903 during the output operation.

Further, if the transistor 101 and the transistor 5901 are designed so that (W1 / L1)> (W2 / L2), the current flowing through the transistor 5901 during the output operation can be made smaller than the current flowing through the transistor 101 during the setting operation. it can. That is, the current of the transistor 5901 can be set by a current larger than a current desired to flow through the load during the output operation. Therefore, the setting operation can be completed quickly.

Conversely, the transistor 101 and the transistor 5901 may be designed so that (W1 / L1) <(W2 / L2). In this case, a current larger than the current flowing through the transistor 101 during the setting operation can be supplied to the load 5903 during the output operation.

Next, FIG. 60 shows a configuration in which a current mirror circuit is applied to the configuration using the basic principle of the semiconductor device shown in FIG. 22 of the fourth embodiment. Note that the same components as those in FIG. 22 are denoted by the same reference numerals, and the description thereof is omitted.

In FIG. 60, the transistor 6001 connected to the gate terminal of the transistor 2001 is provided. The transistor 6001 has a first terminal (one of a source terminal or a drain terminal) connected to the wiring 2006 and a second terminal (the other of the source terminal or the drain terminal) connected to the wiring 6003 through a load 6002. .

Subsequently, an operation of the semiconductor device in FIG. 60 will be described.

During the setting operation, the switch 2203, the switch 2204, and the switch 2205 are turned on, and the switch 2206 is turned off. Then, a current flows through the current-voltage conversion element 2003. The amplifier circuit 2004 controls the source potential of the transistor 2001 so that the potential of the node 2008 and the potential of the wiring 2007 have a predetermined potential difference. Thus, the current Idata flowing through the transistor 2001 can be set.

At this time, the gate-source voltages of the transistors 2001 and 6001 are substantially equal. Therefore, when the channel length of the transistor 2001 is L1, the channel width is W1, the channel length of the transistor 6001 is L2, and the channel width is W2, the transistors 2001 and 6001 are such that (W1 / L1) = (W2 / L2). Is designed so that the current Idata also flows through the transistor 6001.

During the output operation, the switch 2203, the switch 2204, and the switch 2205 are turned off, and the switch 2206 is turned on. Then, the gate-source voltage of the transistors 2001 and 6001 is held in the capacitor 2002. Thus, during output operation, the current set by the transistor 6001 can flow through the load 6002.

Further, if the transistor 2001 and the transistor 6001 are designed so that (W1 / L1)> (W2 / L2), the current flowing through the transistor 6001 during the output operation can be made smaller than the current flowing through the transistor 2001 during the setting operation. it can. That is, the current of the transistor 6001 can be set by a current larger than a current desired to flow through the load during the output operation. Therefore, the setting operation can be completed quickly.

Conversely, the transistor 2001 and the transistor 6001 may be designed so that (W1 / L1) <(W2 / L2). In this case, a current larger than the current flowing through the transistor 2001 during the setting operation can be passed through the load 6002 during the output operation.

Next, a configuration in which the gate length of the transistor serving as a current source can be changed between the setting operation and the output operation will be described.

First, in the configuration using the basic principle of the semiconductor device shown in FIG. 5 of the fourth embodiment, a transistor for setting a gate-source voltage for flowing a desired current during the setting operation, and a setting operation during the output operation FIG. 64 shows a structure in which the gate length with the transistor functioning as a current source can be changed by using the set gate-source voltage. In addition, about the structure which is common in FIG. 5, the description is abbreviate | omitted using a common code | symbol.

The semiconductor device in FIG. 64 includes a transistor 6401 connected in series with the transistor 101. That is, the transistor 6401 has a first terminal (one of a source terminal and a drain terminal) connected to the second terminal of the transistor 101, and a second terminal (the other of the source terminal and the drain terminal) is converted into a current-voltage converter via the switch 503. It is connected to the element 103. The gate terminal of the transistor 6401 is connected to the gate terminal of the transistor 101. In addition, the transistor 6401 has a first terminal and a second terminal connected to each other through a switch 6402. That is, when the switch 6402 is turned on, the first terminal and the second terminal of the transistor 6401, that is, the source terminal and the drain terminal are short-circuited.

Next, the operation will be described. During the setting operation, the switch 503, the switch 504, and the switch 6402 are turned on, and the switch 502 is turned off. Then, a current flows through the current-voltage conversion element 103. A current also flows through the transistor 101. Note that the source terminal and the drain terminal of the transistor 6401 are short-circuited through the switch 6402, and no current flows through the transistor 6401.

The amplifier circuit 2004 controls the gate potential of the transistor 101 so that the potential of the node 109 and the potential of the wiring 108 have a predetermined potential difference. Thus, the current Idata flowing through the transistor 101 can be set.

During the output operation, the switch 503, the switch 504, and the switch 6402 are turned off and the switch 502 is turned on. Then, the transistor 101 and the transistor 6401 function as a multi-gate transistor. Then, a current set by the transistor 101 and the transistor 6401 flows to the load 501.

Here, assuming that the channel length of the transistor 101 is L1 and the channel length of the transistor 6401 is L2, the channel length of the transistor for which the gate-source voltage is set during the setting operation is L1, and is set during the setting operation during the output operation. The channel length of a transistor that uses the gate-source voltage as a current source is L1 + L2. Therefore, a current smaller than the current set during the setting operation flows to the load 501 during the output operation. That is, the setting operation can be performed with a current larger than the current desired to flow through the load 501 during the output operation.

Note that if the switch 6402 is turned off during the setting operation and turned on during the output operation, a current larger than that in the setting operation can be supplied to the load 501.

Next, in the configuration using the basic principle of the semiconductor device shown in FIG. 22 of the fourth embodiment, a transistor for setting a gate-source voltage for flowing a desired current during the setting operation, and a setting operation during the output operation FIG. 65 shows a structure in which the gate length with a transistor serving as a current source can be changed by using a gate-source voltage that is sometimes set. Note that the same components as those in FIG. 22 are denoted by the same reference numerals, and the description thereof is omitted.

The semiconductor device in FIG. 65 includes a transistor 6501 connected in series with the transistor 2001. That is, the transistor 6501 has a first terminal (one of a source terminal and a drain terminal) connected to the second terminal of the transistor 2001, and a second terminal (the other of the source terminal and the drain terminal) is converted into a current-voltage converter via the switch 2205. It is connected to the element 2003. The gate terminal of the transistor 6501 is connected to the gate terminal of the transistor 2001. In addition, the transistor 6501 has a first terminal and a second terminal connected to each other through a switch 6502. That is, when the switch 6502 is turned on, the first terminal and the second terminal of the transistor 6501, that is, the source terminal and the drain terminal are short-circuited.

Note that if the switch 6502 is turned on during the setting operation and the switch 6502 is turned off during the output operation, a current smaller than the current set during the setting operation flows through the load 2201 during the output operation. That is, the setting operation can be performed with a current larger than the current desired to flow through the load 2201 during the output operation. Further, if the switch 6502 is turned off during the setting operation and turned on during the output operation, a current larger than that in the setting operation can be supplied to the load 2201.

(Embodiment 6)
In this embodiment, a structure of a semiconductor device including a circuit for setting a potential input to one input terminal of an operational amplifier in the structure of the semiconductor device described in Embodiment 3 is described.

First, FIG. 7 shows a semiconductor device having a circuit for setting a potential input to the inverting input terminal of the operational amplifier 201 of the semiconductor device shown in FIG. 2 that are the same as those in FIG. 2 are denoted by the same reference numerals and description thereof is omitted.

In the semiconductor device in FIG. 7, a switch 702 and a current source 701 are connected between a wiring 707 connected to the second terminal of the transistor 101 and the current-voltage conversion element 103. A switch 703 is connected between the node 109 and the second terminal of the transistor 101. A switch 704 is connected between the output terminal of the operational amplifier 201 and the gate terminal of the transistor 101. A switch 705 is connected between the output terminal and the inverting input terminal of the operational amplifier 201. Further, the inverting input terminal of the operational amplifier 201 is connected to the wiring 708 through the capacitor 706.

First, an operation for setting a potential input to the inverting input terminal of the operational amplifier will be described. As shown in FIG. 8, the switch 702 and the switch 705 are turned on, and the switch 703 and the switch 704 are turned off. Then, the current Idata that flows through the current source 701 flows through the current-voltage conversion element 103. Then, the potential of the node 109 at that time is input to the non-inverting input terminal of the operational amplifier 201. Here, the operational amplifier 201 is connected to the inverting input terminal and the output terminal when the switch 705 is turned on, and functions as a voltage follower. That is, the operational amplifier 201 outputs a potential that is approximately equal to the potential input to the non-inverting input terminal. Then, a charge corresponding to this potential is accumulated in the capacitor 706.

Next, as shown in FIG. 9, the switch 705 is turned off while the switch 702 is turned on and the switches 703 and 704 are turned off. Then, the capacitor 706 holds a potential that is substantially equal to that of the node 109. That is, the potential of the node 109 can be continuously input to the inverting input terminal of the operational amplifier 201.

Next, a setting operation for setting the gate-source voltage of the transistor 101 is described. As shown in FIG. 10, the switch 702 and the switch 705 are turned off, and the switch 703 and the switch 704 are turned on. Then, a voltage is output from the operational amplifier 201 so that the potential of the node 109 becomes a predetermined potential difference from the potential input to the inverting input terminal. Then, a current substantially equal to the current Idata flowing through the current source 701 flows through the transistor 101. That is, the transistor 101 has a gate-source voltage sufficient to pass the current Idata. Therefore, when the switch 704 is turned off, the gate-source voltage of the transistor 101 can be held, and the setting operation is completed.

Next, FIG. 16 illustrates a structure of a semiconductor device including a circuit for setting a potential input to one input terminal of an operational amplifier in the semiconductor device illustrated in FIG. 12 of Embodiment 1. In the configuration of FIG. 16, the same reference numerals are used for portions common to FIG. 12.

In the semiconductor device in FIG. 16, a switch 1602 and a current source 1601 are connected between a wiring 1607 and a wiring to which the second terminal of the transistor 1201 and the current-voltage conversion element 1203 are connected. A switch 1603 is connected between the node 1209 and the second terminal of the transistor 1201. A switch 1604 is connected between the output terminal of the operational amplifier 1301 and the gate terminal of the transistor 1201. A switch 1605 is connected between the output terminal and the inverting input terminal of the operational amplifier 1301. Further, the inverting input terminal of the operational amplifier 1301 is connected to the wiring 1608 through the capacitor 1606.

First, an operation for setting a potential input to the inverting input terminal of the operational amplifier will be described. As shown in FIG. 17, the switch 1602 and the switch 1605 are turned on, and the switch 1603 and the switch 1604 are turned off. Then, the current Idata flowing through the current source 1601 flows through the current-voltage conversion element 1203. Then, the potential of the node 1209 at that time is input to the non-inverting input terminal of the operational amplifier 1301. Here, the operational amplifier 1301 is connected to the inverting input terminal and the output terminal when the switch 1605 is turned on, and functions as a voltage follower. That is, the operational amplifier 1301 outputs a potential that is approximately equal to the potential input to the non-inverting input terminal. Then, a charge corresponding to this potential is accumulated in the capacitor 1606.

Next, as shown in FIG. 18, the switch 1605 is turned off while the switch 1602 is turned on and the switches 1603 and 1604 are turned off. Then, the capacitor 1606 holds a potential that is substantially equal to that of the node 1209. That is, the potential of the node 1209 can be continuously input to the inverting input terminal of the operational amplifier 1301.

Next, a setting operation for setting the gate-source voltage of the transistor 1201 is described. As shown in FIG. 19, the switch 1602 and the switch 1605 are turned off, and the switch 1603 and the switch 1604 are turned on. Then, a voltage is output from the operational amplifier 1301 so that the potential of the node 1209 becomes a predetermined potential difference from the potential input to the inverting input terminal. Then, a current substantially equal to the current Idata flowing through the current source 1601 flows through the transistor 1201. That is, the transistor 1201 has a gate-source voltage sufficient to pass the current Idata. Therefore, when the switch 1604 is turned off, the gate-source voltage of the transistor 1201 can be held, and the setting operation is completed.

(Embodiment 7)
The present invention can be applied to a display device in which a pixel is formed using a light-emitting element capable of controlling light emission luminance by a flowing current value. Typically, it can be used for an EL element.

Therefore, in this embodiment, the case where the structure of the semiconductor device described in Embodiment 3 is applied to a pixel of a display device will be described.

First, FIG. 29 shows the case where the structure of the semiconductor device shown in FIG. 2 of Embodiment 3 is applied to a pixel. The pixel 2917 includes a transistor 2907, a capacitor 2908, a light-emitting element 2909, a switch 2910, a switch 2911, a switch 2912, a first signal line 2918, a second signal line 2919, and a power supply line 2920. Note that a predetermined potential is supplied to the counter electrode 2916 of the light-emitting element 2909.

The transistor 2907 has a gate terminal connected to the power supply line 2920 through the capacitor 2908, a first terminal (one of a source terminal or a drain terminal) connected to the power supply line 2920, and a second terminal (a source terminal or a drain terminal). The other is connected to the pixel electrode of the light emitting element 2909 through the switch 2912. The second terminal of the transistor 2907 is connected to the first signal line 2918 through the switch 2911, and the gate terminal of the transistor 2907 is connected to the second signal line 2919 through the switch 2910.

The first signal line 2918 is connected to the wiring 2913 through the current-voltage conversion element 2901. The first signal line 2918 is connected to the wiring 2914 through the switch 2902 and the current source 2906. In addition, a non-inverting input terminal of an operational amplifier 2903 is connected to the first signal line 2918. Further, the inverting input terminal of the operational amplifier 2903 is connected to the wiring 2915 through the capacitor 2905. The output terminal of the operational amplifier 2903 is connected to the second signal line 2919. The inverting input terminal of the operational amplifier 2903 is connected to the output terminal via the switch 2904.

Next, the operation will be described with reference to FIG. In addition, although the code | symbol is not attached in FIG. 30, since it is the same as that of the structure of FIG. 29, it demonstrates using the code | symbol there.

First, as shown in FIG. 30A, the switch 2902 and the switch 2904 are turned on. Then, a current set by the current source 2906 flows through the current-voltage conversion element 2901. At that time, a voltage is generated in the current-voltage conversion element 2901. The potential input to the non-inverting input terminal of the operational amplifier 2903 decreases due to a voltage drop caused by the current-voltage conversion element 2901. That is, a potential which is lower than the potential of the wiring 2913 by a voltage generated in the current-voltage conversion element 2901 is input to the non-inverting input terminal of the operational amplifier 2903. At this time, the operational amplifier 2903 functions as a voltage follower because the inverting input terminal and the output terminal are conductive. That is, current is supplied from the output terminal of the operational amplifier 2903 until the potential of one electrode of the capacitor 2905 becomes substantially equal to the potential of the non-inverting input terminal. When no current is supplied from the output terminal of the operational amplifier 2903, the switch 2904 is turned off as shown in FIG. Then, the potential of the inverting input terminal of the operational amplifier 2903 is held by the capacitor 2905.

Next, as illustrated in FIG. 30C, the switch 2902 is turned off, and the switch 2910 and the switch 2911 are turned on. Then, a potential is supplied from the output terminal of the operational amplifier 2903 to the gate terminal of the transistor 2907 so that the potential of the non-inverting input terminal is equal to the potential input to the inverting input terminal. That is, when the potential of the non-inverting input terminal of the operational amplifier 2903 is higher than the potential of the inverting input terminal, the potential is supplied from the output terminal of the operational amplifier 2903 so that the gate potential of the transistor 2907 is increased. Thus, the current flowing through the transistor 2907 increases. Then, since the current flowing through the current-voltage conversion element 2901 increases, the voltage drop also increases. Accordingly, the potential input to the non-inverting input terminal of the operational amplifier 2903 is lowered. Further, when the potential of the non-inverting input terminal of the operational amplifier 2903 is lower than the potential of the inverting input terminal, the potential is supplied from the output terminal of the operational amplifier 2903 so that the gate potential of the transistor 2907 is lowered. Accordingly, the current flowing through the transistor 2907 is reduced. Then, since the current flowing through the current-voltage conversion element 2901 is reduced, the voltage drop is also reduced. Accordingly, the potential input to the non-inverting input terminal of the operational amplifier 2903 is increased. Thus, when the potential of the non-inverting input terminal of the operational amplifier 2903 becomes substantially equal to the potential of the inverting input terminal, the signal current Idata flows through the current-voltage conversion element 2901 and the transistor 2907. Thus, the signal writing to the pixel is completed.

In the light emission period, the switch 2910 and the switch 2911 are turned off and the switch 2912 is turned on as shown in FIG. Then, the current set in the transistor 2907 flows from the counter electrode 2916 to the light emitting element 2909 and the transistor 2907.

Next, FIG. 31 illustrates another structure in the case where the structure of the semiconductor device illustrated in FIG. 2 of Embodiment 3 is applied to a pixel. The pixel 3119 includes a switch 3107, a switch 3108, a signal holding unit 3109, a current source circuit 3110, a light emitting element 3111, a signal line 3112, a wiring 3113, a wiring 3114, and a power supply line 3120. Note that a predetermined potential is supplied to the counter electrode 3118 of the light-emitting element 3111.

The power supply line 3120 is connected to the pixel electrode of the light emitting element 3111 through the current source circuit 3110 and the switch 3108. The signal holding means 3109 is connected to the signal line 3112 via the switch 3107. In addition, a current is set in the current source circuit 3110 by the wiring 3113 and the wiring 3114. When a signal is input from the signal line 3112 to the signal holding unit 3109 while the switch 3107 is on, the signal holding unit 3109 holds the signal. Then, on / off of the switch 3108 is controlled by the signal held in the signal holding means 3109. When the switch 3108 is turned on, the current set in the current source circuit 3110 flows to the light emitting element 3111 while the signal is held in the signal holding unit 3109.

In addition, the wiring 3115 is connected to the wiring 3113 via the current-voltage conversion element 3101. In addition, a wiring 3116 is connected to the wiring 3113 through a switch 3102 and a current source 3106. The non-inverting input terminal of the operational amplifier 3103 is connected to the wiring 3113. Further, the inverting input terminal of the operational amplifier 3103 is connected to the wiring 3117 through the capacitor 3105. The output terminal of the operational amplifier 3103 is connected to the inverting input terminal via the switch 3104 and also connected to the wiring 3114.

An example of the configuration of the current source circuit 3110 is shown in FIG. 32, and its operation will be described with reference to FIG. 32 is a detailed diagram of the configuration of the current source circuit 3110 in FIG. 31, and common portions are denoted by common reference numerals and description thereof is omitted.

First, the configuration of FIG. 32 will be described. The current source circuit 3110 includes a transistor 3201, a capacitor 3202, a switch 3203, a switch 3204, a switch 3205, and a switch 3206. A first terminal (one of a source terminal and a drain terminal) of the transistor 3201 is connected to the pixel electrode of the light-emitting element 3111 through the switch 3108. The first terminal of the transistor 3201 is connected to the wiring 3207 through the switch 3204. In addition, the transistor 3201 has a first terminal and a gate terminal connected to each other through a capacitor 3202. The gate terminal of the transistor 3201 is connected to the wiring 3114 through the switch 3203. The second terminal (the other of the source terminal and the drain terminal) of the transistor 3201 is connected to the power supply line 3120 through the switch 3206 and the wiring 3113 through the switch 3205.

First, as shown in FIG. 33A, the switch 3102 and the switch 3104 are turned on. Then, a current set by the current source 3106 flows through the current-voltage conversion element 3101. At that time, a voltage is generated in the current-voltage conversion element 3101. The potential input to the non-inverting input terminal of the operational amplifier 3103 decreases due to a voltage drop caused by the current-voltage conversion element 3101. In other words, a potential which is lower than the potential of the wiring 3115 by the voltage generated in the current-voltage conversion element 3101 is input to the non-inverting input terminal of the operational amplifier 3103. At this time, the operational amplifier 3103 functions as a voltage follower because the inverting input terminal and the output terminal are conductive. That is, current is supplied from the output terminal of the operational amplifier 3103 until the potential of one electrode of the capacitor 3105 becomes substantially equal to the potential of the non-inverting input terminal. Then, when no current is supplied from the output terminal of the operational amplifier 3103, the switch 3104 is turned off as shown in FIG. Then, the potential of the inverting input terminal of the operational amplifier 3103 is held by the capacitor 3105.

Next, as illustrated in FIG. 33C, the switch 3102 is turned off, and the switch 3203, the switch 3204, and the switch 3205 are turned on. Then, a potential is supplied from the output terminal of the operational amplifier 3103 to the gate terminal of the transistor 3201 so that the potential of the non-inverting input terminal is equal to the potential input to the inverting input terminal. That is, when the potential of the non-inverting input terminal of the operational amplifier 3103 is higher than the potential of the inverting input terminal, the potential is supplied from the output terminal of the operational amplifier 3103 so that the gate potential of the transistor 3201 becomes higher. Thus, the current flowing through the transistor 3201 is increased. Then, since the current flowing through the current-voltage conversion element 3101 increases, the voltage drop also increases. Accordingly, the potential input to the non-inverting input terminal of the operational amplifier 3103 is lowered. Further, when the potential of the non-inverting input terminal of the operational amplifier 3103 is lower than the potential of the inverting input terminal, the potential is supplied from the output terminal of the operational amplifier 3103 so that the gate potential of the transistor 3201 is lowered. Thus, the current flowing through the transistor 3201 is reduced. Then, since the current flowing through the current-voltage conversion element 3101 is reduced, the voltage drop is also reduced. Accordingly, the potential input to the non-inverting input terminal of the operational amplifier 3103 is increased. Thus, when the potential of the non-inverting input terminal of the operational amplifier 3103 becomes substantially equal to the potential of the inverting input terminal, the signal current Idata flows through the current-voltage conversion element 3101 and the transistor 3201. Thus, programming of the pixel current source circuit 3110 is completed.

Then, in the signal writing period to the pixel, the switch 3203, the switch 3204, and the switch 3205 are turned off and the switch 3206 is turned on. Further, the switch 3107 is turned on, and a signal is input from the signal line 3112 to the signal holding unit 3109. The signal holding means 3109 holds the input signal. The on / off state of the switch 3108 is controlled by a signal held in the signal holding means 3109. When the switch 3108 is turned on, a current set by the transistor 3201 flows to the light-emitting element 3111 as illustrated in FIG.

Next, FIG. 34 shows the case where the structure of the semiconductor device shown in FIG. 21 of Embodiment 3 is applied to a pixel. The pixel 3424 includes a transistor 3408, a capacitor 3409, a light-emitting element 3410, a switch 3411, a switch 3412, a switch 3413, a switch 3414, a switch 3415, a signal line 3416, a wiring 3417, and a wiring 3418. Note that a predetermined potential is supplied to the counter electrode 3422 of the light-emitting element 3410.

The transistor 3408 has a gate terminal connected to the wiring 3418 through the switch 3411, a first terminal (one of a source terminal and a drain terminal) connected to the wiring 3417 through the switch 3415, and a second terminal (source terminal). Alternatively, the other of the drain terminals is connected to the signal line 3416 through the switch 3412. In addition, the transistor 3408 has a first terminal connected to the wiring 3423 through the switch 3414 and a second terminal connected to the pixel electrode of the light-emitting element 3410 through the switch 3413. Further, the gate terminal and the first terminal of the transistor 3408 are connected to each other through the capacitor 3409.

In addition, the signal line 3416 is connected to the wiring 3420 through the current-voltage conversion element 3401. In addition, the signal line 3416 is connected to the wiring 3421 through the switch 3402 and the current source 3419. Further, the inverting input terminal of the operational amplifier 3403 is connected to the signal line 3416. The operational amplifier 3403 has a non-inverting input terminal connected to the wiring 3418 and an output terminal connected to the wiring 3417. In addition, the signal line 3416 is connected to the wiring 3418 through the switch 3402, the switch 3406, the switch 3407, and the buffer 3405, and is connected to the wiring 3425 through the switch 3402, the switch 3406, and the capacitor 3404.

Next, the operation will be described with reference to FIG. In FIG. 35, the reference numerals are not used, but the structure is the same as that shown in FIG.

First, as shown in FIG. 35A, the switch 3402 and the switch 3406 are turned on. Then, a current set by the current source 3419 flows to the current-voltage conversion element 3401. At that time, a voltage is generated in the current-voltage conversion element 3401. Then, the potential input to one electrode of the capacitor 3404 decreases due to a voltage drop caused by the current-voltage conversion element 3401. That is, a potential which is lower than the potential of the wiring 3420 by a voltage generated in the current-voltage conversion element 3401 is input to one electrode of the capacitor 3404. Then, as shown in FIG. 35B, the switch 3406 is turned off. Then, since the other electrode of the capacitor 3404 is connected to the wiring 3425 to which a predetermined potential is supplied, the potential input to one electrode of the capacitor 3404 is held by the capacitor 3404.

Next, as illustrated in FIG. 35C, the switch 3402 is turned off, and the switch 3407, the switch 3411, the switch 3412, and the switch 3415 are turned on. Then, substantially the same potential as the potential held in the capacitor 3404 is output from the buffer 3405. The potential output from the buffer 3405 is supplied to the wiring 3418 and input to the non-inverting input terminal of the operational amplifier 3403 and the gate terminal of the transistor 3408. In addition, a current flows from the wiring 3420 to the output terminal of the operational amplifier 3403 through the current-voltage conversion element 3401 and the transistor 3408.

A potential that is lower than the potential of the wiring 3420 by the voltage generated in the current-voltage conversion element 3401 is input to the inverting input terminal of the operational amplifier 3403. The operational amplifier 3403 outputs a potential from the output terminal so that the potential difference input to the non-inverting input terminal and the potential difference input to the inverting input terminal is a predetermined potential difference.

Thus, electric charge corresponding to the gate-source voltage of the transistor 3408 is accumulated in the capacitor 3409.

Then, in the light emission period, as illustrated in FIG. 35D, the switch 3407, the switch 3411, the switch 3412, and the switch 3415 are turned off, and the switch 3413 and the switch 3414 are turned on. Then, a current set in the transistor 3408 flows from the counter electrode 3422 to the wiring 3423 through the light-emitting element 3410 and the transistor 3408.

(Embodiment 8)
In this embodiment, structures and operations of a display device, a signal line driver circuit, and the like are described. The semiconductor device of the present invention can be applied to a part of a signal line driver circuit or a pixel.

  The display device includes a pixel portion 3601, a scan line driver circuit 3602, and a signal line driver circuit 3610 as shown in FIG. The scan line driver circuit 3602 sequentially outputs selection signals to the pixel portion 3601. The signal line driver circuit 3610 sequentially outputs video signals to the pixel portion 3601. The pixel portion 3601 displays an image by controlling the state of light according to the video signal. In many cases, a video signal input from the signal line driver circuit 3610 to the pixel portion 3601 is a current. That is, the state of the display element arranged in each pixel and the element that controls the display element is changed by a video signal (current) input from the signal line driver circuit 3610. Examples of the display element arranged in the pixel include an EL element and an element used in an FED (Field Emission Display).

  Note that a plurality of scan line driver circuits 3602 and signal line driver circuits 3610 may be provided.

  The signal line driver circuit 3610 is divided into a plurality of parts. As an example, a shift register 3603, a first latch circuit 3604, a second latch circuit 3605, and a digital / analog conversion circuit 3606 are used. The digital-analog conversion circuit 3606 has a function of converting voltage into current, and may have a function of performing gamma correction. That is, the digital-analog converter circuit 3606 includes a circuit that outputs a current (video signal) to a pixel, that is, a current source circuit, and the present invention can be applied to the circuit.

  As shown in FIG. 31, depending on the configuration of a pixel, a digital voltage signal for a video signal and a control current for a current source circuit in the pixel may be input to the pixel. In that case, the digital-analog conversion circuit 3606 has a function of converting a voltage into a current instead of a digital-analog conversion function, and outputs a current to the pixel as a control current, that is, a current source circuit. The present invention can be applied thereto.

  Further, the pixel has a display element such as an EL element. A circuit for outputting a current (video signal) to the display element, that is, a current source circuit is provided, and the present invention can be applied thereto.

  Therefore, the operation of the signal line driver circuit 3610 will be briefly described. The shift register 3603 is formed using a plurality of columns of flip-flop circuits (FF) and the like, and these signals to which a clock signal (S-CLK), a start pulse (SP), and a clock inversion signal (S-CLKb) are input. Sampling pulses are sequentially output in accordance with the timings.

The sampling pulse output from the shift register 3603 is input to the first latch circuit 3604. A video signal is input from the video signal line 3608 to the first latch circuit 3604, and the video signal is held in each column in accordance with the timing at which the sampling pulse is input. Note that in the case where the digital-analog conversion circuit 3606 is provided, the video signal is a digital value. Further, the video signal at this stage is often a voltage.

However, in the case where the first latch circuit 3604 and the second latch circuit 3605 are circuits that can store analog values, the digital-analog conversion circuit 3606 can be omitted in many cases. In that case, the video signal is often a current. In addition, in the case where data output to the pixel portion 3601 is binary, that is, a digital value, the digital-analog conversion circuit 3606 can be omitted in many cases.

  In the first latch circuit 3604, when the holding of the video signal to the last column is completed, a latch pulse (Latch Pulse) is input from the latch control line 3609 during the horizontal blanking period and held in the first latch circuit 3604 The video signals are transferred all at once to the second latch circuit 3605. After that, the video signal held in the second latch circuit 3605 is input to the digital-analog conversion circuit 3606 for one row at the same time. A signal output from the digital-analog conversion circuit 3606 is input to the pixel portion 3601.

  While the video signal held in the second latch circuit 3605 is input to the digital-analog converter circuit 3606 and is input to the pixel portion 3601, a sampling pulse is output again in the shift register 3603. That is, two operations are performed simultaneously. Thereby, line-sequential driving becomes possible. Thereafter, this operation is repeated.

That is, the digital-analog conversion circuit 3606 includes a circuit having a configuration as shown in FIG. In FIG. 62, the case of 3 bits will be described for simplicity. That is, there are basic current source circuits 6201A, 6201B, and 6201C, and the magnitudes of currents during the setting operation are Ic, 2 × Ic, and 4 × Ic, respectively. Current source circuits 6202A, 6202B, and 6202C are connected to each other. Therefore, during the output operation, the current source circuits 6202A, 6202B, and 6202C output currents of magnitudes Ic, 2 × Ic, and 4 × Ic, respectively. And switches 6203A, 6203B, 6203C are connected in series with each current source circuit. This switch is controlled by a video signal output from the second latch circuit 3605 shown in FIG. The sum of the currents output from each current source circuit and the switch is output to the load, that is, the signal line. By operating as described above, an analog current is output as a video signal to the pixel.

  Note that in the case where the current source circuit included in the digital-analog converter circuit 3606 is a circuit that performs a setting operation and an output operation, that is, when a current is input from another current source circuit, the characteristics of the transistor vary. In the case of a circuit that can output a current that is not affected by the current, a circuit for passing a current is required for the current source circuit. In such a case, a reference current source circuit 3614 is arranged.

Note that when the setting operation is performed on the current source circuit, it is necessary to control the timing. In that case, a dedicated drive circuit (such as a shift register) may be arranged to control the setting operation. Alternatively, the setting operation for the current source circuit may be controlled using a signal output from a shift register for controlling the first latch circuit. That is, one shift register may control both the first latch circuit and the current source circuit. In that case, the signal output from the shift register for controlling the first latch circuit may be directly input to the current source circuit, or the control to the first latch circuit and the control to the current source circuit are separated. Therefore, the current source circuit may be controlled via a circuit that controls the separation. Alternatively, the setting operation to the current source circuit may be controlled using a signal output from the second latch circuit. Since the signal output from the second latch circuit is usually a video signal, in order to distinguish between the case where it is used as a video signal and the case where the current source circuit is controlled, a current source is connected via a circuit which controls the switching. What is necessary is just to control a circuit.

  Note that the signal line driver circuit and a part thereof (such as a current source circuit and an amplifier circuit) do not exist on the same substrate as the pixel portion 3601, and may be configured using, for example, an external IC chip.

  Note that the structure of the signal line driver circuit and the like is not limited to that in FIG.

  For example, when the first latch circuit 3604 and the second latch circuit 3605 are circuits that can store analog values, a video signal (analogue) is sent from the reference current source circuit 3614 to the first latch circuit 3604 as shown in FIG. Current) may be input. In FIG. 37, the second latch circuit 3605 may not exist. In such a case, there are many cases where more current source circuits are arranged in the first latch circuit 3604.

  In such a case, the present invention can be applied to the current source circuit in the digital-analog converter circuit 3606 in FIG. There are a plurality of unit circuits in the digital-analog converter circuit 3606, and a current source circuit and an amplifier circuit are arranged in the reference current source circuit 3614.

  Alternatively, the present invention can be applied to the current source circuit in the first latch circuit 3604 in FIG. The first latch circuit 3604 includes a plurality of unit circuits, and the reference current source circuit 3614 includes a basic current source and an additional current source. For example, as shown in FIG. 61, a basic current source circuit 6101 and a current source circuit 6102 are provided corresponding to the pixels in each column.

  Alternatively, the present invention can be applied to a pixel (current source circuit therein) in the pixel portion 3601 in FIGS. There are a plurality of unit circuits in the pixel portion 3601, and a current source circuit and an amplifier circuit are arranged in the signal line driver circuit 3610.

  That is, there are circuits that supply current to various parts of the circuit. Such a current source circuit needs to output an accurate current. Therefore, a setting is performed using another current source circuit so that the transistor can output an accurate current. Another current source circuit must also output an accurate current. Therefore, there is a basic current source circuit, from which current source transistors are set one after another. Thereby, the current source circuit can output an accurate current. Therefore, the present invention can be applied to such a portion.

(Embodiment 9)
In this embodiment, the structure of the display panel described in Embodiment 1 will be described with reference to FIGS.

38A is a top view showing the display panel, and FIG. 38B is a cross-sectional view taken along line A-A ′ in FIG. 38A. A signal line driver circuit 3801, a pixel portion 3802, a first scan line driver circuit 3803, and a second scan line driver circuit 3806 indicated by dotted lines are included. Further, a sealing substrate 3804 and a sealing material 3805 are provided, and an inner side surrounded by the sealing material 3805 is a space 3807.

  Note that the wiring 3808 is a wiring for transmitting a signal input to the first scan line driver circuit 3803, the second scan line driver circuit 3806, and the signal line driver circuit 3801, and is an FPC (flexible) that serves as an external input terminal. Print circuit) 3809 receives a video signal, a clock signal, a start pulse signal, and the like. On a connection portion between the FPC 3809 and the display panel, an IC chip (a semiconductor chip on which a memory circuit, a buffer circuit, or the like is formed) 3819A and an IC chip 3819B are mounted with COG (Chip On Glass) or the like. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC. The display device in this specification includes not only a display panel body but also a state in which an FPC or a PWB is attached thereto.

  Next, a cross-sectional structure will be described with reference to FIG. A pixel portion 3802 and its peripheral driver circuits (a first scan line driver circuit 3803, a second scan line driver circuit 3806, and a signal line driver circuit 3801) are formed over a substrate 3810. Here, a signal line A driver circuit 3801 and a pixel portion 3802 are shown.

  Note that the signal line driver circuit 3801 includes a TFT 3820 and a TFT 3821. In this embodiment mode, a display panel in which a peripheral drive circuit is integrally formed on a substrate is shown; however, it is not always necessary, and all or a part of the peripheral drive circuit is formed on an IC chip or the like and mounted by COG or the like. You may do it.

  In addition, the pixel portion 3802 includes a TFT 3811 and a TFT 3812. Note that a source electrode of the TFT 3812 is connected to a first electrode (pixel electrode) 3813. An insulating film 3814 is formed so as to cover an end portion of the first electrode 3813. Here, a positive photosensitive acrylic resin film is used.

  In order to improve the coverage, a curved surface having a curvature is formed at the upper end portion or the lower end portion of the insulating film 3814. For example, in the case where positive photosensitive acrylic is used as a material for the insulating film 3814, it is preferable that only the upper end portion of the insulating film 3814 has a curved surface with a curvature radius (0.2 μm to 3 μm). As the insulating film 3814, either a negative type that becomes insoluble in an etchant by light or a positive type that becomes soluble in an etchant by light can be used.

  Over the first electrode 3813, a layer 3816 containing an organic compound and a second electrode (counter electrode) 3817 are formed. Here, as a material used for the first electrode 3813 which functions as an anode, a material having a high work function is preferably used. For example, ITO (Indium Tin Oxide) film, Indium Zinc Oxide (IZO) film, Titanium nitride film, Chromium film, Tungsten film, Zn film, Pt film, etc., as well as titanium nitride and aluminum as main components And a three-layer structure of a titanium nitride film, a film containing aluminum as its main component, and a titanium nitride film can be used. Note that with a stacked structure, resistance as a wiring is low, good ohmic contact can be obtained, and a function as an anode can be obtained.

  The layer 3816 containing an organic compound is formed by an evaporation method using an evaporation mask or an inkjet method. For the layer 3816 containing an organic compound, a Group 4 metal complex of the periodic table of elements is used as a part thereof, and other materials that can be used in combination include a low molecular weight material and a high molecular weight material. It may be a material. In addition, as a material used for a layer containing an organic compound, an organic compound is usually used in a single layer or a stacked layer. However, in this embodiment, an inorganic compound is used for part of a film made of an organic compound. Will also be included. Further, a known triplet material can be used.

Further, as a material used for the second electrode 3817 formed over the layer 3816 containing an organic compound, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, CaF _2). Or calcium nitride). Note that in the case where light generated in the layer 3816 containing an organic compound transmits the second electrode 3817, a thin metal film and a transparent conductive film (indium tin) are used as the second electrode (cathode) 3817. A stack of an oxide (ITO), an indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like is preferably used.

  Further, a sealing substrate 3804 is attached to a substrate 3810 with a sealing material 3805, so that a light-emitting element 3818 is provided in a space 3807 surrounded by the substrate 3810, the sealing substrate 3804, and the sealing material 3805. Note that the space 3807 includes a structure filled with a sealant 3805 in addition to a case where the space 3807 is filled with an inert gas (such as nitrogen or argon).

  Note that an epoxy-based resin is preferably used for the sealant 3805. Moreover, it is desirable that these materials are materials that do not transmit moisture and oxygen as much as possible. In addition to a glass substrate and a quartz substrate, a plastic substrate made of FRP (Fiberglass-Reinforced Plastics), PVF (polyvinyl fluoride), Mylar, polyester, acrylic, or the like can be used as a material for the sealing substrate 3804.

  A display panel can be obtained as described above. Note that the above-described configuration is an example, and the configuration of the display panel of the present invention is not limited to this. Note that the semiconductor device of the present invention can be applied to the signal line driver circuit and the pixel of the display panel described in this embodiment mode.

As shown in FIG. 38, the signal line driver circuit 3801, the pixel portion 3802, the first scan line driver circuit 3803, and the second scan line driver circuit 3806 are integrally formed, whereby the cost of the display device can be reduced.

Note that as a structure of the display panel, as shown in FIG. 38A, a signal line driver circuit 3801, a pixel portion 3802, a first scan line driver circuit 3803, and a second scan line driver circuit 3806 are integrally formed. The configuration is not limited, and a signal line driver circuit 4401 shown in FIG. 44 corresponding to the signal line driver circuit 3801 may be formed over an IC chip and mounted on a display panel by COG or the like. Note that the substrate 4400, the pixel portion 4402, the first scan line driver circuit 4403, the second scan line driver circuit 4404, the FPC 4405, the IC chip 4406, the IC chip 4407, the sealing substrate 4408, and the sealing material in FIG. Reference numeral 4409 denotes a substrate 3810, a pixel portion 3802, a first scan line driver circuit 3803, a second scan line driver circuit 3806, an FPC 3809, an IC chip 3819A, an IC chip 3819B, a sealing substrate 3804, a sealing material in FIG. It corresponds to 3805.

That is, only the signal line driver circuit that requires high-speed operation of the driver circuit is formed on the IC chip using a CMOS or the like to reduce power consumption. Further, by using a semiconductor chip such as a silicon wafer as the IC chip, higher speed operation and lower power consumption can be achieved.

The second scan line driver circuit 4403 and the first scan line driver circuit 4404 are formed integrally with the pixel portion 4402, so that cost can be reduced.

Thus, the cost of a high-definition display device can be reduced. Further, by mounting an IC chip on which a functional circuit (memory or buffer) is formed at a connection portion between the FPC 4405 and the substrate 4400, the substrate area can be effectively used.

Further, the signal line driver circuit 4411 in FIG. 44B corresponding to the signal line driver circuit 3801, the first scan line driver circuit 3803, and the second scan line driver circuit 3806 in FIG. The line driver circuit 4414 and the second scan line driver circuit 4413 may be formed over an IC chip and mounted on the display panel with COG or the like. In this case, a high-definition display device can have lower power consumption. Therefore, in order to obtain a display device with lower power consumption, it is preferable to use polysilicon for a semiconductor layer of a transistor used in the pixel portion. Note that the substrate 4410, the pixel portion 4412, the FPC 4415, the IC chip 4416, the IC chip 4417, the sealing substrate 4418, and the sealant 4419 in FIG. 44B are the substrate 3810, the pixel portion 3802, the FPC 3809, and the IC in FIG. It corresponds to a chip 3819A, an IC chip 3819B, a sealing substrate 3804, and a sealing material 3805.

In addition, cost can be reduced by using amorphous silicon for the semiconductor layer of the transistor in the pixel portion 4412. Further, a large display panel can be manufactured.

Further, the second scan line driver circuit, the first scan line driver circuit, and the signal line driver circuit are not necessarily provided in the row direction and the column direction of the pixels. For example, as shown in FIG. 45A, the peripheral drive circuit 4501 formed on the IC chip has a first scan line drive circuit 4414, a second scan line drive circuit 4413, and a signal shown in FIG. The function of the line driver circuit 4411 may be provided. Note that the substrate 4500, the pixel portion 4502, the FPC 4504, the IC chip 4505, the IC chip 4506, the sealing substrate 4507, and the sealant 4508 in FIG. 45A are the substrate 3810, the pixel portion 3802, the FPC 3809, and the IC in FIG. It corresponds to a chip 3819A, an IC chip 3819B, a sealing substrate 3804, and a sealing material 3805.

FIG. 45B is a schematic diagram for explaining the wiring connection of the display device in FIG. A substrate 4510, a peripheral driver circuit 4511, a pixel portion 4512, an FPC 4513, and an FPC 4514 are provided. An external signal and a power supply potential are input from the FPC 4513 to the peripheral driver circuit 4511. Then, an output from the peripheral driver circuit 4511 is input to a wiring in a row direction and a column direction connected to the pixel included in the pixel portion 4512.

Further, examples of light-emitting elements applicable to the light-emitting element 3818 are illustrated in FIGS. That is, FIGS. 39A and 39B are used for the structures of the light-emitting elements applicable to the pixels described in Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 3, Embodiment Mode 4, and this embodiment mode. I will explain.

The light emitting element of FIG. 39A includes an anode 3902 on a substrate 3901, a hole injection layer 3903 made of a hole injection material, a hole transport layer 3904 made of a hole transport material thereon, a light emitting layer 3905, and an electron. In this element structure, an electron transport layer 3906 made of a transport material, an electron injection layer 3907 made of an electron injection material, and a cathode 3908 are stacked. Here, the light emitting layer 3905 may be formed of only one kind of light emitting material, but may be formed of two or more kinds of materials. Further, the structure of the element of the present invention is not limited to this structure.

  In addition to the stacked structure in which the functional layers shown in FIG. 39A are stacked, an element using a polymer compound, a high-efficiency element using a triplet light emitting material that emits light from a triplet excited state in the light emitting layer, and the like. There are a wide variety of variations. The present invention can also be applied to a white light emitting element obtained by controlling the carrier recombination region by the hole blocking layer and dividing the light emitting region into two regions.

  In the element manufacturing method of the present invention shown in FIG. 39A, first, a hole injection material, a hole transport material, and a light emitting material are sequentially deposited on a substrate 3901 having an anode 3902 (indium tin oxide: ITO). Next, an electron transport material and an electron injection material are vapor-deposited, and finally a cathode 3908 is formed by vapor deposition.

  Next, materials suitable for the hole injection material, the hole transport material, the electron transport material, the electron injection material, and the light emitting material are listed below.

As the hole injection material, porphyrin compounds, phthalocyanine (hereinafter referred to as “H ₂ Pc”), copper phthalocyanine (hereinafter referred to as “CuPc”), and the like are effective as long as they are organic compounds. In addition, any material that has a smaller ionization potential than the hole transport material used and has a hole transport function can also be used as the hole injection material. There is also a material obtained by chemically doping a conductive polymer compound, and examples thereof include polyethylenedioxythiophene (hereinafter referred to as “PEDOT”) doped with polystyrene sulfonic acid (hereinafter referred to as “PSS”), polyaniline, and the like. An insulating polymer compound is also effective in terms of planarization of the anode, and polyimide (hereinafter referred to as “PI”) is often used. In addition, inorganic compounds are also used. In addition to metal thin films such as gold and platinum, there are ultra thin films of aluminum oxide (hereinafter referred to as “alumina”).

  The most widely used hole transport material is an aromatic amine-based compound (that is, a compound having a benzene ring-nitrogen bond). As widely used materials, 4,4′-bis (diphenylamino) -biphenyl (hereinafter referred to as “TAD”) and its derivative 4,4′-bis [N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (hereinafter referred to as “TPD”), 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (hereinafter referred to as “α-NPD”) ). 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (hereinafter referred to as “TDATA”), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) And starburst aromatic amine compounds such as —N-phenyl-amino] -triphenylamine (hereinafter referred to as “MTDATA”).

As an electron transport material, a metal complex is often used, and Alq ₃ , BAlq, tris (4-methyl-8-quinolinolato) aluminum (hereinafter referred to as “Almq”), bis (10-hydroxybenzo [ h] -quinolinato) beryllium (hereinafter referred to as “Bebq”) and the like, and metal complexes having a quinoline skeleton or a benzoquinoline skeleton. Further, bis [2- (2-hydroxyphenyl) -benzoxazolate] zinc (hereinafter referred to as “Zn (BOX) ₂ ”), bis [2- (2-hydroxyphenyl) -benzothiazolate] zinc (hereinafter referred to as “Zn (BOX) ₂ ”) There is also a metal complex having an oxazole-based or thiazole-based ligand such as “Zn (BTZ) ₂ ”). In addition to metal complexes, 2- (4-biphenylyl) -5- (4-tert-butylphenyl) -1,3,4-oxadiazole (hereinafter referred to as “PBD”), OXD-7, and the like Oxadiazole derivatives of TAZ, 3- (4-tert-butylphenyl) -4- (4-ethylphenyl) -5- (4-biphenylyl) -23, 4-triazole (hereinafter referred to as “p-EtTAZ”) And phenanthroline derivatives such as bathophenanthroline (hereinafter referred to as “BPhen”) and BCP have electron transport properties.

The electron transport material described above can be used as the electron injection material. In addition, an ultra-thin film of an insulator such as a metal halide such as calcium fluoride, lithium fluoride, or cesium fluoride, or an alkali metal oxide such as lithium oxide is often used. In addition, alkali metal complexes such as lithium acetylacetonate (hereinafter referred to as “Li (acac)”) and 8-quinolinolato-lithium (hereinafter referred to as “Liq”) are also effective.

As the luminescent material, various fluorescent dyes are effective in addition to the metal complexes such as Alq ₃ , Almq, BeBq, BAlq, Zn (BOX) ₂ , Zn (BTZ) _{2 described} above. As fluorescent dyes, blue 4,4′-bis (2,2-diphenyl-vinyl) -biphenyl and red-orange 4- (dicyanomethylene) -2-methyl-6- (p-dimethylaminostyryl)- 4H-pyran. A triplet light emitting material is also possible, and is mainly a complex having platinum or iridium as a central metal. As the triplet light emitting material, tris (2-phenylpyridine) iridium, bis (2- (4′-tolyl) pyridinato-N, C ^{2 ′} ) acetylacetonatoiridium (hereinafter referred to as “acacIr (tpy) ₂ ”), 2,3,7,8,12,13,17,18-octaethyl-21H, 23H porphyrin-platinum and the like are known.

A highly reliable light-emitting element can be manufactured by combining the materials having the functions described above.

In addition, as illustrated in FIG. 39B, a light-emitting element in which layers are formed in the reverse order of FIG. 39A can be used. That is, a cathode 3918 on the substrate 3911, an electron injection layer 3917 made of an electron injection material, an electron transport layer 3916 made of an electron transport material, a light emitting layer 3915, a hole transport layer 3914 made of a hole transport material, In this element structure, a hole injection layer 3913 made of a hole injection material and an anode 3912 are laminated.

In addition, in order to extract light emitted from the light emitting element, at least one of the anode and the cathode may be transparent. Then, a TFT and a light emitting element are formed on the substrate, and a top emission that extracts light emission from a surface opposite to the substrate, a bottom emission that extracts light emission from the surface on the substrate side, and a surface opposite to the substrate side and the substrate. The pixel structure of the present invention can be applied to a light emitting element having any emission structure.

A light-emitting element having a top emission structure will be described with reference to FIG.

A driving TFT 4001 is formed over a substrate 4000, a first electrode 4002 is formed in contact with a source electrode of the driving TFT 4001, and a layer 4003 containing an organic compound and a second electrode 4004 are formed thereover.

The first electrode 4002 is an anode of the light emitting element. The second electrode 4004 is a cathode of the light emitting element. That is, a region where the layer 4003 containing an organic compound is sandwiched between the first electrode 4002 and the second electrode 4004 is a light-emitting element.

Here, as a material used for the first electrode 4002 functioning as an anode, a material having a high work function is preferably used. For example, in addition to a single layer film such as a titanium nitride film, a chromium film, a tungsten film, a Zn film, or a Pt film, a stack of titanium nitride and a film containing aluminum as a main component, a film containing a titanium nitride film and aluminum as a main component A three-layer structure of titanium nitride film and the like can be used. Note that with a stacked structure, resistance as a wiring is low, good ohmic contact can be obtained, and a function as an anode can be obtained. By using a metal film that reflects light, an anode that does not transmit light can be formed.

The material used for the second electrode 4004 functioning as a cathode is made of a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof such as MgAg, MgIn, AlLi, CaF ₂ , or calcium nitride). A stack of a metal thin film and a transparent conductive film (ITO (indium tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO), or the like) is preferably used. Thus, a cathode capable of transmitting light can be formed by using a thin metal thin film and a transparent conductive film having transparency.

In this manner, light from the light emitting element can be extracted to the upper surface as indicated by an arrow in FIG. That is, when applied to the display panel of FIG. 38, light is emitted to the sealing substrate 3804 side. Therefore, when a light-emitting element having a top emission structure is used for a display device, the sealing substrate 3804 is a light-transmitting substrate.

  In the case where an optical film is provided, an optical film may be provided over the sealing substrate 3804.

Note that a metal film made of a material having a low work function, such as MgAg, MgIn, or AlLi, which functions as the first electrode 4002 can be used. For the second electrode 4004, a transparent conductive film such as an ITO (indium tin oxide) film or indium zinc oxide (IZO) can be used. Therefore, according to this configuration, it is possible to increase the transmittance of top emission.

A light-emitting element having a bottom emission structure will be described with reference to FIG. Since the light-emitting element has the same structure as that in FIG. 40A except for the emission structure, the description will be made using the same reference numerals.

Here, as a material used for the first electrode 4002 functioning as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film having transparency, an anode capable of transmitting light can be formed.

The material used for the second electrode 4004 functioning as a cathode is made of a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof such as MgAg, MgIn, AlLi, CaF ₂ , or calcium nitride). A metal film can be used. Thus, by using a metal film that reflects light, a cathode that does not transmit light can be formed.

In this manner, light from the light emitting element can be extracted to the lower surface as indicated by an arrow in FIG. That is, when applied to the display panel of FIG. 38, light is emitted to the substrate 3810 side. Therefore, in the case where a light-emitting element having a bottom emission structure is used for a display device, the substrate 3810 is a light-transmitting substrate.

  In the case of providing an optical film, the substrate 3810 may be provided with an optical film.

A light-emitting element having a dual emission structure will be described with reference to FIG. Since the light-emitting element has the same structure as that in FIG. 40A except for the emission structure, the description will be made using the same reference numerals.

Here, as a material used for the first electrode 4002 functioning as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a light-transmitting conductive film, an anode that can transmit light can be formed.

The material used for the second electrode 4004 functioning as a cathode is made of a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof such as MgAg, MgIn, AlLi, CaF ₂ , or calcium nitride). A stack of a metal thin film and a transparent conductive film (ITO (indium tin oxide), indium zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like) is preferably used. Thus, a cathode capable of transmitting light can be formed by using a thin metal thin film and a transparent conductive film having transparency.

In this manner, light from the light emitting element can be extracted on both sides as indicated by arrows in FIG. That is, when applied to the display panel in FIG. 38, light is emitted to the substrate 3810 side and the sealing substrate 3804 side. Therefore, in the case where a light-emitting element having a dual emission structure is used for a display device, the substrate 3810 and the sealing substrate 3804 are both light-transmitting substrates.

  In the case where an optical film is provided, the optical film may be provided on both the substrate 3810 and the sealing substrate 3804.

In addition, the present invention can be applied to a display device that realizes full color display using a white light emitting element and a color filter.

As shown in FIG. 41, a base film 4102 is formed on a substrate 4100, a driving TFT 4101 is formed thereon, a first electrode 4103 is formed in contact with a source electrode of the driving TFT 4101, and an organic film is formed thereon. A layer 4104 containing a compound and a second electrode 4105 are formed.

The first electrode 4103 is an anode of the light emitting element. The second electrode 4105 is a cathode of the light emitting element. That is, a region where the layer 4104 containing an organic compound is sandwiched between the first electrode 4103 and the second electrode 4105 is a light-emitting element. 41 emits white light. A red color filter 4106R, a green color filter 4106G, and a blue color filter 4106B are provided above the light-emitting element, so that full color display can be performed. Further, a black matrix (also referred to as BM) 4107 for separating these color filters is provided.

  The above-described structures of the light-emitting elements can be used in combination and can be used as appropriate for a display device having the pixel structure of the present invention. In addition, the structure of the display panel and the light emitting element described above are examples, and the pixel structure of the present invention can of course be applied to display devices having other structures.

Next, a partial cross-sectional view of a pixel portion of the display panel is shown.

First, the case where a crystalline semiconductor film (polysilicon (p-Si: H) film) is used for a semiconductor layer of a transistor will be described with reference to FIGS.

Here, as the semiconductor layer, for example, an amorphous silicon (a-Si) film is formed on a substrate by a known film formation method. Note that the semiconductor film is not limited to an amorphous silicon film, and any semiconductor film including an amorphous structure (including a microcrystalline semiconductor film) may be used. Further, a compound semiconductor film including an amorphous structure such as an amorphous silicon germanium film may be used.

Then, the amorphous silicon film is crystallized by a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing furnace, or a thermal crystallization method using a metal element that promotes crystallization. Of course, these may be combined.

  By the above crystallization, a partially crystallized region is formed in the amorphous semiconductor film.

  Further, the crystalline semiconductor film partially improved in crystallinity is patterned into a desired shape, and an island-shaped semiconductor film is formed from the crystallized region. This semiconductor film is used for a semiconductor layer of a transistor. Note that patterning refers to processing a shape of a film, and forming a film pattern by a photolithography technique (for example, forming a contact hole in a photosensitive acrylic or using a photosensitive acrylic as a spacer) Shape processing), a mask pattern formed by photolithography, and etching using the mask pattern.

As shown in FIG. 42, a base film 42102 is formed over a substrate 42101, and a semiconductor layer is formed thereover. The semiconductor layer includes a channel formation region 42103 of the driving transistor 42118 and an impurity region 42105 to be a source region or a drain region, a channel formation region 42106 to be a lower electrode of the capacitor 42119, an LDD region 42107, and an impurity region 42108. Note that channel doping may be performed on the channel formation region 42103 and the channel formation region 42106.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, a plastic substrate, or the like can be used. As the base film 42102, a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ) or a stacked layer thereof can be used.

Over the semiconductor layer, a gate electrode 42110 and an upper electrode 42111 of a capacitor are formed with a gate insulating film 42109 interposed therebetween.

An interlayer insulating film 42112 is formed to cover the driving transistor 42118 and the capacitor 42119, and a wiring 42113 is in contact with the impurity region 42105 over the interlayer insulating film 42112 through a contact hole. A pixel electrode 42114 is formed in contact with the wiring 42113, and a second interlayer insulator 42115 is formed to cover the end portion of the pixel electrode 42114 and the wiring 42113. Here, a positive photosensitive acrylic resin film is used. A layer 42116 containing an organic compound and a counter electrode 42117 are formed over the pixel electrode 42114, and a light-emitting element 42120 is formed in a region where the layer 42116 containing an organic compound is sandwiched between the pixel electrode 42114 and the counter electrode 42117. .

In addition, as illustrated in FIG. 42B, a region 42201 in which an LDD region that forms part of the lower electrode of the capacitor 42119 overlaps with the upper electrode 42111 may be provided. Note that portions common to FIG. 42A are denoted by common reference numerals, and description thereof is omitted.

In addition, as illustrated in FIG. 43A, a second upper electrode 421301 formed in the same layer as the wiring 42113 in contact with the impurity region 42105 of the driving transistor 42118 may be provided. Note that portions common to FIG. 42A are denoted by common reference numerals, and description thereof is omitted. An interlayer insulating film 42112 is sandwiched between the second upper electrode 42301 and the upper electrode 42111 to form a second capacitor element. Further, since the second upper electrode 42301 is in contact with the impurity region 42108, the first capacitor element in which the gate insulating film 42109 is sandwiched between the upper electrode 42111 and the channel formation region 42106, the upper electrode 42111, A second capacitor element which is formed by sandwiching the interlayer insulating film 42112 with the second upper electrode 42301 is connected in parallel to form a capacitor element 42302 including the first capacitor element and the second capacitor element. is doing. Since the capacitance of the capacitor 42302 is a combined capacitance obtained by adding the capacitances of the first capacitor and the second capacitor, a capacitor with a large capacity can be formed with a small area. That is, the aperture ratio can be further improved when used as a capacitor having a pixel structure of the present invention.

Further, a structure of a capacitor as shown in FIG. A base film 43102 is formed over the substrate 43101, and a semiconductor layer is formed thereover. The semiconductor layer includes a channel formation region 43103 of the driving transistor 43118 and an impurity region 43105 to be a source region or a drain region. Note that channel doping may be performed on the channel formation region 43103.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, a plastic substrate, or the like can be used. The base film 43102 can be a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ), or a stacked layer thereof.

A gate electrode 43107 and a first electrode 43108 are formed over the semiconductor layer with a gate insulating film 43106 interposed therebetween.

A first interlayer insulating film 43109 is formed to cover the driving transistor 43118 and the first electrode 43108, and a wiring 4310 is in contact with the impurity region 43105 over the first interlayer insulating film 43109 through a contact hole. In addition, a second electrode 43111 in the same layer made of the same material as the wiring 43110 is formed.

Further, a second interlayer insulating film 43112 is formed so as to cover the wiring 43110 and the second electrode 43111, and a pixel electrode 43113 is formed on the second interlayer insulating film 43112 in contact with the wiring 43110 through a contact hole. Has been. In addition, a third electrode 43114 of the same layer made of the same material as the pixel electrode 43113 is formed. Here, a capacitor 43119 including the first electrode 43108, the second electrode 43111, and the third electrode 43114 is formed.

An insulating film 43115 is formed so as to cover an end portion of the pixel electrode 43113 and the third electrode 43114, and a layer 43116 containing an organic compound and a counter electrode 43117 are formed over the insulating film 43115 and the third electrode 43114, and the pixel electrode 43113 is formed. In the region where the layer 43116 containing an organic compound is sandwiched between the counter electrode 43117 and the counter electrode 43117, a light-emitting element 43120 is formed.

As described above, the structure of the transistor in which the crystalline semiconductor film is used for the semiconductor layer includes structures illustrated in FIGS. Note that the structure of the transistor illustrated in FIGS. 42 and 43 is an example of a top-gate transistor. That is, the transistor may be P-type or N-type. In the case of the N-type, the LDD region may overlap with the gate electrode, may not overlap with the gate electrode, or a part of the LDD region may overlap. Further, the gate electrode may be tapered, and an LDD region may be provided in a self-aligned manner below the tapered portion of the gate electrode. Further, the number of gate electrodes is not limited to two, but may be three or more multi-gate structures, or one gate electrode.

Further, as a transistor structure using polysilicon (p-Si) as a semiconductor layer, a structure in which a gate electrode is sandwiched between a substrate and a semiconductor layer, that is, a bottom gate in which a gate electrode is located under a semiconductor layer. FIG. 46A shows a partial cross section of a display panel to which a transistor is applied.

  A base film 4602 is formed over the substrate 4601. Further, a gate electrode 4603 is formed over the base film 4602. A first electrode 4604 made of the same material is formed in the same layer as the gate electrode. As a material for the gate electrode 4603, polycrystalline silicon to which phosphorus is added can be used. In addition to polycrystalline silicon, silicide which is a compound of metal and silicon may be used.

A gate insulating film 4605 is formed so as to cover the gate electrode 4603 and the first electrode 4604. As the gate insulating film 4605, a silicon oxide film, a silicon nitride film, or the like is used.

  In addition, a semiconductor layer is formed over the gate insulating film 4605. The semiconductor layer includes a channel formation region 4606, an LDD region 4607, and an impurity region 4608 serving as a source region or a drain region of the driver transistor 4622, and a channel formation region 4609 serving as a second electrode of the capacitor 4623, an LDD region 4610, and an impurity region 4611. Have Note that channel doping may be performed on the channel formation region 4606 and the channel formation region 4609.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, a plastic substrate, or the like can be used. As the base film 4602, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or a stacked layer thereof can be used.

A first interlayer insulating film 4612 is formed so as to cover the semiconductor layer, and a wiring 4613 is in contact with the impurity region 4608 over the first interlayer insulating film 4612 through a contact hole. In addition, a third electrode 4614 is formed using the same material in the same layer as the wiring 4613. A capacitor 4623 is formed by the first electrode 4604, the second electrode, and the third electrode 4614.

In addition, an opening 4615 is formed in the first interlayer insulating film 4612. A second interlayer insulating film 4616 is formed so as to cover the driving transistor 4622, the capacitor 4623, and the opening 4615, and a pixel electrode 4617 is formed over the second interlayer insulating film 4616 through a contact hole. An insulating film 4618 is formed so as to cover an end portion of the pixel electrode 4617. For example, a positive photosensitive acrylic resin film can be used. A layer 4619 containing an organic compound and a counter electrode 4620 are formed over the pixel electrode 4617, and a light-emitting element 4621 is formed in a region where the layer 4619 containing an organic compound is sandwiched between the pixel electrode 4617 and the counter electrode 4620. . An opening 4615 is located below the light emitting element 4621. That is, when light emitted from the light-emitting element 4621 is extracted from the substrate side, the transmittance can be increased because the opening 4615 is provided.

In FIG. 46A, the fourth electrode 4624 may be formed using the same material in the same layer as the pixel electrode 4617 so that the structure shown in FIG. Then, a capacitor 4625 including the first electrode 4604, the second electrode, the third electrode 4614, and the fourth electrode 4624 can be formed.

Next, the case where an amorphous silicon (a-Si: H) film is used for the semiconductor layer of the transistor will be described. FIG. 47 shows the case of a top gate transistor, and FIGS. 48 and 49 show the case of a bottom gate transistor.

FIG. 47A shows a cross section of a forward staggered transistor using amorphous silicon as a semiconductor layer. A base film 4702 is formed over the substrate 4701. Further, a pixel electrode 4703 is formed over the base film 4702. In addition, a first electrode 4704 made of the same material is formed in the same layer as the pixel electrode 4703.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, a plastic substrate, or the like can be used. As the base film 4702, a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ) or a stacked layer thereof can be used.

Further, a wiring 4705 and a wiring 4706 are formed over the base film 4702, and an end portion of the pixel electrode 4703 is covered with the wiring 4705. An N-type semiconductor layer 4707 and an N-type semiconductor layer 4708 each having an N-type conductivity are formed over the wirings 4705 and 4706. A semiconductor layer 4709 is formed between the wiring 4706 and the wiring 4705 and over the base film 4702. A part of the semiconductor layer 4709 extends to the N-type semiconductor layer 4707 and the N-type semiconductor layer 4708. Note that this semiconductor layer is formed of an amorphous semiconductor film such as amorphous silicon (a-Si: H) or microcrystalline semiconductor (μ-Si: H). In addition, a gate insulating film 4710 is formed over the semiconductor layer 4709. An insulating film 4711 made of the same material and in the same layer as the gate insulating film 4710 is also formed over the first electrode 4704. Note that as the gate insulating film 4710, a silicon oxide film, a silicon nitride film, or the like is used.

  In addition, a gate electrode 4712 is formed over the gate insulating film 4710. A second electrode 4713 made of the same material and in the same layer as the gate electrode is formed over the first electrode 4704 with an insulating film 4711 interposed therebetween. A capacitor element 4719 in which an insulating film 4711 is sandwiched between the first electrode 4704 and the second electrode 4713 is formed. Further, an interlayer insulating film 4714 is formed so as to cover an end portion of the pixel electrode 4703, the driving transistor 4718, and the capacitor 4719.

A region 4715 containing an organic compound and a counter electrode 4716 are formed over the interlayer insulating film 4714 and the pixel electrode 4703 located in the opening, and the pixel electrode 4703 and the counter electrode 4716 sandwich the layer 4715 containing an organic compound Then, a light emitting element 4717 is formed.

Alternatively, the first electrode 4704 illustrated in FIG. 47A may be formed using the first electrode 4720 as illustrated in FIG. 47B. The first electrode 4720 is formed of the same material as that of the wirings 4705 and 4706.

FIG. 48 shows a partial cross section of a display panel using a bottom-gate transistor using amorphous silicon as a semiconductor layer.

  A base film 4802 is formed over the substrate 4801. Further, a gate electrode 4803 is formed over the base film 4802. A first electrode 4804 made of the same material is formed in the same layer as the gate electrode. As a material for the gate electrode 4803, polycrystalline silicon to which phosphorus is added can be used. In addition to polycrystalline silicon, silicide which is a compound of metal and silicon may be used.

A gate insulating film 4805 is formed so as to cover the gate electrode 4803 and the first electrode 4804. As the gate insulating film 4805, a silicon oxide film, a silicon nitride film, or the like is used.

  In addition, a semiconductor layer 4806 is formed over the gate insulating film 4805. In addition, a semiconductor layer 4807 made of the same material is formed in the same layer as the semiconductor layer 4806.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, a plastic substrate, or the like can be used. As the base film 4802, a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ) or a stacked layer thereof can be used.

N-type semiconductor layers 4808 and 4809 having N-type conductivity are formed over the semiconductor layer 4806, and an N-type semiconductor layer 4810 is formed over the semiconductor layer 4807.

Wirings 4811 and 4812 are formed on the N-type semiconductor layers 4808 and 4809, respectively, and a conductive layer 4813 made of the same material as the wirings 4811 and 4812 is formed on the N-type semiconductor layer 4810.

A second electrode including the semiconductor layer 4807, the N-type semiconductor layer 4810, and the conductive layer 4813 is formed. Note that a capacitor 4820 having a structure in which the gate insulating film 4805 is sandwiched between the second electrode and the first electrode 4804 is formed.

One end of the wiring 4811 extends, and a pixel electrode 4814 is formed in contact with the upper part of the extended wiring 4811.

In addition, an insulating film 4815 is formed so as to cover the end portion of the pixel electrode 4814, the driving transistor 4819, and the capacitor 4820.

A layer 4816 containing an organic compound and a counter electrode 4817 are formed over the pixel electrode 4814 and the insulating film 4815, and a light-emitting element 4818 is formed in a region where the layer 4816 containing an organic compound is sandwiched between the pixel electrode 4814 and the counter electrode 4817. Has been.

The semiconductor layer 4807 and the N-type semiconductor layer 4810 which are part of the second electrode of the capacitor may not be provided. In other words, the second electrode may be the conductive layer 4813 and the capacitor may have a structure in which the gate insulating film is sandwiched between the first electrode 4804 and the conductive layer 4813.

Note that in FIG. 48A, the pixel electrode 4814 is formed before the wiring 4811 is formed, so that the second electrode 4821 and the first electrode each including the pixel electrode 4814 as illustrated in FIG. A capacitor 4822 having a structure in which the gate insulating film 4805 is sandwiched between 4804 can be formed.

Note that although an inverted staggered channel-etched transistor is shown in FIG. 48, it is needless to say that a transistor with a channel protective structure may be used. The case of a transistor having a channel protective structure will be described with reference to FIGS.

A transistor with a channel protection structure shown in FIG. 49A is an insulator 4901 serving as an etching mask over a region where a channel of the semiconductor layer 4806 of the driving transistor 4819 having a channel etch structure shown in FIG. 48A is formed. Are different from each other, and other common parts use common reference numerals.

Similarly, in the channel protection type transistor shown in FIG. 49B, an etching mask is formed on a region where the channel of the semiconductor layer 4806 of the channel etching structure driving transistor 4819 shown in FIG. 48B is formed. The difference is that an insulator 4901 is provided, and other common parts are denoted by common reference numerals.

By using an amorphous semiconductor film for a semiconductor layer (a channel formation region, a source region, a drain region, or the like) of a transistor included in the pixel of the present invention, manufacturing cost can be reduced.

Note that the structure of the transistor to which the pixel structure of the present invention can be applied and the structure of the capacitor are not limited to those described above, and transistors having various structures and structures of capacitors can be used. .

(Embodiment 10)
The semiconductor device of the present invention can be applied to circuit portions of various electronic devices. In particular, the semiconductor device of the present invention can be used for a circuit included in a display portion of an electronic device. Such electronic devices include video cameras, digital cameras, goggles-type displays, navigation systems, sound playback devices (car audio, audio components, etc.), computers, game devices, portable information terminals (mobile computers, mobile phones, portable games) Or an image reproducing apparatus (specifically, an apparatus having a display capable of reproducing a recording medium such as a digital versatile disc (DVD) and displaying the image). .

FIG. 50A shows a display including a housing 50001, a supporting base 50002, a display portion 50003, a speaker portion 50004, a video input terminal 50005, and the like. The display includes all display devices for displaying information such as for personal computers, for receiving television broadcasts, and for displaying advertisements.

FIG. 50B shows a camera, which includes a main body 50101, a display portion 50102, an image receiving portion 50103, operation keys 50104, an external connection port 50105, a shutter 50106, and the like.

  FIG. 50C illustrates a computer, which includes a main body 50201, a housing 50202, a display portion 50203, a keyboard 50204, an external connection port 50205, a pointing mouse 50206, and the like.

  FIG. 50D illustrates a mobile computer, which includes a main body 50301, a display portion 50302, a switch 50303, operation keys 50304, an infrared port 50305, and the like.

FIG. 50E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 50401, a housing 50402, a display portion A 50403, a display portion B 50404, a recording medium (such as a DVD). A reading unit 50405, an operation key 50406, a speaker unit 50407, and the like are included.

  FIG. 50F illustrates a goggle type display which includes a main body 50501, a display portion 50502, and an arm portion 50503.

  FIG. 50G illustrates a video camera, which includes a main body 50601, a display portion 50602, a housing 50603, an external connection port 50604, a remote control reception portion 50605, an image receiving portion 50606, a battery 50607, an audio input portion 50608, operation keys 50609, and an eyepiece Part 50610 and the like.

  FIG. 50H shows a cellular phone, which includes a main body 50701, a housing 50702, a display portion 50703, an audio input portion 50704, an audio output portion 50705, operation keys 50706, an external connection port 50707, an antenna 50708, and the like.

  Thus, the present invention can be applied to all electronic devices.

(Embodiment 11)
A structural example of a mobile phone in this embodiment is described with reference to FIG.

  A display panel 5310 is incorporated in a housing 5300 so as to be detachable. The shape and dimensions of the housing 5300 can be changed as appropriate in accordance with the size of the display panel 5310. A housing 5300 to which a display panel 5310 is fixed is fitted into a printed board 5301 and assembled as a module.

  The display panel 5310 is connected to the printed board 5301 through the FPC 5311. A signal processing circuit 5305 including a speaker 5302, a microphone 5303, a transmission / reception circuit 5304, a CPU, a controller, and the like is formed over the printed board 5301. Such a module, the input means 5306, and the battery 5307 are combined and housed in the housing 5309. The pixel portion of the display panel 5310 is arranged so that it can be seen from an opening window formed in the housing 5309.

  In the display panel 5310, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among the plurality of driver circuits) are integrally formed using a TFT over a substrate, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driving circuit having a high operating frequency among the circuits) may be formed over the IC chip, and the IC chip may be mounted on the display panel 5310 by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 44A shows an example of the structure of a display panel in which some peripheral drive circuits are formed integrally with a pixel portion on a substrate and an IC chip on which other peripheral drive circuits are formed is mounted by COG or the like. is there. With such a structure, the power consumption of the display device can be reduced, and the usage time by one charge of the mobile phone can be extended. In addition, the cost of the mobile phone can be reduced.

In order to further reduce power consumption, as shown in FIGS. 44 (b) and 45 (a), a pixel portion is formed on a substrate using TFTs, and all peripheral drive circuits are placed on an IC chip. Then, the IC chip may be mounted on the display panel by COG (Chip On Glass) or the like. In the pixel portion, the pixel structure in FIG. 2 is used, and an amorphous semiconductor film is used for the semiconductor layer of the transistor, so that the manufacturing cost can be reduced.

Further, the configuration shown in this embodiment is an example of a cellular phone, and the principle of the semiconductor device of the present invention can be applied to a circuit unit of a cellular phone having various configurations without being limited to the cellular phone having such a configuration. it can.

(Embodiment 12)
FIG. 51 shows an EL module in which a display panel 5101 and a circuit board 5102 are combined. A display panel 5101 includes a pixel portion 5103, a scan line driver circuit 5104, and a signal line driver circuit 5105. For example, a control circuit 5106 and a signal dividing circuit 5107 are formed on the circuit board 5102. The display panel 5101 and the circuit board 5102 are connected by a connection wiring 5108. An FPC or the like can be used for the connection wiring.

In the display panel 5101, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among a plurality of driver circuits) are integrally formed using a TFT over a substrate, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driver circuit having a high operating frequency among circuits is formed over an IC chip, and the IC chip is preferably mounted on the display panel 5101 by COG (Chip On Glass) or the like. Alternatively, the IC chip may be mounted on the display panel 5101 using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 44A shows an example of a configuration in which some peripheral drive circuits are formed integrally with a pixel portion on a substrate and an IC chip on which other peripheral drive circuits are formed is mounted by COG or the like.

Further, in order to further reduce power consumption, a pixel portion is formed on a glass substrate using TFTs, all peripheral drive circuits are formed on an IC chip, and the IC chip is a COG (Chip On Glass) display panel. May be implemented.

Note that when an amorphous semiconductor film is applied to a semiconductor layer of a transistor included in a pixel, a pixel portion is formed using a TFT over a substrate, and all peripheral driver circuits are formed over an IC chip. The IC chip may be mounted on the display panel by COG (Chip On Glass). FIG. 44B shows an example of a configuration in which an IC chip in which a pixel portion is formed on a substrate and a peripheral drive circuit is formed on the substrate is mounted by COG or the like.

  With this EL module, an EL television receiver can be completed. FIG. 52 is a block diagram illustrating a main configuration of an EL television receiver. A tuner 5201 receives a video signal and an audio signal. The video signal includes a video signal amplifying circuit 5202, a video signal processing circuit 5203 for converting a signal output from the video signal into a color signal corresponding to each color of red, green, and blue, and the video signal as input specifications of the drive circuit. Processing is performed by a control circuit 5106 for conversion. The control circuit 5106 outputs a signal to each of the scan line side and the signal line side. In the case of digital driving, a signal dividing circuit 5107 may be provided on the signal line side, and an input digital signal may be divided into m pieces and supplied.

  Of the signals received by the tuner 5201, the audio signal is sent to the audio signal amplifier circuit 5204, and the output is supplied to the speaker 5206 via the audio signal processing circuit 5205. The control circuit 5207 receives control information on the receiving station (reception frequency) and volume from the input unit 5208 and sends a signal to the tuner 5201 and the audio signal processing circuit 5205.

  As shown in FIG. 50A, the television set can be completed by incorporating the EL module shown in FIG. 51 into a housing 50001. A display portion 50003 is formed by the EL module. In addition, a speaker portion 50004, a video input terminal 50005, and the like are provided as appropriate.

  Of course, the present invention is not limited to a television receiver, and the principle of the semiconductor device of the present invention is applied to circuit sections such as personal computer monitors, information display boards at railway stations and airports, and advertisement display boards on streets. Can do.

In this embodiment, a configuration example of a pixel layout when the semiconductor device of the present invention is applied to a display device is shown.

FIG. 63 shows a pixel layout of the pixel 2917 shown in FIG.

63 includes a scan line 6301, a wiring 6302, a transistor 6307, a capacitor 6308, a pixel electrode 6309, a switch transistor 6310, a switch transistor 6311, a switch transistor 6312, a first signal line 6318, a second signal line 6319, and the like. A power supply line 6320 is included.

A capacitor 6308 is formed by a wiring electrically connected to the gate terminal of the transistor 6307 and a part of the power supply line 6320. The transistor 6307 has a first terminal (one of a source terminal or a drain terminal) connected to the power supply line 6320 and a second terminal (the other of the source terminal or the drain terminal) connected to a first terminal (a source terminal or a drain terminal) of the switch transistor 6312. One of the drain terminals) and the first terminal of the switch transistor 6311 (one of the source terminal and the drain terminal). The gate terminal of the transistor 6307 is connected to the first terminal (one of the source terminal and the drain terminal) of the switch transistor 6310. A second terminal (the other of the source terminal and the drain terminal) of the switch transistor 6310 is connected to the second signal line 6319, and a second terminal (the other of the source terminal and the drain terminal) of the switch transistor 6311 is connected to the first signal line 6318. It is connected to the. Further, the gate terminals of the switch transistor 6310 and the switch transistor 6311 are both connected to the scanning line 6301. The switch transistor 6312 has a gate terminal connected to the wiring 6302 and a second terminal (the other of the source terminal and the drain terminal) connected to the pixel electrode 6309.

Note that the transistor 6307, the capacitor 6308, the switch transistor 6310, the switch transistor 6311, the switch transistor 6312, the first signal line 6318, the second signal line 6319, and the power supply line 6320 are the transistor 2907 and the capacitor 2908 in the pixel in FIG. , Switch 2910, switch 2911, switch 2912, first signal line 2918, second signal line 2919, and power supply line 2920, respectively. Then, a layer containing an organic compound and a counter electrode are formed over the pixel electrode 6309, whereby the light-emitting element 2909 shown in FIG. 29 is completed.

Note that the pixel layout of this embodiment is an example, and the present invention is not limited to this.

FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. 8A and 8B illustrate operation of a semiconductor device of the present invention. FIG. 10 illustrates a structure in the case where a semiconductor device of the present invention is applied to part of a pixel and a signal line driver circuit. 4A and 4B illustrate operation of a pixel in the case where a semiconductor device of the present invention is applied to the pixel and part of a signal line driver circuit. FIG. 10 illustrates a structure in the case where a semiconductor device of the present invention is applied to part of a pixel and a signal line driver circuit. FIG. 10 illustrates a structure in the case where a semiconductor device of the present invention is applied to part of a pixel and a signal line driver circuit. 4A and 4B illustrate operation of a pixel in the case where a semiconductor device of the present invention is applied to the pixel and part of a signal line driver circuit. FIG. 10 illustrates a structure in the case where a semiconductor device of the present invention is applied to part of a pixel and a signal line driver circuit. 4A and 4B illustrate operation of a pixel in the case where a semiconductor device of the present invention is applied to the pixel and part of a signal line driver circuit. FIG. 6 illustrates a display device. FIG. 6 illustrates a display device. FIG. 6 illustrates a display panel. 4A and 4B each illustrate a light-emitting element that can be used in a display device. FIG. 6 illustrates a display panel. FIG. 6 illustrates a display panel. 10A and 10B each illustrate a structure of a transistor or a capacitor that can be used for a pixel. 10A and 10B each illustrate a structure of a transistor or a capacitor that can be used for a pixel. FIG. 6 illustrates a display panel. FIG. 6 illustrates a display panel. 10A and 10B each illustrate a structure of a transistor or a capacitor that can be used for a pixel. 10A and 10B each illustrate a structure of a transistor or a capacitor that can be used for a pixel. 10A and 10B each illustrate a structure of a transistor or a capacitor that can be used for a pixel. 10A and 10B each illustrate a structure of a transistor or a capacitor that can be used for a pixel. 10A and 10B each illustrate an electronic device having a display device in a display portion. The figure which shows the example of EL module. The block diagram which shows the main structures of EL television receiver. The figure which shows the structural example of a mobile telephone. The figure which shows the conventional pixel structure. FIG. 10 is a diagram illustrating an operation of a conventional pixel configuration. The figure explaining the conventional pixel structure. The figure explaining the operating point of the conventional circuit. The figure explaining the operating point of the conventional circuit. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a structure of a case where a semiconductor device of the present invention is applied to part of a signal line driver circuit. FIG. 11 illustrates a structure of a case where a semiconductor device of the present invention is applied to part of a signal line driver circuit. The figure which shows a pixel layout. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention. FIG. 11 illustrates a semiconductor device of the present invention.

Claims (11)

A semiconductor device including a circuit for controlling a current supplied to a load by a transistor,
One of the source terminal or the drain terminal of the transistor is electrically connected to the current-voltage conversion element,
An amplifying circuit is provided that controls a voltage generated in the current-voltage conversion element by controlling a voltage between a gate terminal and a source terminal of the transistor so that the transistor operates in a saturation region. A semiconductor device. A semiconductor device including a circuit for controlling a current supplied to a load by a transistor,
One of the source terminal or the drain terminal of the transistor is electrically connected to the current-voltage conversion element,
2. A semiconductor device, comprising: an amplifier circuit that controls a voltage generated in the current-voltage conversion element by controlling a potential of a gate terminal of the transistor so that the transistor operates in a saturation region. A semiconductor device including a circuit for controlling a current supplied to a load by a transistor,
One of the source terminal or the drain terminal of the transistor is electrically connected to the current-voltage conversion element,
An amplifying circuit for controlling a voltage generated in the current-voltage conversion element by controlling the other potential of the source terminal or the drain terminal of the transistor so that the transistor operates in a saturation region is provided. Semiconductor device. One of the source terminal and the drain terminal is connected to a wiring to which a potential is supplied, and the other of the source terminal and the drain terminal is electrically connected to the current-voltage conversion element;
The first input terminal is electrically connected to the other of the source terminal and the drain terminal of the transistor, the second input terminal is connected to a wiring to which a potential is supplied, and the output terminal is electrically connected to the gate terminal of the transistor. An amplifier circuit connected to
A semiconductor device comprising: A transistor having a capacitor between one of the source terminal or the drain terminal and the gate terminal, the other of the source terminal or the drain terminal being electrically connected to the current-voltage conversion element;
The first input terminal is electrically connected to the other of the source terminal and the drain terminal of the transistor, the second input terminal is connected to a wiring to which a potential is supplied, and the output terminal is electrically connected to the gate terminal of the transistor. An amplifier circuit connected to
A semiconductor device comprising: One of the source terminal and the drain terminal is connected to a wiring to which a potential is supplied, and the other of the source terminal and the drain terminal is electrically connected to the current-voltage conversion element;
The first input terminal is electrically connected to the other of the source terminal and the drain terminal of the transistor, the second input terminal is connected to a wiring to which a potential is supplied, and the output terminal is electrically connected to the gate terminal of the transistor. An amplifier circuit connected to
One electrode is electrically connected to the gate terminal of the transistor, and the other electrode is connected to a wiring to which a potential is supplied;
A semiconductor device comprising: One of a source terminal and a drain terminal is electrically connected to the current-voltage conversion element, and a gate terminal is connected to a wiring to which a potential is supplied;
The first input terminal is electrically connected to one of the source terminal or the drain terminal of the transistor, the second input terminal is electrically connected to the gate terminal of the transistor, and the output terminal is the source terminal of the transistor or A semiconductor device which is electrically connected to an amplifier circuit which is electrically connected to the other of the drain terminals. A transistor having a capacitor between one of the source terminal or the drain terminal and the gate terminal, the other of the source terminal or the drain terminal being electrically connected to the current-voltage conversion element;
The first input terminal is electrically connected to the other of the source terminal or the drain terminal of the transistor, the second input terminal is electrically connected to the gate terminal of the transistor, and the output terminal is the source terminal of the transistor or An amplifier circuit electrically connected to one of the drain terminals;
A semiconductor device comprising: One of the source terminal and the drain terminal is electrically connected to the current-voltage conversion element, the gate terminal is connected to a wiring to which a potential is supplied, and the first input terminal is a source terminal or drain terminal of the transistor. An amplifier circuit electrically connected to one side, a second input terminal electrically connected to the gate terminal of the transistor, and an output terminal electrically connected to the other of the source terminal or the drain terminal of the transistor;
One electrode is connected to the gate terminal of the transistor, and the other electrode is connected to a wiring to which a potential is supplied;
A semiconductor device comprising: 10. The semiconductor device according to claim 1, wherein the amplifier circuit is an operational amplifier. 11. The semiconductor device according to claim 1, wherein the current-voltage conversion element is a resistance element.

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