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Volume 27, Issue 1January 2022
Editor:
Publisher:
  • Association for Computing Machinery
  • New York
  • NY
  • United States
ISSN:1084-4309
EISSN:1557-7309
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SECTION: Survey Paper
research-article
A Comprehensive Survey of Attacks without Physical Access Targeting Hardware Vulnerabilities in IoT/IIoT Devices, and Their Detection Mechanisms

With the advances in the field of the Internet of Things (IoT) and Industrial IoT (IIoT), these devices are increasingly used in daily life or industry. To reduce costs related to the time required to develop these devices, security features are usually ...

SECTION: Regular Papers
research-article
A Novel Hybrid Cache Coherence with Global Snooping for Many-core Architectures

Cache coherence ensures correctness of cached data in multi-core processors. Traditional implementations of existing protocols make them unscalable for many core architectures. While snoopy coherence requires unscalable ordered networks, directory ...

research-article
Open Access
An Efficient Execution Framework of Two-Part Execution Scenario Analysis

Response Time Analysis (RTA) is an important and promising technique for analyzing the schedulability of real-time tasks under both Global Fixed-Priority (G-FP) scheduling and Global Earliest Deadline First (G-EDF) scheduling. Most existing RTA methods ...

research-article
Open Access
A Design Methodology for Energy-Aware Processing in Unmanned Aerial Vehicles

Unmanned Aerial Vehicles (UAVs) have rapidly become popular for monitoring, delivery, and actuation in many application domains such as environmental management, disaster mitigation, homeland security, energy, transportation, and manufacturing. However, ...

research-article
Improving LDPC Decoding Performance for 3D TLC NAND Flash by LLR Optimization Scheme for Hard and Soft Decision

Low-density parity-check (LDPC) codes have been widely adopted in NAND flash in recent years to enhance data reliability. There are two types of decoding, hard-decision and soft-decision decoding. However, for the two types, their error correction ...

research-article
A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits

Since the memristor emerged as a programmable analog storage device, it has stimulated research on the design of analog/mixed-signal circuits with the memristor as the enabler of in-memory computation. Due to the difficulty in evaluating the circuit-level ...

research-article
Demand-Driven Multi-Target Sample Preparation on Resource-Constrained Digital Microfluidic Biochips

Microfluidic lab-on-chips offer promising technology for the automation of various biochemical laboratory protocols on a minuscule chip. Sample preparation (SP) is an essential part of any biochemical experiments, which aims to produce dilution of a ...

research-article
Fault Injection Attack Emulation Framework for Early Evaluation of IC Designs

Fault injection attack (FIA) has become a serious threat to the confidentiality and fault tolerance of integrated circuits (ICs). Circuit designers need an effective method to evaluate the countermeasures of the IC designs against the FIAs at the design ...

research-article
Synthesizing Brain-network-inspired Interconnections for Large-scale Network-on-chips

Brain network is a large-scale complex network with scale-free, small-world, and modularity properties, which largely supports this high-efficiency massive system. In this article, we propose to synthesize brain-network-inspired interconnections for large-...

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