research-article

A Noninvasive Technique to Detect Authentic/Counterfeit SRAM Chips

Authors:

B. M. S. Bahar Talukder,

Md Tauhidur RahmanAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems, Volume 19, Issue 2

Article No.: 11, Pages 1 - 25

https://doi.org/10.1145/3597024

Published: 30 May 2023 Publication History

Abstract

Many commercially available memory chips are fabricated worldwide in untrusted facilities. Therefore, a counterfeit memory chip can easily enter into the supply chain in different formats. Deploying these counterfeit memory chips into an electronic system can severely affect security and reliability domains because of their substandard quality, poor performance, and shorter lifespan. Therefore, a proper solution is required to identify counterfeit memory chips before deploying them in mission-, safety-, and security-critical systems. However, a single solution to prevent counterfeiting is challenging due to the diversity of counterfeit types, sources, and refinement techniques. Besides, the chips can pass initial testing and still fail while being used in the system. Furthermore, existing solutions focus on detecting a single counterfeit type (e.g., detecting recycled memory chips). This work proposes a framework that detects major counterfeit static random-access memory (SRAM) types by attesting/identifying the origin of the manufacturer. The proposed technique generates a single signature for a manufacturer and does not require any exhaustive registration/authentication process. We validate our proposed technique using 345 SRAM chips produced by major manufacturers. The silicon results show that the test scores (F₁ score) of our proposed technique of identifying memory manufacturer and part-number are 93% and 71%, respectively.

References

[1]

Ali Ahmadi et al. 2016. A machine learning approach to fab-of-origin attestation. In 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’16). 1–6. DOI:

Digital Library

[2]

Nail Etkin Can Akkaya, Burak Erbagci, and Ken Mai. 2018. Secure chip odometers using intentional controlled aging. In 2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’18). 111–117. DOI:

[3]

Yousra M. Alkabani and Farinaz Koushanfar. 2007. Active hardware metering for intellectual property protection and security. In 16th USENIX Security Symposium (USENIX Security 07). USENIX Association, Boston, MA.

[4]

G. Apostolidis, Dimitrios Balobas, and Nikos Konofaos. 2016. Design and simulation of 6T SRAM cell architectures in 32nm technology. Journal of Engineering Science and Technology Review 9, 5 (2016), 145–149.

[5]

Arduino. [n. d.]. Arduino Due. Arduino. store.arduino.cc/usa/due.

[6]

Vivek Asthana et al. 2013. Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control. In 2013 Proceedings of the ESSCIRC (ESSCIRC’13). 415–418. DOI:

[7]

Abhishek Basak and Swarup Bhunia. 2016. P-Val: Antifuse-based package-level defense against counterfeit ICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35, 7 (2016), 1067–1078. DOI:

Digital Library

[8]

Gaston Baudat and Fatiha Anouar. 2000. Generalized discriminant analysis using a kernel approach. Neural Computation 12, 10 (2000), 2385–2404.

Digital Library

[9]

Daniel Berrar. 2019. Cross-validation. In Encyclopedia of Bioinformatics and Computational Biology, Shoba Ranganathan, Michael Gribskov, Kenta Nakai, and Christian Schönbach (Eds.). Academic Press, Oxford, 542–545. DOI:

[10]

Mudit Bhargava, Cagla Cakir, and Ken Mai. 2010. Attack resistant sense amplifier based PUFs (SA-PUF) with deterministic and controllable reliability of PUF responses. In 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’10). 106–111. DOI:

[11]

Y. Cao et al. 2002. Design sensitivities to variability: Extrapolations and assessments in nanometer VLSI. In 15th Annual IEEE International ASIC/SOC Conference. 411–415. DOI:

[12]

Leland Chang et al. 2008. An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches. IEEE Journal of Solid-State Circuits 43, 4 (2008), 956–963. DOI:

[13]

Ching-Te Chuang et al. 2007. High-performance SRAM in nanoscale CMOS: Design challenges and techniques. In 2007 IEEE International Workshop on Memory Technology, Design and Testing. 4–12. DOI:

Digital Library

[14]

US Congress. 2018. HR 5515–John S. McCain National Defense Authorization Act for fiscal year 2019. In 115th Congress, August, Vol. 13. www.congress.gov/bill/115th-congress/house-bill/5515/text.

[15]

Mafalda Cortez et al. 2012. Modeling SRAM start-up behavior for physical unclonable functions. In 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’12). 1–6. DOI:

Digital Library

[16]

Peter Deutsch and Jean-Loup Gailly. 1996. Zlib Compressed Data Format Specification Version 3.3. Technical Report. RFC 1950, May. www.ietf.org/rfc/rfc1950.txt.

Digital Library

[17]

Thomas G. Dietterichl. 2002. Ensemble learning. In The Handbook of Brain Theory and Neural Networks, M. Arbib (Ed.). MIT Press, 405–408.

[18]

P. Ehlig and S. Pezzino. 2017. Error Detection in SRAM. (Nov.2017). www.ti.com/lit/an/spracc0a/spracc0a.pdf.

[19]

Kaoutar Elkhiyaoui, Erik-Oliver Blass, and Refik Molva. 2012. CHECKER: On-site checking in RFID-based supply chains. In Proceedings of the 5th ACM Conference on Security and Privacy in Wireless and Mobile Networks. 173–184.

Digital Library

[20]

Antonio Jesús Fernández-García, Luis Iribarne, Antonio Corral, and Javier Criado. 2018. A comparison of feature selection methods to optimize predictive models based on decision forest algorithms for academic data analysis. In World Conference on Information Systems and Technologies. Springer, 338–347.

[21]

D. J. Forte and R. S. Chakraborty. 2018. Counterfeit integrated circuits: Threats, detection, and avoidance. In Conference on Cryptographic Hardware and Embedded Systems.

[22]

Martin Goetz and Ramesh Varma. 2017. Counterfeit electronic components identification: A case study. I-Connect007 (2017). smt.iconnect007.com/article/105495.

[23]

Ujjwal Guin et al. 2014. Counterfeit integrated circuits: A rising threat in the global semiconductor supply chain. Proc. IEEE 102, 8 (2014), 1207–1228. DOI:

[24]

Ujjwal Guin, Daniel DiMase, and Mohammad Tehranipoor. 2014. Counterfeit integrated circuits: Detection, avoidance, and the challenges ahead. Journal of Electronic Testing 30, 1 (2014), 9–23.

Digital Library

[25]

U. Guin, D. Forte, and M. Tehranipoor. 2016. Design of accurate low-cost on-chip structures for protecting integrated circuits against recycling. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24, 4 (2016), 1233–1246. DOI:

Digital Library

[26]

Ujjwal Guin, Wendong Wang, Charles Harper, and Adit D. Singh. 2019. Detecting recycled SoCs by exploiting aging induced biases in memory cells. In 2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’19). 72–80. DOI:

[27]

Zimu Guo et al. 2018. SCARe: An SRAM-based countermeasure against IC recycling. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, 4 (2018), 744–755. DOI:

[28]

Zimu Guo, Md. Tauhidur Rahman, Mark M. Tehranipoor, and Domenic Forte. 2016. A zero-cost approach to detect recycled SoC chips using embedded SRAM. In 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’16). 191–196. DOI:

[29]

Matt Hartzell. 2012. Counterfeit parts have real consequences. COMPUTERWORLD (2012). www.computerworld.com/article/2473854.

[30]

Trevor Hastie, Robert Tibshirani, and Jerome Friedman. 2009. The Elements of Statistical Learning: Data Mining, Inference, and Prediction. Springer Science & Business Media.

[31]

James A. Hayward and Janice Meraglia. 2011. DNA marking and authentication: A unique, secure anti-counterfeiting program for the electronics industry. In International Symposium on Microelectronics, Vol. 2011. International Microelectronics Assembly and Packaging Society. 107–112.

[32]

Kai He, Xin Huang, and Sheldon X.-D. Tan. 2015. EM-based on-chip aging sensor for detection and prevention of counterfeit and recycled ICs. In 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’15). 146–151. DOI:

Digital Library

[33]

Ryan L. Helinski et al. 2016. Electronic forensic techniques for manufacturer attribution. In 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’16). 139–144. DOI:

[34]

Daniel E. Holcomb, Wayne P. Burleson, and Kevin Fu. 2009. Power-Up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Trans. Comput. 58, 9 (2009), 1198–1210. DOI:

Digital Library

[35]

Ke Huang, John M. Carulli, and Yiorgos Makris. 2012. Parametric counterfeit IC detection via support vector machines. In 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’12). 7–12. DOI:

Digital Library

[36]

Ke Huang, John M. Carulli, and Yiorgos Makris. 2013. Counterfeit electronics: A rising threat in the semiconductor manufacturing industry. In 2013 IEEE International Test Conference (ITC’13). 1–4. DOI:

[37]

Anne Humeau-Heurtier. 2019. Texture feature extraction methods: A survey. IEEE Access 7 (2019), 8975–9000. DOI:

[38]

Md Nazmul Islam, Vinay C. Patii, and Sandip Kundu. 2018. On IC traceability via blockchain. In 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT’18). 1–4. DOI:

[39]

R. Khazaka, L. Mendizabal, D. Henry, and R. Hanna. 2015. Survey of high-temperature reliability of power electronics packaging components. IEEE Transactions on Power Electronics 30, 5 (2015), 2456–2464. DOI:

[40]

Farinaz Koushanfar, Gang Qu, and Miodrag Potkonjak. 2001. Intellectual property metering. In International Workshop on Information Hiding. Springer, 81–95.

[41]

Kelin J. Kuhn et al. 2011. Process technology variation. IEEE Transactions on Electron Devices 58, 8 (2011), 2197–2208. DOI:

[42]

Jinmo Kwon et al. 2012. Heterogeneous SRAM cell sizing for low-power H.264 applications. IEEE Transactions on Circuits and Systems I: Regular Papers 59, 10 (2012), 2275–2284. DOI:

[43]

Carl Levin and John McCain. 2012. Senate Armed Services Committee releases report on counterfeit electronic parts. Senate Committee on Armed Services (2012). www.armed-services.senate.gov/press-releases/senate-armed-services-committee-releases-report-on-counterfeit-electronic-parts.

[44]

Zhonghao Liao, George T. Amariucai, Raymond K. W. Wong, and Yong Guan. 2017. The impact of discharge inversion effect on learning SRAM power-up statistics. In 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST’17). 31–36. DOI:

[45]

T. J. Maloney and S. Dabral. 1996. Novel clamp circuits for IC power supply protection. IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part C 19, 3 (1996), 150–161. DOI:

[46]

Michail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, and Ricardo Reis. 2019. VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things. Springer. www.springer.com/gp/book/9783030156626.

[47]

Shayesteh Masoumian et al. 2020. Modeling static noise margin for FinFET based SRAM PUFs. In 2020 IEEE European Test Symposium (ETS). 1–6. DOI:

[48]

R. Mishra, M. Keimasi, and D. Das. 2004. The temperature ratings of electronic parts. Electronics Cooling 10, 1 (2004), 20.

[49]

Debasis Mukherjee, Hemanta Kr Mondal, and B. V. R. Reddy. 2010. Static noise margin analysis of SRAM cell for high speed application. International Journal of Computer Science Issues (IJCSI) 7, 5 (2010), 175.

[50]

J. Oberg. 2012. Did bad memory chips down Russia’s Mars probe? IEEE Spectrum (2012). nssdc.gsfc.nasa.gov/nmc/spacecraft/display.action?id=2011-065A.

[51]

Sang Phill Park, Kunhyuk Kang, and Kaushik Roy. 2009. Reliability implications of bias-temperature instability in digital ICs. IEEE Design Test of Computers 26, 6 (2009), 8–17. DOI:

Digital Library

[52]

C. Premalatha, K. Sarika, and P. Mahesh Kannan. 2015. A comparative analysis of 6T, 7T, 8T and 9T SRAM cells in 90nm technology. In 2015 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT’15). 1–5. DOI:

[53]

Peter Van Der Putten and Maarten Van Someren. 2004. A bias-variance analysis of a real world learning problem: The CoIL challenge 2000. Machine Learning 57, 1 (2004), 177–195.

Digital Library

[54]

Md. Tauhidur Rahman et al. 2014. CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly. In 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’14). 46–51. DOI:

[55]

M. Tauhidur Rahman et al. 2017. Systematic correlation and cell neighborhood analysis of SRAM PUF for robust and unique key generation. Journal of Hardware and Systems Security 1, 2 (2017), 137–155.

[56]

Md. Tauhidur Rahman and B. M. S. Bahar Talukder. 2021. Systems and methods for identifying counterfeit memory. (Oct.2021). https://patents.google.com/patent/US11139043B2/en.US Patent 11,139,043.

[57]

Md. Tauhidur Rahman, Domenic Forte, Jim Fahrny, and Mohammad Tehranipoor. 2014. ARO-PUF: An aging-resistant ring oscillator PUF design. In 2014 Design, Automation Test in Europe Conference Exhibition (DATE’14). 1–6. DOI:

[58]

Jeyavijayan Rajendran, Michael Sam, Ozgur Sinanoglu, and Ramesh Karri. 2013. Security analysis of integrated circuit camouflaging. In Proceedings of the 2013 ACM SIGSAC Conference on Computer & Communications Security. 709–720.

Digital Library

[59]

Jeyavijayan Rajendran, Ozgur Sinanoglu, and Ramesh Karri. 2013. Is split manufacturing secure?. In 2013 Design, Automation Test in Europe Conference Exhibition (DATE’13). 1259–1264. DOI:

[60]

R. Rollini, Jenyfal Sampson, and P. Sivakumar. 2017. Comparison on 6T, 5T and 4T SRAM cell using 22nm technology. In 2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE’17). 1–4. DOI:

[61]

Yizhak Shifman et al. 2018. A method to improve reliability in a 65-nm SRAM PUF array. IEEE Solid-State Circuits Letters 1, 6 (2018), 138–141.

[62]

O. Sinanoglu et al. 2013. Reconciling the IC test and security dichotomy. In 2013 18th IEEE European Test Symposium (ETS’13). 1–6. DOI:

[63]

Li Song, Hongbin Ma, Mei Wu, Zilong Zhou, and Mengyin Fu. 2018. A brief survey of dimension reduction. In Intelligence Science and Big Data Engineering, Yuxin Peng, Kai Yu, Jiwen Lu, and Xingpeng Jiang (Eds.). Springer International Publishing, Cham, 189–200.

[64]

B. M. S. Bahar Talukder et al. 2020. Towards the avoidance of counterfeit memory: Identifying the DRAM origin. In 2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’20). 111–121. DOI:

[65]

Temptronic ThermoStream. [n. d.]. ATS-605 Thermostream. Temptronic ThermoStream. www.intestthermal.com/temptronic/thermostream.

[66]

A. J. van de Goor and I. Schanstra. 2002. Address and data scrambling: Causes and impact on memory tests. In Proceedings of the 1st IEEE International Workshop on Electronic Design, Test and Applications’2002. 128–136.

[67]

Xinmu Wang et al. 2021. Hardware trojan attack in embedded memory. ACM Journal on Emerging Technologies in Computing Systems (JETC) 17, 1 (2021), 1–28.

Digital Library

[68]

Debao Wei et al. 2016. NRC: A nibble remapping coding strategy for NAND flash reliability extension. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35, 11 (2016), 1942–1946. DOI:

Digital Library

[69]

James B. Wendt, Farinaz Koushanfar, and Miodrag Potkonjak. 2014. Techniques for foundry identification. In 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC’14). 1–6. DOI:

Digital Library

[70]

Neil H. E. Weste and David Harris. 2015. CMOS VLSI Design: A Circuits and Systems Perspective. Pearson Education India.

[71]

Kan Xiao et al. 2014. Bit selection algorithm suitable for high-volume production of SRAM-PUF. In 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’14). 101–106. DOI:

[72]

Xiaolin Xu et al. 2015. Reliable physical unclonable functions using data retention voltage of SRAM cells. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 34, 6 (2015), 903–914. DOI:

Digital Library

[73]

Selen Yılmaz Isıkhan, Erdem Karabulut, and Celal Reha Alpar. 2016. Determining cutoff point of ensemble trees based on sample size in predicting clinical dose with DNA microarray data. Computational and Mathematical Methods in Medicine (2016).

[74]

Xuehui Zhang and Mohammad Tehranipoor. 2014. Design of on-chip lightweight sensors for effective detection of recycled ICs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22, 5 (2014), 1016–1029. DOI:

[75]

Xuehui Zhang, Nicholas Tuzzio, and Mohammad Tehranipoor. 2012. Identification of recovered ICs using fingerprints from a light-weight on-chip sensor. In DAC Design Automation Conference 2012. 703–708.

Digital Library

[76]

Xiaobo Zhang, Jianzhou Wang, and Yuyang Gao. 2019. A hybrid short-term electricity price forecasting framework: Cuckoo search-based feature selection with singular spectrum analysis and SVM. Energy Economics 81 (2019), 899–913.

Cited By

Singh HAmsaad F(2024)Enhancing Supply Chain Security: ML Assisted Manufacturer Identification of SRAM PUFs2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00161(812-816)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00161
Singh HBhatta NTawsik Jawad KGhimire ARahman MAmsaad F(2023)Evaluating the Robustness of SRAM Physical Unclonable Functions: Empirical Investigations2023 IEEE Physical Assurance and Inspection of Electronics (PAINE)10.1109/PAINE58317.2023.10317983(1-7)Online publication date: 24-Oct-2023
https://doi.org/10.1109/PAINE58317.2023.10317983

Index Terms

A Noninvasive Technique to Detect Authentic/Counterfeit SRAM Chips
1. Computer systems organization
  1. Embedded and cyber-physical systems
    1. Embedded systems
2. Security and privacy
  1. Security in hardware
    1. Embedded systems security

Recommendations

RFID tag data processing in manufacturing for track-and-trace anti-counterfeiting

We address the issues in e-pedigree management for RFID-based track-and-trace anti-counterfeiting.We propose an algorithm for RFID tag data processing and synchronization (TDPS) to generate initial e-pedigree for apparel products during production.We ...
New Technique for Reducing Sub-threshold Leakage in SRAM
ACCT '12: Proceedings of the 2012 Second International Conference on Advanced Computing & Communication Technologies

Suppressing the leakage current in memories is critical in low-power design. Memory leakage suppression is critically important for the success of power-efficient designs, especially for ultra-low power applications. As the channel length of the MOSFET ...
Multi-port FinFET SRAM design
GLSVLSI '13: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI

Multi-port SRAMs are essential for caches and shared data structures, especially in modern multi-core SoCs. The FinFET device, which offers high threshold voltage and high on/off current ratio, is a promising candidate for multi-port SRAMs for fast read/...

Comments

Information & Contributors

Information

Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 19, Issue 2

April 2023

214 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/3587888

Editor:
Ramesh Karri
Polytechnic Institute of New York University, USA

Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

Publisher

Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 30 May 2023

Online AM: 11 May 2023

Accepted: 23 April 2023

Revised: 27 November 2022

Received: 22 December 2021

Published in JETC Volume 19, Issue 2

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Funding Sources

National Science Foundation

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

1
Total Citations
View Citations
179
Total Downloads

Downloads (Last 12 months)65
Downloads (Last 6 weeks)3

Reflects downloads up to 06 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

Singh HAmsaad F(2024)Enhancing Supply Chain Security: ML Assisted Manufacturer Identification of SRAM PUFs2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00161(812-816)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00161
Singh HBhatta NTawsik Jawad KGhimire ARahman MAmsaad F(2023)Evaluating the Robustness of SRAM Physical Unclonable Functions: Empirical Investigations2023 IEEE Physical Assurance and Inspection of Electronics (PAINE)10.1109/PAINE58317.2023.10317983(1-7)Online publication date: 24-Oct-2023
https://doi.org/10.1109/PAINE58317.2023.10317983

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Article

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Full Text

View this article in Full Text.

HTML Format

View this article in HTML Format.

Media

Figures

Other

Tables

View full text|Download PDF

View Issue’s Table of Contents