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Saving energy with architectural and frequency adaptations for multimedia applications

Published: 01 December 2001 Publication History

Abstract

General-purpose processors are expected to be increasingly employed for multimedia workloads on systems where reducing energy consumption is an important goal. Researchers have proposed the use of two forms of hardware adaptation - architectural adaptation and dynamic voltage (and frequency) scaling or DVS - to reduce energy. This paper develops and evaluates an integrated algorithm to control both architectural adaptation and DVS targeted to multimedia applications. It also examines the interaction between the two forms of adaptation, identifying when each will perform better in isolation and when the addition of architectural adaptation will benefit DVS.Our adaptation control algorithm is effective in saving energy and exploits most of the available potential. For the applications and systems studied, DVS is consistently better than architectural adaptation in isolation. The addition of architectural adaptation to DVS benefits some applications, but not all. Finally, in a seemingly counter-intuitive result, we find that while less aggressive architectures reduce energy for fixed frequency hardware, with DVS, more aggressive architectures are often more energy efficient.

References

[1]
D. H. Albonesi. Selective Cache Ways: On-Demand Cache Resource Allocation. In Proc. of the 32nd Annual Intl. Symp. on Microarchitecture, 1999.]]
[2]
L. Benini and G. D. Micheli. Dynamic Power Management: Design Techniques and CAD Tools. Kluwer Acad. Publ., 1997.]]
[3]
G. Blalock. Microprocessors Outperform DSPs 2:1. Microprocessor Report, December 1996.]]
[4]
D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A Framework for Architectural-Level Power Analysis and Optimizations. In Proc. of the 27th Annual Intl. Symp. on Comp. Architecture, 2000.]]
[5]
H.-H. Chu. CPU Service Classes: A Soft Real Time Framework for Multimedia Applications. PhD thesis, University of Illinois at Urbana-Champaign, 1999.]]
[6]
T. M. Conte et al. Challenges to Combining General-Purpose and Multimedia Processors. IEEE Computer, December 1997.]]
[7]
K. Diefendorff and P. K. Dubey. How Multimedia Workloads Will Change Processor Design. IEEE Computer, September 1997.]]
[8]
D. Folegnani and A. Gonzalez. Energy-Efficient Issue Logic. In Proc. of the 28th Annual Intl. Symp. on Comp. Architecture, 2001.]]
[9]
S. Ghiasi, J. Casmira, and D. Grunwald. Using IPC Variation in Workloads with Externally Specified Rates to Reduce Power Consumption. In Proc. of the Workshop on Complexity-Effective Design, 2000.]]
[10]
K. Govil, E. Chan, and H. Wasserman. Comparing Algorithms for Dynamic Speed-Setting of a Low-Power CPU. In Proc. of the 1st Intl. Conf. on Mobile Computing and Networking, 1995.]]
[11]
D. Grunwald et al. Policies for Dynamic Clock Scheduling. In Proc. of the 4th Symposium on Operating Systems Design and Implementation, 2000.]]
[12]
T. R. Halfhill. Transmeta Breaks x86 Low-Power Barrier. Microprocessor Report, February 2000.]]
[13]
M. Huang, J. Renau, S.-M. Yoo, and J. Torrellas. A Framework for Dynamic Energy Efficiency and Temperature Management. In Proc. of the 33rd Annual Intl. Symp. on Microarchitecture, 2000.]]
[14]
C. J. Hughes et al. Variability in the Execution of Multimedia Applications and Implications for Architecture. In Proc. of the 28th Annual Intl. Symp. on Comp. Architecture, 2001.]]
[15]
C. J. Hughes, J. Srinivasan, and S. V. Adve. Supplemental Data for "Saving Energy with Architectural and Frequency Adaptations for Multimedia Applications". URL: http://www.cs.uiuc.edu/rsim/Pubs/micro34-supplement.ps.]]
[16]
Intel XScale Microarchitecture. http://developer.intel.com/design/intelxscale/benchmarks.htm.]]
[17]
A. Iyer and D. Marculescu. Power Aware Microarchitecture Resource Scaling. In Proc. of the Design, Automation and Test in Europe Conf., 2001.]]
[18]
C. E. Kozyrakis and D. Patterson. A New Direction for Computer Architecture Research. IEEE Computer, November 1998.]]
[19]
R. B. Lee and M. D. Smith. Media Processing: A New Design Target. IEEE Micro, August 1996.]]
[20]
Y.-H. Lee and C. Krishna. Voltage-Clock Scaling for Low Power Energy Consumption in Real-Time Embedded Systems. In Proc. of the 6th Intl. Conference on Real-Time Computing Systems and Applications, 1999.]]
[21]
J. R. Lorch and A. J. Smith. Improving Dynamic Voltage Scaling Algorithms with PACE. In Proc. of ACM SIGMETRICS, 2001.]]
[22]
S. Manne, A. Klauser, and D. Grunwald. Pipeline Gating: Speculation Control for Energy Reduction. In Proc. of the 25th Annual Intl. Symp. on Comp. Architecture, 1998.]]
[23]
R. Maro, Y. Bai, and R. Bahar. Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors. In Proc. of the Workshop on Power-Aware Computer Systems, 2000.]]
[24]
V. S. Pai, P. Ranganathan, and S. V. Adve. RSIM Reference Manual version 1.0. Technical Report 9705, Department of Electrical and Computer Engineering, Rice University, August 1997.]]
[25]
T. Pering, T. Burd, and R. Brodersen. Voltage Scheduling in the 1pARM Microprocessor System. In Proc. of the Intl. Symposium on Low Power Electronics and Design, 2000.]]
[26]
P. Pillai and K. G. Shin. Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems. In Proc. of the 18th ACM Symp. on Operating Systems Principles, 2001.]]
[27]
J. Pouwelse, K. Langendoen, and H. Sips. Energy Priority Scheduling for Variable Voltage Processors. In Intl. Symp. on Low-Power Electronics and Design, 2001.]]
[28]
T. Šimunić et al. Dynamic Power Management for Portable Systems. In Intl. Conf. on Mobile Computing and Networking, 2000.]]
[29]
M. Weiser et al. Scheduling for Reduced CPU Energy. In Proc. of the 1st Symposium on Operating Systems Design and Implementation, 1994.]]

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cover image ACM Conferences
MICRO 34: Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
December 2001
355 pages
ISBN:0769513697

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Published: 01 December 2001

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