article

Instruction generation for hybrid reconfigurable systems

Authors:

S. Ogrenci Memik,

E. BozorgzadehAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 7, Issue 4

Pages 605 - 627

https://doi.org/10.1145/605440.605446

Published: 01 October 2002 Publication History

Abstract

Future computing systems need to balance flexibility, specialization, and performance in order to meet market demands and the computing power required by new applications. Instruction generation is a vital component for determining these trade-offs. In this work, we present theory and an algorithm for instruction generation. The algorithm profiles a dataflow graph and iteratively contracts edges to create the templates. We discuss how to target the algorithm toward the novel problem of instruction generation for hybrid reconfigurable systems. In particular, we target the Strategically Programmable System, which embeds complex computational units such as ALUs, IP blocks, and so on into a configurable fabric. We argue that an essential compilation step for these systems is instruction generation, as it is needed to specify the functionality of the embedded computational units. In addition, instruction generation can be used to create soft reconfigurable macros---tightly sequenced prespecified operations placed in the reconfigurable fabric.

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Cited By

Bobda CIshebabi HMahr PMbongue JSaha S(2019)MeXT: A Flow for Multiprocessor Exploration2019 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC.2019.8916428(1-7)Online publication date: Sep-2019
https://doi.org/10.1109/HPEC.2019.8916428
Xiao CWang SLiu WCasseau E(2017)Parallel custom instruction identification for extensible processorsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2016.11.01176:C(149-159)Online publication date: 1-May-2017
https://dl.acm.org/doi/10.1016/j.sysarc.2016.11.011
Wang CLi XZhang HWang AZhou X(2017)Hot spots profiling and dataflow analysis in custom dataflow computing SoftProcessorsJournal of Systems and Software10.1016/j.jss.2016.07.025125:C(427-438)Online publication date: 1-Mar-2017
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Index Terms

Instruction generation for hybrid reconfigurable systems
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific processors
2. Mathematics of computing
  1. Discrete mathematics
    1. Graph theory
      1. Graph algorithms

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 7, Issue 4

October 2002

195 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/605440

Issue’s Table of Contents

Copyright © 2002 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 October 2002

Published in TODAES Volume 7, Issue 4

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Cited By

Bobda CIshebabi HMahr PMbongue JSaha S(2019)MeXT: A Flow for Multiprocessor Exploration2019 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC.2019.8916428(1-7)Online publication date: Sep-2019
https://doi.org/10.1109/HPEC.2019.8916428
Xiao CWang SLiu WCasseau E(2017)Parallel custom instruction identification for extensible processorsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2016.11.01176:C(149-159)Online publication date: 1-May-2017
https://dl.acm.org/doi/10.1016/j.sysarc.2016.11.011
Wang CLi XZhang HWang AZhou X(2017)Hot spots profiling and dataflow analysis in custom dataflow computing SoftProcessorsJournal of Systems and Software10.1016/j.jss.2016.07.025125:C(427-438)Online publication date: 1-Mar-2017
https://dl.acm.org/doi/10.1016/j.jss.2016.07.025
Ben Asher YLipov ITartakovsky VTiv D(2017)Generating ASIPs with Reduced Number of Connections to the Register-FileInternational Journal of Parallel Programming10.1007/s10766-017-0491-445:6(1461-1487)Online publication date: 1-Dec-2017
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Mitra T(2017)Application-Specific ProcessorsHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_13-1(1-33)Online publication date: 8-Apr-2017
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Mitra T(2017)Application-Specific ProcessorsHandbook of Hardware/Software Codesign10.1007/978-94-017-7267-9_13(377-409)Online publication date: 27-Sep-2017
https://doi.org/10.1007/978-94-017-7267-9_13
Ziebinski ASwierc S(2016)Soft Core Processor Generated Based on the Machine Code of the ApplicationJournal of Circuits, Systems and Computers10.1142/S021812661650029825:04(1650029)Online publication date: Apr-2016
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Wang SXiao CLiu WCasseau E(2016)A comparison of heuristic algorithms for custom instruction selectionMicroprocessors & Microsystems10.1016/j.micpro.2016.05.00145:PA(176-186)Online publication date: 1-Aug-2016
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