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Run-time instruction set selection in a transmutable embedded processor

Published: 08 June 2008 Publication History

Abstract

We are presenting a new concept of an application-specific processor that is capable of transmuting its instruction set according to non-predictive application behavior during run-time. In those scenarios, current (extensible) embedded processors are less efficient since they are not run-time adaptive. We have identified the instruction set selection to be a critical step to perform at run time and hence we focus this paper on that crucial part. Our paradigm conducts as many steps as possible at compile/design time and as little as necessary at run time with the constraint to provide a sufficient flexibility to react to non-predictive application behavior efficiently. We provide an in-depth analysis of our scheme and achieve a speed-up of up to 7.19x (average: 3.63x) compared to state-of-the-art adaptive approaches (like [19]). As an application, we have employed a whole H.264 video encoder though our scheme is by principle applicable to many other embedded applications. Our results are evaluated by an implementation of the instruction set selection for our transmutable processor on an FPGA platform.

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      cover image ACM Conferences
      DAC '08: Proceedings of the 45th annual Design Automation Conference
      June 2008
      993 pages
      ISBN:9781605581156
      DOI:10.1145/1391469
      • General Chair:
      • Limor Fix
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      Published: 08 June 2008

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      Author Tags

      1. ASIP
      2. extensible embedded processors
      3. reconfigurable computing
      4. run-time adaptation
      5. special instruction

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