Article

Free access

The K2 distributed memory parallel processor: architecture, compiler, and operating system

Authors:

M. ViredazAuthors Info & Claims

Supercomputing '91: Proceedings of the 1991 ACM/IEEE conference on Supercomputing

Pages 900 - 909

https://doi.org/10.1145/125826.126721

Published: 01 August 1991 Publication History

PDF eReader

References

[1]

M. Annaratone et al. The Warp Computer: Architecture, implementation, and Performance. IEEE Trans. on Computers, December 1987.

Digital Library

Google Scholar

[2]

S. Borkar et al. iWarp: an integrated solution to highspeed parallel computation. In Proc. SupercomputinO 88, November 19gg.

Digital Library

Google Scholar

[3]

W.J. DaLly. Wire-et~cientVLSI multiprocessor communication networks. In Proc. 1987 Stanjord ConJerence on Advanced Research in VLSI, pages 391-415. MIT Press, Cambridge, MA, 1987.

Google Scholar

[4]

W.J. Dally. Performance analysis of k-ary n-cube interconnection networks. IEEE Trans. on Computers, 39(6):775- 785, June 1990.

Digital Library

Google Scholar

[5]

H.T. Kung. Memory requirements for balanced computer architectures. In Proe. 13th Symposium on Computer At. chitevture, pages 49-54. ACM-IEEE, june 1986.

Digital Library

Google Scholar

[6]

C.L. Lawson, R.J. Hanson, D.R. Kincaid, and F.T. Krogh. Basic linear algebra subprograms forFortran usage. A CM Transactions on Math. Soflw., 5(3):308-323, September 1979.

Digital Library

Google Scholar

[7]

P. Beadle, C. Pommerell, and M. Annaratone. K9: A simulator of distributed-memory parallel processors. In Proc. Supercomputing 89, Reno, Nevada, November 1989. ACM- IEEE.

Digital Library

Google Scholar

[8]

M. Annaratone, C. Pommerell, and R. Rfihl. Interprocessor communication and performance in distributedmemory parallel processors. In Proc. 16th Symposium on Computer Architecture, pages 315-324, Jerusalem, May 1989. ACM-IEEE.

Digital Library

Google Scholar

[9]

M. Annaratone, M. Fillo, K. Nakabayashi, and M. Viredaz. TheK2 parallel processor: Architecture and hardware implementation. In Proc. 17th Symposium on Computer Architecture, Seattle, June 1990. ACM-IEEE.

Digital Library

Google Scholar

[10]

M. Wolfe. Automatic detection of concurrency for shared memory multiprocessors. Technical report, Kuck andAssoclatesInc., October 1987. 1987 ESUG meeting.

Google Scholar

[11]

C. Polychronopoulos et al. Parafrase-II: An environment for parallelizing, partitioning, synchronizing, and scheduling programs on multiprocessors. Technical report, University of Illinois, CSRD, 1989.

Google Scholar

[12]

S.C. Eisenstat, M.C. Gursky, M.H. Schultz, and A.H. Sherman. Yale sparse matrix packageI: The symmetric codes. International Journal }or Numerical Methods in Engineering, 18:1145-1151, 1982.

Google Scholar

[13]

S.C. Eisenstat, M.C. Gursky, M.H. Schultz, and A.H. Sherman. Yale sparse matrix packageIi: The nonsymmetric codes. Technical Report 114, Computer Science Department, Yale University, 1977.

Crossref

Google Scholar

[14]

U. Banerjee. Dependence Analysis .for Supercomputing. Kluwer Academic Publishers, 1988.

Digital Library

Google Scholar

[15]

M. Neeracher. Oxygen: generating loop and data distribution directives from dependence graphs. Technical Report Diploma thesis, Swiss Federal Institute of Technology Zurich, Integrated Systems Laboratory, February 1991.

Google Scholar

[16]

R. Riild and M. Annaratone. Parallelization of FORTRAN code on distributed-memory parallel processors. In Proc. ACM International Conference on Supercomputing, Amsterdam, June 1990.

Digital Library

Google Scholar

[17]

B.S. Garbow, J.M. Boyle, J.J. Dongarra, and C.B. Moler. Matrix Eigensystem Routines .ELY" 4 Ch" guide Extension. Lecture notes in Computer Science. Springer-Verlag, 1977.

Crossref

Google Scholar

[18]

Y. Saad. SPARSKIT: A basic tool kit for sparse matrix computation. Tedmical Report CSRD Report no. 1029, University of illinois, CSRD, August 1990.

Google Scholar

[19]

C. Pommerell, M. Annaratone, and W. Fichtner. A set of n~w rrt~ppirt$ azx4 ~oloring h~~xi~tiee for dlsgrlbutedmemory parallel processors. SIAM d. on Sci. and Star. Comp., 13, January 1992.

Digital Library

Google Scholar

Cited By

View all

Clémençon CEndo AFritscher JMüller ARühl RWylie B(1996)Annai: An Integrated Parallel Programming Environment for MulticomputersTools and Environments for Parallel and Distributed Systems10.1007/978-1-4615-4123-3_3(33-59)Online publication date: 1996
https://doi.org/10.1007/978-1-4615-4123-3_3
Müller ARühl RValero M(1995)Extending high performance Fortran for the support of unstructured computationsProceedings of the 9th international conference on Supercomputing10.1145/224538.224552(127-136)Online publication date: 3-Jul-1995
https://dl.acm.org/doi/10.1145/224538.224552
Neeracher Ruhl (1993)Automatic parallelization of LINPACK routines on distributed memory parallel processorsProceedings of the 1993 Seventh International Parallel Processing Symposium10.1109/IPPS.1993.262774(830-836)Online publication date: 13-Apr-1993
https://dl.acm.org/doi/10.1109/IPPS.1993.262774
Show More Cited By

Index Terms

The K2 distributed memory parallel processor: architecture, compiler, and operating system

Recommendations

The K2 parallel processor: architecture and hardware implementation
ISCA '90: Proceedings of the 17th annual international symposium on Computer Architecture

K2 is a distributed-memory parallel processor designed to support a multi-user, multi-tasking, time-sharing operating system and an automatically parallelizing FORTRAN compiler. This paper presents the architecture and the hardware implementation of K2, ...
Exploiting Distributed-Memory and Shared-Memory Parallelism on Clusters of SMPs with Data Parallel Programs

Clusters of SMPs are hybrid-parallel architectures that combine the main concepts of distributed-memory and shared-memory parallel machines. Although SMP clusters are widely used in the high performance computing community, there exists no single ...
The K2 parallel processor: architecture and hardware implementation
Special Issue: Proceedings of the 17th annual international symposium on Computer Architecture

K2 is a distributed-memory parallel processor designed to support a multi-user, multi-tasking, time-sharing operating system and an automatically parallelizing FORTRAN compiler. This paper presents the architecture and the hardware implementation of K2, ...

Comments

Information & Contributors

Information

Published In

Supercomputing '91: Proceedings of the 1991 ACM/IEEE conference on Supercomputing

August 1991

920 pages

ISBN:0897914597

DOI:10.1145/125826

Conference Chair:
Ray Elliott

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 1991

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Conference

SC '91

Sponsor:

SIGARCH
IEEE-CS

SC '91: International Conference for High Performance Computing, Networking, Storage and Analysis

November 18 - 22, 1991

New Mexico, Albuquerque, USA

Acceptance Rates

Supercomputing '91 Paper Acceptance Rate 83 of 215 submissions, 39%;

Overall Acceptance Rate 1,516 of 6,373 submissions, 24%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

5
Total Citations
View Citations
250
Total Downloads

Downloads (Last 12 months)43
Downloads (Last 6 weeks)9

Reflects downloads up to 29 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Clémençon CEndo AFritscher JMüller ARühl RWylie B(1996)Annai: An Integrated Parallel Programming Environment for MulticomputersTools and Environments for Parallel and Distributed Systems10.1007/978-1-4615-4123-3_3(33-59)Online publication date: 1996
https://doi.org/10.1007/978-1-4615-4123-3_3
Müller ARühl RValero M(1995)Extending high performance Fortran for the support of unstructured computationsProceedings of the 9th international conference on Supercomputing10.1145/224538.224552(127-136)Online publication date: 3-Jul-1995
https://dl.acm.org/doi/10.1145/224538.224552
Neeracher Ruhl (1993)Automatic parallelization of LINPACK routines on distributed memory parallel processorsProceedings of the 1993 Seventh International Parallel Processing Symposium10.1109/IPPS.1993.262774(830-836)Online publication date: 13-Apr-1993
https://dl.acm.org/doi/10.1109/IPPS.1993.262774
Rühl RKennedy KPolychronopoulos C(1992)Evaluation of compiler generated parallel programs on three multicomputersProceedings of the 6th international conference on Supercomputing10.1145/143369.143375(15-24)Online publication date: 1-Aug-1992
https://dl.acm.org/doi/10.1145/143369.143375
Annaratone MRuhl R(1992)Balancing interprocessor communication and computation on torus-connected multicomputers running compiler-parallelized codeProceedings Scalable High Performance Computing Conference SHPCC-92.10.1109/SHPCC.1992.232672(358-365)Online publication date: 1992
https://doi.org/10.1109/SHPCC.1992.232672

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

The K2 parallel processor: architecture and hardware implementation

Exploiting Distributed-Memory and Shared-Memory Parallelism on Clusters of SMPs with Data Parallel Programs

The K2 parallel processor: architecture and hardware implementation

Comments

Published In

Sponsors

Publisher

Publication History

Permissions

Check for updates

Qualifiers

Conference

Acceptance Rates

Upcoming Conference

Other Metrics

Article Metrics

Other Metrics

Cited By

PDF

eReader

Login options

Full Access

References

Cited By

Index Terms

Recommendations

The K2 parallel processor: architecture and hardware implementation

Exploiting Distributed-Memory and Shared-Memory Parallelism on Clusters of SMPs with Data Parallel Programs

The K2 parallel processor: architecture and hardware implementation

Comments

Information

Published In

Sponsors

Publisher

Publication History

Permissions

Check for updates

Qualifiers

Conference

Acceptance Rates

Upcoming Conference

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

View options

PDF

eReader

Login options

Full Access

Share

Share this Publication link

Share on social media

Affiliations