Article

FPGA Architecture for Multi-Style Asynchronous Logic

Authors:

N. Huot,

H. Dubreuil,

L. Fesquet,

M. RenaudinAuthors Info & Claims

DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

Pages 32 - 33

https://doi.org/10.1109/DATE.2005.159

Published: 07 March 2005 Publication History

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Abstract

This paper presents a novel FPGA architecture for implementing various styles of asynchronous logic. The main objective is to break the dependency between the FPGA architecture dedicated to asynchronous logic and the logic style. The innovative aspects of the architecture are described. Moreover the structure is well suited to be rebuilt and adapted to fit with further asynchronous logic evolutions thanks to the architecture genericity. A full-adder was implemented in different styles of logic to show the architecture flexibility.

References

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{3} Q. T. Ho, J.-B. Rigaud, L. Fesquet, M. Renaudin, R. Rolland, "Implementing asynchronous circuits on LUT based FPGAs", 12th Int. Conf. on Field Programmable Logic and Applications (FPL), September 2-4, 2002, Montpellier, France.

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{4} S. Hauck, S. Burns, G. Borriello, and C. Ebeling. "A FPGA for Implementing Asynchronous Circuits". IEEE Design and Test of Computers, 11 (3): pp. 60-69, 1994.

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{5} K. Maheswaran "Implementing Self-Timed Circuits in Field Programmable Gate Arrays" Master's thesis, U. C. Davis, 1995.

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{8} J. Teifel, R. Manohar, "Programmable Asynchronous Pipeline Arrays" Proc. of the 13th Int. Conf. on Field Programmable Logic and Applications, pp. 345-354, Lisbon, Portugal, September 2003.

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Cited By

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Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu M(2006)TartanACM SIGARCH Computer Architecture News10.1145/1168919.116887834:5(163-174)Online publication date: 20-Oct-2006
https://dl.acm.org/doi/10.1145/1168919.1168878
Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu M(2006)TartanACM SIGPLAN Notices10.1145/1168918.116887841:11(163-174)Online publication date: 20-Oct-2006
https://dl.acm.org/doi/10.1145/1168918.1168878
Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu M(2006)TartanACM SIGOPS Operating Systems Review10.1145/1168917.116887840:5(163-174)Online publication date: 20-Oct-2006
https://dl.acm.org/doi/10.1145/1168917.1168878
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Index Terms

FPGA Architecture for Multi-Style Asynchronous Logic
1. Hardware

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Published In

DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

March 2005

630 pages

ISBN:0769522882

Publisher

IEEE Computer Society

United States

Publication History

Published: 07 March 2005

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DATE05: Design, Automation and Test in Europe

March 7 - 11, 2005

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu M(2006)TartanACM SIGARCH Computer Architecture News10.1145/1168919.116887834:5(163-174)Online publication date: 20-Oct-2006
https://dl.acm.org/doi/10.1145/1168919.1168878
Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu M(2006)TartanACM SIGPLAN Notices10.1145/1168918.116887841:11(163-174)Online publication date: 20-Oct-2006
https://dl.acm.org/doi/10.1145/1168918.1168878
Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu M(2006)TartanACM SIGOPS Operating Systems Review10.1145/1168917.116887840:5(163-174)Online publication date: 20-Oct-2006
https://dl.acm.org/doi/10.1145/1168917.1168878
Mishra MCallahan TChelcea TVenkataramani GGoldstein SBudiu MShen JMartonosi M(2006)TartanProceedings of the 12th international conference on Architectural support for programming languages and operating systems10.1145/1168857.1168878(163-174)Online publication date: 23-Oct-2006
https://dl.acm.org/doi/10.1145/1168857.1168878
Mocho RSartori GRibas RReis ACoelho CJacobi RBecker J(2006)Asynchronous circuit design on reconfigurable devicesProceedings of the 19th annual symposium on Integrated circuits and systems design10.1145/1150343.1150355(20-25)Online publication date: 28-Aug-2006
https://dl.acm.org/doi/10.1145/1150343.1150355

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