International Electron Devices Meeting

Last updated

The IEEE International Electron Devices Meeting (IEDM) is an annual micro- and nanoelectronics conference held each December that serves as a forum for reporting technological breakthroughs in the areas of semiconductor and related device technologies, design, manufacturing, physics, modeling and circuit-device interaction. [1]

Contents

IEDM brings together managers, engineers, and scientists from industry, academia, and government around the world to discuss CMOS transistor technology, memory, displays, sensors, MEMS devices, quantum devices, nanoscale devices, optoelectronics, power, process technology, and device modeling and simulation. The conference also encompasses discussions and presentations on devices in silicon, compound and organic semiconductors, and emerging material systems. [2] IEDM has technical paper presentations and plenary presentations, panel sessions, invited talks, and exhibits.

The IEEE IEDM is where "Moore’s Law" got its name, as Gordon Moore first published his predictions in an article in Electronics Magazine in 1965. Ten years later he refined them in a talk at the IEDM, and from that point on people began referring to them as Moore's Law. Moore’s Law states that the complexity of integrated circuits would double approximately every two years. [3] [4]

The IEEE International Electron Devices Meeting is sponsored by the Electron Devices Society of the Institute of Electrical and Electronics Engineers (IEEE).

History

The First Annual Technical Meeting on Electron Devices (renamed the International Electron Devices Meeting in the mid-1960s) took place on October 24–25, 1955 at the Shoreham Hotel in Washington, D.C., with approximately 700 scientists and engineers in attendance. At that time, the seven-year-old transistor and the electron tube reigned as the predominant electron-device technology. Fifty-four papers were presented on the then state-of-the-art in electron device technology, the majority of them from four U.S. companies -- Bell Telephone Laboratories, RCA Corporation, Hughes Aircraft Co. and Sylvania Electric Products. The need for an electron devices meeting was driven by two factors: commercial opportunities in the fast-growing new "solid-state" branch of electronics, and the U.S. government's desire for solid-state components and better microwave tubes for aerospace and defense. [5]

Events

IEDM 2015

The 2015 International Electron Devices Meeting took place at the Washington Hilton Hotel from December 5–9, 2015. The major topics [6] [7] included ultra-small transistors, [8] advanced memories, [9] low-power devices for mobile & Internet of Things (IoT) applications, [10] alternatives to silicon transistors, [11] and 3D integrated circuit (IC) technology. [12] There were also a broad range of papers addressing some of the fastest-growing specialized areas in micro/nanoelectronics, including silicon photonics, [13] physically flexible circuits, [14] and brain-inspired computing. [15]

IEDM 2016

The 2016 IEEE International Devices Meeting took place at the Hilton San Francisco Union Square from December 3–7, 2016. The 2016 edition of the IEDM emphasized the following topics: [16] advanced transistors, [17] new memory technologies, [18] brain-inspired computing, [19] bioelectronics, [20] and power electronics. [21]

IEDM 2017

The 2017 IEEE International Devices Meeting took place at the Hilton San Francisco Union Square from December 2–6, 2017. Highlights included Nobel Prize winner Hiroshi Amano speaking on ‘Transformative Electronics’, AMD President & CEO Lisa Su speaking on multi-chip technologies for high-performance computing; and Intel and Globalfoundries detailing their competing new FinFET technology platforms. Also, IBM’s Dan Edelstein gave a retrospective on copper interconnect. Copper interconnect (i.e., the wiring on computer chips) revolutionized the industry 20 years ago. [22]

IEDM 2018

The 2018 IEEE-IEDM took place at the Hilton San Francisco Union Square from December 1–5, 2018. Highlights included three plenary talks that addressed key future directions for semiconductor technology and business practices. Jeffery Welser, Vice President of IBM Research-Almaden, spoke about the hardware needed for artificial research (AI), while Eun Seung Jung, President of Samsung's Foundry Business, spoke about the challenges and opportunities facing chip foundries. Professor Gerhard Fettweis of TU Dresden, meanwhile, spoke about new ways to structure research into semiconductors to effectively pursue non-traditional uses such as bendable, flexible electronic systems. The conference also included an evening panel discussion during which a panel of industry experts looked forward for the next 25 years. The technical program featured many noteworthy papers on a range of topics, such as innovative memories for AI applications; quantum computing; wireless communications; power devices; and many more.

IEDM 2019

The 2019 IEEE International Electron Devices Meeting (IEDM) took place in San Francisco, CA on December 7–11, 2019. Robert Chau, Intel Senior Fellow, gave a Plenary talk in which he discussed how ongoing innovation will help the industry stay on the path of Moore’s Law. [23] In other Plenary talks, Martin van den Brink, President/Chief Technical Officer of ASML N.V., discussed the importance of EUV lithography, [24] and Kazu Ishimaru, Senior Fellow at Kioxia, discussed the future of non-volatile memory. [25] The technical program was highlighted by talks from Taiwan Semiconductor Manufacturing Co. on its forthcoming 5 nm chip manufacturing technology [26] and by Intel on better ways to manufacture 3D chips. The program also featured many papers discussing various ways to use new memory technologies for artificial intelligence (AI) computing and other applications. [27]

IEDM 2020

The 2020 IEEE International Electron Devices Meeting (IEDM) was held virtually from December 12–18, 2020. Highlights included three plenary talks that addressed important issues for semiconductor technology development: Sri Samavedam, senior vice president at imec, discussed ways to continue scaling in logic devices, [28] while Naga Chandrasekaran, senior vice president at Micron Technology, talked about the innovations needed for advanced memory technologies. [29] Meanwhile, Sungwoo Hwang, President of Samsung’s Advanced Institute of Technology, gave an overview on the coming symbiosis of semiconductors, AI and quantum computing. The technical program was highlighted by talks from Intel Corp. on a 3D stacked nanosheet transistor architecture, [30] and from Taiwan Semiconductor Manufacturing Co., which gave details about its 5 nm CMOS FinFET technology. [31]

IEDM 2021

The 67th annual IEEE International Electron Devices Meeting was held December 11–15, 2021 at the Hilton San Francisco Union Square hotel, with on-demand content available afterward. The Plenary talks were: The Smallest Engine Transforming Humanity: The Past, Present, and Future, by Kinam Kim, Vice Chairman & CEO, Head of Samsung Electronics Device Solutions Division, Samsung; Creating the Future: Augmented Reality, the Next Human-Machine Interface, by Michael Abrash, Chief Scientist, Facebook Reality Labs; and Quantum Computing Technology, by Heike Riel, Head of Science & Technology, IBM Research and IBM Fellow.

IEDM 2022

The 68th annual IEEE International Electron Devices Meeting was held December 3-7, 2022 at the Hilton San Francisco Union Square hotel. Major themes were [32] increasingly powerful logic devices and memories for artificial intelligence (AI) and other applications; better power devices in support of the growing electrification of society; and five special Focus Sessions in areas of intense research interest: Advanced Heterogeneous Integration; Bio-Computing; Emerging Implantable Device Technology; Quantum Computing; and Special Topics in non-von Neumann Computing. The Plenary talks were:

IEDM 2023

The 69th annual IEEE IEDM was held at the Hilton San Francisco Union Square hotel from December 9–13, 2023. The theme for 2023 was “Devices for a Smart World Built Upon 60 Years of CMOS.” Among the program highlights [33] were three Plenary talks:

The IEEE IEDM conference was followed by the 15th MRAM Global Innovation Forum, sponsored by the IEEE Magnetics Society, which was held in the same venue on Thursday, Dec. 14.

Related Research Articles

<span class="mw-page-title-main">Integrated circuit</span> Electronic circuit formed on a small, flat piece of semiconductor material

An integrated circuit (IC), also known as a microchip, computer chip, or simply chip, is a small electronic device made up of multiple interconnected electronic components such as transistors, resistors, and capacitors. These components are etched onto a small piece of semiconductor material, usually silicon. Integrated circuits are used in a wide range of electronic devices, including computers, smartphones, and televisions, to perform various functions such as processing and storing information. They have greatly impacted the field of electronics by enabling device miniaturization and enhanced functionality.

<span class="mw-page-title-main">Semiconductor device fabrication</span> Manufacturing process used to create integrated circuits

Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips. It is a multiple-step photolithographic and physico-chemical process during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.

<span class="mw-page-title-main">Moore's law</span> Observation on the growth of integrated circuit capacity

Moore's law is the observation that the number of transistors in an integrated circuit (IC) doubles about every two years. Moore's law is an observation and projection of a historical trend. Rather than a law of physics, it is an empirical relationship. It is an experience-curve law, a type of law quantifying efficiency gains from experience in production.

<span class="mw-page-title-main">CMOS</span> Technology for constructing integrated circuits

Complementary metal–oxide–semiconductor is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.

The 90 nm process refers to the technology used in semiconductor manufacturing to create integrated circuits with a minimum feature size of 90 nanometers. It was an advancement over the previous 130 nm process. Eventually, it was succeeded by smaller process nodes, such as the 65 nm, 45 nm, and 32 nm processes.

Semiconductor memory is a digital electronic semiconductor device used for digital data storage, such as computer memory. It typically refers to devices in which data is stored within metal–oxide–semiconductor (MOS) memory cells on a silicon integrated circuit memory chip. There are numerous different types using different semiconductor technologies. The two main types of random-access memory (RAM) are static RAM (SRAM), which uses several transistors per memory cell, and dynamic RAM (DRAM), which uses a transistor and a MOS capacitor per cell. Non-volatile memory uses floating-gate memory cells, which consist of a single floating-gate transistor per cell.

<span class="mw-page-title-main">Fin field-effect transistor</span> Type of non-planar transistor

A fin field-effect transistor (FinFET) is a multigate device, a MOSFET built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, forming a double or even multi gate structure. These devices have been given the generic name "FinFETs" because the source/drain region forms fins on the silicon surface. The FinFET devices have significantly faster switching times and higher current density than planar CMOS technology.

<span class="mw-page-title-main">Image sensor</span> Device that converts images into electronic signals

An image sensor or imager is a sensor that detects and conveys information used to form an image. It does so by converting the variable attenuation of light waves into signals, small bursts of current that convey the information. The waves can be light or other electromagnetic radiation. Image sensors are used in electronic imaging devices of both analog and digital types, which include digital cameras, camera modules, camera phones, optical mouse devices, medical imaging equipment, night vision equipment such as thermal imaging devices, radar, sonar, and others. As technology changes, electronic and digital imaging tends to replace chemical and analog imaging.

SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon", is a cross sectional structure of MOSFET (metal–oxide–semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and FloadiaArchived 2022-11-01 at the Wayback Machine.

The "14 nanometer process" refers to a marketing term for the MOSFET technology node that is the successor to the "22 nm" node. The "14 nm" was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following "22 nm" was expected to be "16 nm". All "14 nm" nodes use FinFET technology, a type of multi-gate MOSFET technology that is a non-planar evolution of planar silicon CMOS technology.

<span class="mw-page-title-main">Multigate device</span> MOS field-effect transistor with more than one gate

A multigate device, multi-gate MOSFET or multi-gate field-effect transistor (MuGFET) refers to a metal–oxide–semiconductor field-effect transistor (MOSFET) that has more than one gate on a single transistor. The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes. A multigate device employing independent gate electrodes is sometimes called a multiple-independent-gate field-effect transistor (MIGFET). The most widely used multi-gate devices are the FinFET and the GAAFET, which are non-planar transistors, or 3D transistors.

Nanocircuits are electrical circuits operating on the nanometer scale where quantum mechanical effects become important. One nanometer is equal to 10−9 meters or a row of 10 hydrogen atoms. With such progressively smaller circuits, more can be fitted on a computer chip. This allows faster and more complex functions using less power. Nanocircuits are composed of three different fundamental components. These are transistors, interconnections, and architecture, all fabricated on the nanometer scale.

A three-dimensional integrated circuit is a MOS integrated circuit (IC) manufactured by stacking as many as 16 or more ICs and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. The 3D IC is one of several 3D integration schemes that exploit the z-direction to achieve electrical performance benefits in microelectronics and nanoelectronics.

<span class="mw-page-title-main">Fujio Masuoka</span> Japanese engineer (born 1943)

Fujio Masuoka is a Japanese engineer, who has worked for Toshiba and Tohoku University, and is currently chief technical officer (CTO) of Unisantis Electronics. He is best known as the inventor of flash memory, including the development of both the NOR flash and NAND flash types in the 1980s. He also invented the first gate-all-around (GAA) MOSFET (GAAFET) transistor, an early non-planar 3D transistor, in 1988.

<span class="mw-page-title-main">Random-access memory</span> Form of computer data storage

Random-access memory is a form of electronic computer memory that can be read and changed in any order, typically used to store working data and machine code. A random-access memory device allows data items to be read or written in almost the same amount of time irrespective of the physical location of data inside the memory, in contrast with other direct-access data storage media, where the time required to read and write data items varies significantly depending on their physical locations on the recording medium, due to mechanical limitations such as media rotation speeds and arm movement.

In semiconductor manufacturing, the International Roadmap for Devices and Systems defines the "5 nm" process as the MOSFET technology node following the "7 nm" node. In 2020, Samsung and TSMC entered volume production of "5 nm" chips, manufactured for companies including Apple, Huawei, Mediatek, Qualcomm and Marvell.

<span class="mw-page-title-main">Beyond CMOS</span> Possible future digital logic technologies

Beyond CMOS refers to the possible future digital logic technologies beyond the scaling limits of CMOS technology. which limits device density and speeds due to heating effects.

<span class="mw-page-title-main">Gary Patton</span> American technologist and business executive

Dr. Gary Patton is an American technologist and business executive. He is currently the Corporate Vice President and General Manager of Design Enablement and Components Research in the Technology Development Group at Intel. He has spent most of his career in IBM, starting in IBM's Research Division and holding management and executive positions in IBM's Microelectronics Division in Technology Development, Design Enablement, Manufacturing, and Business Line Management.

<span class="mw-page-title-main">Tsu-Jae King Liu</span> American electrical engineer

Tsu-Jae King Liu is an American academic and engineer who serves as the Dean and the Roy W. Carlson Professor of Engineering at the UC Berkeley College of Engineering.

References

  1. ↑ "Conference Reflections". Nature Electronics. 2019-12-16.
  2. ↑ Teschler, Lee (2019-12-10). "Researchers find ways to integrate GaN power circuits onto ICs". EE World.
  3. ↑ "1965: "Moore's Law" Predicts the Future of Integrated Circuits | The Silicon Engine | Computer History Museum". Computerhistory.org. Retrieved 2017-03-11.
  4. ↑ "The economics of chip manufacture on advanced technologies". Newelectronics.co.uk. 2011-07-26. Retrieved 2017-03-11.
  5. ↑ McEwan, A.W. (April 1956). "A production model K-band backward wave oscillator". IRE Transactions on Electron Devices. 3 (2): 108. Bibcode:1956ITED....3..108M. doi:10.1109/T-ED.1956.14115.
  6. ↑ Paul McLellan (2015-12-11). "IEDM: the International Electron Devices Meeting - Breakfast Bytes - Cadence Blogs - Cadence Community". Community.cadence.com. Retrieved 2017-03-11.
  7. ↑ sdavis (2015-12-02). "A Look Ahead at IEDM 2015 | Siliconica". Electroiq.com. Retrieved 2017-03-11.
  8. ↑ Stevenson, Richard (2016-01-26). "Nanowire Transistors Could Let You Talk, Text, and Tweet Longer - IEEE Spectrum". IEEE . Retrieved 2017-03-11.
  9. ↑ Tetsuo Nozawa (2015-12-24). "Samsung: DRAM Can Be Scaled Down to 10nm - Nikkei Technology Online". Techon.nikkeibp.co.jp. Retrieved 2017-03-11.
  10. ↑ "IEDM Blogs – Part 3 – Global Foundries 22FDX Briefing". SemiWiki.com. Retrieved 2017-03-11.
  11. ↑ Ashok Bindra. "IEDM Divulges Advances in Wide Bandgap Devices | Electronics360". Electronics360.globalspec.com. Retrieved 2017-03-11.
  12. ↑ Turley, Jim (2016-02-01). "How It's Built: Micron/Intel 3D NAND". Eejournal.com. Retrieved 2017-03-11.
  13. ↑ "Germanium-tin laser for silicon photonics is CMOS compatible". laserfocusworld.com. 17 November 2015. Retrieved 11 March 2017.
  14. ↑ "2015 IEDM Slide 11: RF CMOS Circuits on Flexible, Application-Specific Substrates | Chip Design". Eecatalog.com. 2016-02-09. Retrieved 2017-03-11.
  15. ↑ "IEDM 2015 NV Memory and Brain Functions". EE Times. Retrieved 2017-03-11.
  16. ↑ "5 Takeaways From IEDM" (December 15, 2016), Mark Lapedus, Semiconductor Engineering
  17. ↑ "IEDM 2016 - 7nm Shootout" (January 17, 2016), Scotten Jones, SemiWiki.com
  18. ↑ "How It’s Built: Micron/Intel 3D NAND" (February 1, 2016), Bryon Moyer, EE Journal
  19. ↑ "RRAM/PCM-Based Brain-Gates Emerge as New Components" (February 28, 2017), Ron Neale, EE Times
  20. ↑ "Graphene Temporary Tattoo Tracks Vital Signs" (January 11, 2017) by Katherine Bourzac, IEEE Spectrum
  21. ↑ "System-Level Impact of WBG Power Devices at 2016 IEDM" (October 26, 2016), PowerPulse.net
  22. ↑ "Copper Interconnects" IBM 100 Icons of Progress
  23. ↑ "IEDM 2019 Keynotes and Memory Technology". The Media News. 2019-12-18.
  24. ↑ McLellan, Paul (2019-12-19). "IEDM 2019: An Overview...Plus the Future of EUV". Breakfast Bytes.
  25. ↑ Stelzer, Gerhard (2020-02-13). "The Future of Non-Volatile Memory". Elektronik.
  26. ↑ Draper, Don. "TSMC Unveils Details of 5nm CMOS Production Technology Platform Featuring EUV and High Mobility Channel FinFETs at IEDM 2019". SemiWiki.com.
  27. ↑ Moore, Samuel (2020-01-29). "New Nonvolatile Memories Shrink Circuits That Search Fast". IEEE Spectrum.
  28. ↑ McLellan, Paul (12 January 2021). "IEDM Opening Keynote". Breakfast Bytes. Cadence Corp. Retrieved 18 January 2021.
  29. ↑ Moyer, Bryon (14 January 2021). "More Data, More Memory-Scaling Problems". Semiconductor Engineering. Sperling Media Group LLC.
  30. ↑ Moore, Samuel (29 December 2020). "Intel's Stacked Nanosheet Transistors Could Be the Next Step in Moore's Law". IEEE Spectrum.
  31. ↑ Dillinger, Tom (16 December 2020). "Advanced Process Development is Much More than just Litho". SemiWiki.com.
  32. ↑ "Highlights from the 2022 IEEE International Electron Devices Meeting". Nature Electronics. Nature. 2 December 2022. Retrieved 22 September 2023.
  33. ↑ "Podcast EP196: A Look at the Upcoming IEDM Conference with the Publicity Chair and Vice Chair".

Additional information

This page is based on this Wikipedia article
Text is available under the CC BY-SA 4.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.