Coyette et al., 2020 - Google Patents
Latent defect screening with visually-enhanced dynamic part average testingCoyette et al., 2020
- Document ID
- 11092721507217507360
- Author
- Coyette A
- Dobbelaere W
- Vanhooren R
- Xama N
- Gomez J
- Gielen G
- Publication year
- Publication venue
- 2020 IEEE European Test Symposium (ETS)
External Links
Snippet
In this work, a novel outlier detection method is presented in which the data from the visual inspection of manufactured wafers are combined with the data from the electrical test. Three different implementations are built with increasing complexity in order to detect outliers that …
- 235000012431 wafers 0 abstract description 31
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequence
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2868—Complete testing stations; systems; procedures; software aspects
- G01R31/287—Procedures; Software aspects
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31718—Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/305—Contactless testing using electron beams
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using infra-red, visible or ultra-violet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6757621B2 (en) | Process management system | |
US8161428B2 (en) | Method of predicting reliability of semiconductor device, reliability prediction system using the same and storage medium storing program causing computer to execute the same | |
US5822218A (en) | Systems, methods and computer program products for prediction of defect-related failures in integrated circuits | |
US7346470B2 (en) | System for identification of defects on circuits or other arrayed products | |
US8126681B2 (en) | Semiconductor outlier identification using serially-combined data transform processing methodologies | |
Miller et al. | Unit level predicted yield: a method of identifying high defect density die at wafer sort | |
JP2004150840A (en) | Defect analyzer for semiconductor integrated circuit, system, and detection method | |
US7494893B1 (en) | Identifying yield-relevant process parameters in integrated circuit device fabrication processes | |
Coyette et al. | Latent defect screening with visually-enhanced dynamic part average testing | |
CN116897291B (en) | System and method for Z-PAT defect guidance statistical outlier detection for semiconductor reliability failure | |
Balachandran et al. | Correlation of logical failures to a suspect process step | |
JP4080087B2 (en) | Analysis method, analysis system, and analysis apparatus | |
US20220196723A1 (en) | System and method for automatically identifying defect-based test coverage gaps in semiconductor devices | |
Weber et al. | An integrated framework for yield management and defect/fault reduction | |
JP4131918B2 (en) | Failure analysis apparatus and failure analysis method for semiconductor integrated circuit | |
JP2003282665A (en) | Failure semiconductor analyzing tool and system thereof failure semiconductor analyzing method, and manufacturing method for semiconductor device | |
JP3750220B2 (en) | Manufacturing method of semiconductor device | |
Shaw et al. | Statistical outlier screening as a test solution health monitor | |
JP2007165930A (en) | Quality control method of electronic device and quality control system of electronic device | |
Kovacs et al. | Improved pareto chart analysis for yield detractors’ identification | |
KR20050072166A (en) | Method for testing wafer | |
JP4633349B2 (en) | Defect analysis method and program for manufacturing electronic device | |
CN117981066A (en) | System and method for weighting defects with co-located modeled flaws | |
TW202314268A (en) | Systems and methods for semiconductor defect-guided burn-in and system level tests | |
Lahey et al. | Attack and resolution of a major product-specific systematic yield loss problem |