TW202142545A - 用於製造含矽薄膜之前驅物及方法 - Google Patents

用於製造含矽薄膜之前驅物及方法 Download PDF

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TW202142545A
TW202142545A TW110111744A TW110111744A TW202142545A TW 202142545 A TW202142545 A TW 202142545A TW 110111744 A TW110111744 A TW 110111744A TW 110111744 A TW110111744 A TW 110111744A TW 202142545 A TW202142545 A TW 202142545A
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silicon
compound
formula
film
plasma
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李銖眞
李相禛
金多慧
趙誠實
張西鳳
朴哉彦
布萊恩 C 漢迪克斯
湯瑪士 Ｈ 邦姆
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美商恩特葛瑞斯股份有限公司
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Abstract

本文提供可用於沈積含矽薄膜之某些液體矽前驅物，該等含矽薄膜係例如包含矽、氮化矽、氧氮化矽、二氧化矽、碳化矽、碳摻雜之氮化矽或碳摻雜之氧氮化矽之薄膜。亦提供利用氣相沈積技術形成該等薄膜之方法。

Description

用於製造含矽薄膜之前驅物及方法
一般而言，本發明係關於用於在微電子裝置表面上沈積含矽薄膜之方法及前驅物。
在半導體製造中，化學惰性介電材料(例如，氮化矽(Si3 N4 )、氧氮化矽(SiOx Ny )、碳化矽(SiC)、氮化碳矽(SiCN)及氧化矽碳(SiCO)及/或二氧化矽(SiO2 ))之薄(例如＜1000奈米厚度)鈍化層廣泛用於微電子裝置結構中，以充當多層裝置之結構元件，例如側壁間隔物元件、擴散遮罩、氧化障壁、溝槽隔離塗層、金屬間介電材料、鈍化層、絕緣體及蝕刻停止層。
藉由化學氣相沈積技術沈積含矽薄膜係形成該等薄膜之極具吸引力方法。特別期望涉及低沈積溫度(例如，低於約550℃之溫度)之CVD製程，但需要用於此目的之適宜矽前驅物化合物之可用性。在一些情形中，當積體電路之熱預算將允許時，可考慮較高之沈積溫度。在該等情形中，可利用＞450℃之溫度以達成介電薄膜之期望性質，特定地在其中期望高品質二氧化矽薄膜之情形中。在其中需要極高品質薄膜且允許高熱預算之情況中，對高溫穩定之源材料係較佳的，此乃因其能夠實現飽和的ALD脈衝，從而在高縱橫比結構上提供均勻階梯覆蓋。
氮化矽(SiN)由於其高濕式蝕刻及抗O2 灰化性，已用於FinFET及閘極全環繞(GAA)結構之源極及汲極間隔物(S/D間隔物)。不幸地，SiN具有約7.5之高介電常數(k)。已開發碳及氮摻雜之SiO2 (SiCON)間隔物以降低介電常數並在沈積後處理期間維持優良濕式蝕刻及灰化抗性。當前，最佳濕式蝕刻及灰化抗性SiCON電介質具有大約4.0之k值。k值小於3.5之濕式蝕刻及灰化抗性電介質為下一代裝置所需。
另外，在微電子裝置之製作中、特定地在利用低溫氣相沈積技術用於形成氮化矽、二氧化矽及氧氮化矽薄膜之製程中，業內仍需要經改良有機矽前驅物及用於形成含矽薄膜之方法。具體而言，業內需要在儲存及氣相輸送期間具有良好熱穩定性、高揮發性及與基板表面之反應性之液體矽前驅物。
本發明概言之係關於在半導體裝置之製作中含矽薄膜之形成，且更特定而言在某些情形中在相對較低溫度下用於形成該等含矽薄膜(例如，包含矽、氮化矽、氧氮化矽、二氧化矽、碳化矽、碳摻雜之氮化矽或碳摻雜之氧氮化矽薄膜之薄膜)之組合物及方法。
如本文所闡釋之式(I)化合物可在該等各種含矽薄膜之形成中用作前驅物化合物。有利地，本發明之前驅物可在低溫氣相沈積條件下用於形成高品質氮化物薄膜，同時亦能夠在相對較高溫度下用於形成高品質及高生長速率二氧化矽薄膜。此多功能性由此證明式(I)前驅物之靈活性。在一個實施例中，式(I)化合物(例如，雙(二甲基矽基)二甲基肼)與習用矽前驅物相比時亦可提供二氧化矽薄膜之較高沈積速率。類似地，可利用式(I)化合物以較高生長速率製造氮化矽薄膜。(參見下文圖5)。SiN及SiCN之薄膜係在相似條件下在N2 、NH3 共反應物之存在下沈積。氣相沈積條件及製程可利用該等前驅物化合物以形成含矽薄膜，包括諸如以下之製程：化學氣相沈積(CVD)、原子層沈積(ALD)、電漿增強之ALD (PEALD)、電漿增強之循環化學氣相沈積(PECCVD)、可流動化學氣相沈積(FCVD)、電漿增強之類似ALD的製程或利用含氧反應物、含氮反應物或其組合之ALD製程。
除非上下文另外明確指明，否則如本說明書及隨附申請專利範圍中所用，單數形式「一(a, an)」及「該」包括複數個指示物。除非上下文另外明確指明，否則如本說明書及隨附申請專利範圍中所用，術語「或」通常以其包括「及/或」之意義使用。
術語「約」通常係指認為相當於所列舉值(例如，具有相同功能或結果)之數字範圍。在許多情況下，術語「約」可包括經捨入至最近有效數字之數值。
使用端點表述之數值範圍包括歸屬於該範圍內之所有數值(例如，1至5包括1、1.5、2、2.75、3、3.80、4及5)。
在第一態樣中，本發明提供式(I)化合物：
Figure 02_image003
(I)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵素原子。在一個實施例中，每一R1 係甲基。
式(I)化合物可用作前驅物用於在微電子裝置之表面上沈積含矽薄膜。在某些實施例中，薄膜亦含有氮及/或氧及/或碳。
因此，在第二態樣中，本發明提供在微電子裝置之表面上沈積含矽薄膜之方法，其包含在氣相沈積條件下將至少一種式(I)化合物引入至反應腔室中之該表面上。
式(I)化合物可根據以下反應方案製備： 步驟1：
Figure 02_image005
在步驟1中，氯矽烷與二甲基肼反應以提供矽基肼合中間體及肼鹽酸鹽副產物。 步驟2：
Figure 02_image007
如上所示在步驟2中，肼合二甲基矽烷(或一些其他肼合(R1 )2 --矽烷)可與正丁基鋰或一些其他視情況含有一個氮原子之反應性鹼金屬C1 -C6 烷烴反應。其他潛在反應物包括甲基鋰、第三丁基鋰、二異丙基胺基鋰、甲基鉀、正丁基鉀等， 以獲得如下所述之新穎中間體(II)：
Figure 02_image009
(II)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵素原子，且其中R2 選自鋰或鉀，其進而可用於式(I)化合物之合成。然後在此方案中使式(II)化合物與例如氯二甲基矽烷反應。因此，在本發明之第三態樣中，提供如上所闡釋之式(II)化合物。
在本發明之第四態樣中，由此提供製造式(I)化合物之製程：
Figure 02_image011
(I)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵原子，該製程包含以下步驟： A.     使下式之化合物
Figure 02_image013
與式M-R3 之化合物接觸，其中M係鋰或鉀且R3 係視情況含有氮原子之C1 -C6 烷基，以提供式(II)化合物：
Figure 02_image015
(II)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵原子，且其中R2 選自鋰或鉀；隨後 B.     使式(II)化合物與下式之化合物反應
Figure 02_image017
，其中X係鹵素。
如本文所用，術語「含矽薄膜」係指諸如二氧化矽、氮化矽、氧氮化矽、碳化矽、碳氮化矽、氧碳氮化矽、低-k薄含矽薄膜等之薄膜。
在某些實施例中，氣相沈積條件包含稱為化學氣相沈積、脈衝化學氣相沈積及原子層沈積之反應條件。在脈衝化學氣相沈積之情形中，可在有或沒有中間(惰性氣體)吹掃步驟之情況下利用一系列前驅物化合物及共反應物之交替脈衝以使薄膜厚度累積至期望終點。
式(I)化合物使能夠低溫CVD及/或ALD形成含矽薄膜。該等化合物展現高揮發性及化學反應性，但在前驅物揮發或蒸發所涉及之溫度下關於熱降解係穩定的，此允許將所得前驅物蒸氣一致且可重複地輸送至沈積區或反應腔室。
在某些實施例中，上文所描述前驅物化合物之脈衝時間(即，前驅物暴露於基板之持續時間)在約0.1與30秒之間之範圍內。在其他實施例中，共反應物之脈衝時間在約0.1至約30秒之範圍內。
在一個實施例中，氣相沈積條件包含約50℃至約750℃之溫度。在另一實施例中，氣相沈積條件包含約200℃至約650℃之溫度。在另一實施例中，氣相沈積包含約500℃至550℃之溫度。
在一個實施例中，蒸氣壓力條件包含約0.5至約1000托(Torr)之壓力。
以上化合物可藉由任何適宜氣相沈積技術(例如CVD、數位(脈衝) CVD、ALD及脈衝電漿製程(PEALD))用於形成高純度薄含矽薄膜。可利用該等氣相沈積程序以藉由利用約250℃至約550℃之沈積溫度在微電子裝置上形成含矽薄膜，以形成厚度為約20埃至約2000埃之薄膜。
在本發明製程中，上述化合物可與期望微電子裝置基板以任何適宜方式在例如單晶圓CVD、ALD及/或PECVD或PEALD腔室中或在含有多個晶圓之爐中反應。
或者，本發明之製程可作為ALD或類似ALD的製程實施。如本文所用，術語「ALD或類似ALD」係指諸如以下之製程：(i) 將包括式(I)之矽前驅物化合物及氧化及/或還原氣體之每一反應物依序引入至諸如單晶圓ALD反應器、半批式ALD反應器或批式爐ALD反應器之反應器中，或(ii)將包括式(I)之矽前驅物化合物及氧化及/或還原氣體之每一反應物藉由使基板移動或旋轉至反應器之不同區段來依序暴露於基板或微電子裝置表面，且每一區段由惰性氣體簾幕隔開，即，空間ALD反應器或捲到捲ALD反應器。
在一態樣中，本發明係關於電漿增強之原子層沈積(PEALD)製程，其使用本文所述之式(I)前驅物連同氫電漿或氮電漿一起沈積具有低濕式蝕刻速率之薄膜。氮電漿可與式(I)之前驅物化合物一起用於形成所用之氮化矽薄膜。
因此，在另一實施例中，上述氣相沈積製程可進一步包含涉及將薄膜暴露於還原氣體之步驟。在本發明之某些實施例中，還原氣體包含選自H2 、肼(N2 H4 )、甲基肼、第三丁基肼、1,1-二甲基肼、1,2-二甲基肼、烷基胺、吡啶及NH3 之氣體。
在另一實施例中，氣相沈積製程可進一步包含涉及將前驅物暴露於氧化氣體(例如O2 、O3 、N2 O、水蒸氣、醇或氧電漿)以形成二氧化矽薄膜之步驟。在其中R1 係鹵基之彼等情形中，則諸如水及醇之氧化劑可與諸如吡啶、烷基胺、N,N’-二甲基甲醯胺及氨之鹼一起使用。在某些實施例中，氧化氣體進一步包含惰性氣體，例如氬氣、氦氣、氮氣或其組合。在另一實施例中，氧化氣體進一步包含氮氣、氧化亞氮或氨，其可與式(I)之前驅物在電漿條件下反應以形成氧氮化矽薄膜。
一般而言，使用式(I)之前驅物化合物所產生之期望薄膜可藉由選擇每一化合物及反應條件以及利用還原或氧化共反應物來定製。參見例如以下方案1：
Figure 02_image019
方案1
在雙(二甲基矽基)二甲基肼(式(I)，當每一R1 係甲基時)之情形中，所得SiO2 薄膜在450℃下展現1.3Å/循環之生長速率且在氧電漿製程中展現極快速表面飽和。
在一個實施例中，氧化氣體(例如臭氧(O3 ))用於氣相沈積製程中以提供快速生長之二氧化矽薄膜。在一個實施例中，溫度為約500℃至600℃。在臭氧製程之情形中，觀察到1.9至約5.8Å/循環之生長速率。另外，所得SiO2 薄膜之濕式蝕刻速率顯示優於利用BTBAS (雙(第三丁基胺基)矽烷)作為矽前驅物之比較薄膜之改良。
在二氧化矽薄膜之情形中，實例性脈衝型態包括以下： (i)    注入式(I)之前驅物達0.1至30秒，隨後 (ii)   使用惰性氣體吹掃1至30秒，隨後 (iii)  以50至500 sccm (標準立方公分/分鐘)之流速注入臭氧達約0.1至30秒，隨後 (iv)   使用惰性氣體吹掃1至30秒。(一個循環)。因此可重複步驟(i)至(iv)，直至已獲得期望厚度之薄膜為止。
因此，在另一實施例中，本發明提供製造二氧化矽薄膜之方法，其中氣相沈積條件包含約150℃至約650℃之溫度及包含以下步驟之脈衝序列： (i)    注入式(I)之前驅物達0.1至30秒，隨後 (ii)   使用惰性氣體吹掃1至30秒，隨後 (iii)  以50至500 sccm之流速注入臭氧達約0.1至30秒，隨後 (iv)   使用惰性氣體吹掃1至30秒，並重複步驟(i)至(iv)，直至已獲得期望厚度之薄膜為止。
在一個實施例中，在氣相沈積製程中利用氮電漿以提供氮化矽薄膜。在一個實施例中，溫度係約200℃至300℃。在雙(二甲基矽基)二甲基肼之情形中，利用功率為200瓦特至300瓦特、流速為100至300 sccm之N2 之氮電漿，提供氮化矽。
在氮化矽薄膜之情形中，實例性脈衝型態包括以下： (i)    注入式(I)之前驅物達0.1至30秒，隨後 (ii)   使用惰性氣體吹掃1至30秒，隨後 (iii)  使用N2 以50至500 sccm之流速及約50瓦特至1000瓦特之功率注入氮電漿達0.1至30秒，隨後 (iv)   在電漿暴露後，使用惰性氣體可選吹掃1至30秒。(一個循環)。由此可重複步驟(i)至(iv)，直至已獲得期望厚度之薄膜為止。
因此，在另一實施例中，在氮化矽薄膜之製造中，氣相沈積條件包含約150℃至約300℃之溫度、約0.1至約5托之壓力及包含以下步驟之脈衝序列： (i)    注入式(I)之前驅物達0.1至30秒，隨後 (ii)   使用惰性氣體吹掃1至30秒，隨後 (iii)  使用N2 以50至500 sccm之流速及約50瓦特至500瓦特之功率注入氮電漿達0.1至30秒，隨後 (iv)   在電漿暴露後使用惰性氣體可選吹掃1至30秒，並重複步驟(i)至(iv)，直至已獲得期望厚度之薄膜為止。
當使用式(I)之前驅物化合物時，碳及氮併入該等薄膜中係該等化合物之組成的自然結果，且製程條件可經調諧以有利於併入或排斥該等元素。另外，若期望碳併入，則可例如利用呈甲烷、乙烷、乙烯或乙炔之形式的碳以將碳含量進一步引入至含矽薄膜中，由此產生碳化矽、碳氮化矽或碳氧化矽。
本文所揭示之沈積方法可涉及一或多種吹掃氣體。用於吹掃掉未消耗反應物及/或反應副產物之吹掃氣體係不與前驅物反應之惰性氣體。實例性吹掃氣體包括(但不限於)氬氣、氮氣、氦氣、氖氣、氫氣及其混合物。在某些實施例中，將吹掃氣體(例如Ar)以約10至約2000 sccm範圍內之流速供應至反應器達約0.1至1000秒，由此吹掃未反應之材料及可留在反應器中之任何副產物。注意，氣體(例如氮氣)在未被電漿激活時係惰性的且作用為吹掃氣體，但在被電漿激活時則係共反應物。
供應矽前驅物化合物、氧化氣體、還原氣體及/或其他前驅物、源氣體及/或試劑之各別步驟可藉由改變供應其之序列及/或改變所得介電薄膜之化學計量組成來實施。
將能量供應至式(I)之矽前驅物化合物及氧化氣體、還原氣體或其組合中之至少一者以誘發反應並在微電子裝置基板上形成含矽薄膜。該能量可藉由但不限於熱、脈衝熱、電漿、脈衝電漿、螺旋波電漿、高密度電漿、感應耦合電漿、X-射線、電子束、光子、遠端電漿方法及其組合提供。在某些實施例中，可使用次級RF頻率源以改質基板表面處之電漿特徵。在其他實施例中，在電漿與基板之間可維持DC偏壓。在其中沈積涉及電漿之實施例中，電漿發生製程可包含其中電漿直接在反應器中發生之直接電漿發生製程，或另一選擇其中電漿係在反應區及基板「遠端」發生、供應至反應器中之遠端電漿發生製程。
如本文所用，術語「微電子裝置」對應於半導體基板(包括3D NAND結構)、平板顯示器及微機電系統(MEMS)，該等經製造用於微電子、積體電路或電腦晶片應用。應理解，術語「微電子裝置」並不意欲以任何方式限制且包括包含負通道金屬氧化物半導體(nMOS)及/或正通道金屬氧化物半導體(pMOS)電晶體且最終將變成微電子裝置或微電子組裝之任何基板。該等微電子裝置含有至少一個基板，該基板可選自例如矽、SiO2 、Si3 N4 、OSG、FSG、碳化矽、氫化碳化矽、氮化矽、氫化氮化矽、碳氮化矽、氫化碳氮化矽、氮化硼、抗反射塗層、光阻劑、鍺、含鍺、含硼、Ga/As、撓性基板、及多孔無機材料、金屬(例如銅、鋁、鈷、鎢、鉬、釕及銥)及擴散障壁層(例如但不限於TiN、Ti(C)N、TaN、Ta(C)N、Ta、WN、WC、MoC或MoN)。薄膜與各種後續處理步驟(例如，化學機械平坦化(CMP)及各向異性蝕刻製程)相容。
本發明可藉由其某些實施例之以下實例進一步說明，但應理解，除非另外特定指出，否則包括該等實例僅用於說明之目的且並不意欲限制本發明之範圍。
實例 實例1 --二甲基肼合-二甲基矽烷之合成 向N,N’-二甲基肼(88.93g, 1.48mol)於正戊烷(350g, 4.85mol)中之冰冷溶液中逐滴添加氯二甲基矽烷(70g, 0.74mol)於正戊烷(70g, 0.97mol)中之溶液並在-10℃以下攪拌。添加氯二甲基矽烷溶液後，將反應混合物在室溫下攪拌5小時。將所獲得之白色漿液過濾並用正戊烷(125g)洗滌。去除揮發物之後，所獲得粗產物藉由在50℃下在240托下簡單蒸餾來純化，以獲得呈無色液體之標題化合物(62.50g, 71.4%)。
實例2 --雙(二甲基矽基)二甲基肼之合成 在-20℃下向二甲基肼合-二甲基矽烷(60g, 0.507mol)於正己烷(210g, 2.44mol)中之溶液中逐滴添加正丁基鋰於正己烷(203mL, 2.5mol)中之溶液。添加正丁基鋰溶液後，將反應混合物在室溫下攪拌2小時且然後冷卻至-10℃。向此反應混合物中逐滴添加氯二甲基矽烷於正己烷中之溶液，隨後在室溫下攪拌5小時。將所獲得之白色漿液過濾並用正己烷(90g)洗滌。去除揮發物之後，所獲得粗產物藉由在80℃下在80托下簡單蒸餾來純化，以獲得呈無色液體之終產物(78.71g, 63.5%)。
實例3 – 二氧化矽薄膜之沈積 氧化矽薄膜係藉由使用雙(二甲基矽基)二甲基肼蒸氣作為矽前驅物來沈積。在室溫下將雙(二甲基矽基)二甲基肼置於起泡器中。使用雙淋浴頭ALD反應器在矽晶圓上利用臭氧共反應物在500至600℃之晶圓溫度下沈積氧化矽薄膜。反應器壓力控制在0.5至1.5托之間。氧化矽薄膜係使用以下脈衝序列形成：28秒矽前驅物脈衝、20秒Ar吹掃、25秒臭氧脈衝及20秒Ar吹掃。將此序列重複160個循環以獲得400Å之薄膜厚度。沈積速率在550℃下在約2.5Å/循環時飽和且薄膜中沒有碳及氯雜質。使用0.2% HF稀釋溶液獲得51.4Å/min之薄膜濕式蝕刻速率。
實例4 – 氮化矽薄膜之沈積 氮化矽薄膜係使用雙(二甲基矽基)二甲基肼作為矽源前驅物材料來沈積。將BDMSDMH起泡器保持於室溫(大約23℃)下，且反應器壓力控制在0.5至1.5托。氮化矽薄膜係使用以下脈衝序列形成：28秒矽前驅物脈衝、20秒Ar吹掃、15或20秒在13.56MHz頻率脈衝下在200或300W下之直接氮電漿及20秒Ar吹掃。將此序列重複170個循環以獲得200Å之薄膜厚度。此製程在300℃下在約1.16Å/循環時飽和且薄膜中沒有碳及氯雜質。
本發明已特定參考其某些實施例詳細闡述，但應理解，可在本發明之精神及範圍內進行各種變化及修改。
因此，已闡述本揭示內容之若干說明性實施例，熟習此項技術者將易於理解，在隨附申請專利範圍之範圍內亦可做出及使用再其他實施例。此文件所揭示之本揭示內容的許多優點已闡釋於先前描述中。然而，應瞭解，此揭示內容在許多方面中僅係說明性的。可在細節上、特定地在部件之形狀、大小及配置方面做出改變而不超出本揭示內容之範圍。當然，本揭示內容之範圍由隨附申請專利範圍所表達之語言來定義。
圖1係使用雙(二甲基矽基)二甲基肼(下式(I)，其中每一R1 係甲基)及臭氧作為氧化共反應物氣體在三個溫度500℃、550℃及600℃下實施之每循環SiO2 生長速率(以埃計)對脈衝時間(以秒計)之繪示。對於＜600℃之基板溫度，觀察到ALD飽和曲線，此指示在較低溫度下之飽和ALD行為。在550℃下注意到＞2.5 Å/循環之高SiO2 生長速率。 圖2係對於藉由圖1中所闡述之相似製程沈積之純SiO2 薄膜，藉由x-射線光電子光譜法(XPS)量測之原子百分比隨蝕刻時間(以秒計)變化之圖表(深度剖析)。去除薄膜之環境保護層後，未觀察到N或C。Si:O含量之相對比率反映SiO2 薄膜之組成。 圖3圖解說明在具有18:1縱橫比之SiN/SiO2 /Si溝槽結構上藉由圖1中所述之前驅物化學及製程所達成之具有＞ 92%保形階梯覆蓋之SiO2 薄膜之沈積。 圖4係在各種基板溫度下自雙(二甲基矽基)二甲基肼(BDMSDMH)沈積薄膜與自雙(第三丁基胺基)矽烷(BTBAS)沈積薄膜之濕式蝕刻速率的比較。濕式蝕刻係利用200:1 HF水溶液實施。在此情形中，自雙(二甲基矽基)二甲基肼前驅物沈積之薄膜與自BTBAS沈積之薄膜相比，濕式蝕刻速率代表大約＞60%改良。該等濕式蝕刻速率亦與熱氧化物(SiO2 )之濕式蝕刻速率相比較。 圖5圖解說明對於使用雙(二甲基矽基)二甲基肼作為前驅物在250℃下及300 sccm之氮流速在200瓦特(watt)電漿功率下之氮化矽沈積製程，在N2 電漿暴露之影響下每循環生長速率隨矽脈衝時間之變化。所利用循環序列係(i) 前驅物，其中脈衝長度繪示於x軸上，(ii)吹掃20秒，(iii) 氮電漿15秒(正方形)或20秒(圓形)，隨後(iv)吹掃20秒。 圖6圖解說明當在如圖5中所示之相似反應器及電漿沈積條件下使用不同脈衝時間之雙(二甲基矽基)二甲基肼作為前驅物，氮電漿功率(200瓦特或300瓦特)對每循環生長速率之效應，其中電漿暴露時間為15秒。
Figure 110111744-A0101-11-0002-1

Claims (11)

  1. 一種式(I)之化合物，
    Figure 03_image021
    (I)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵素原子。
  2. 如請求項1之化合物，其中每一R1 係H。
  3. 如請求項1之化合物，其中每一R1 係甲基。
  4. 如請求項1之化合物，其中每一R1 係乙基。
  5. 如請求項1之化合物，其中每一R1 係選自Cl、Br及I之鹵素原子。
  6. 一種製造式(I)化合物之方法，
    Figure 03_image023
    (I)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵素原子，該方法包含以下步驟： A.     使下式之化合物
    Figure 03_image025
    ， 與式M-R3 之化合物接觸，其中M係鋰或鉀且R3 係視情況含有氮原子之C1 -C6 烷基，以提供式(II)化合物：
    Figure 03_image027
    (II)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵原子，且其中R2 選自鋰或鉀；隨後 B.     使該式(II)化合物與下式之化合物反應
    Figure 03_image029
    ，其中X係鹵素。
  7. 一種式(II)化合物，
    Figure 03_image030
    (II)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵素原子，且其中R2 選自鋰或鉀。
  8. 如請求項7之化合物，其中每一R1 選自甲基且R2 係鋰。
  9. 如請求項7之化合物，其中每一R1 係甲基且R2 係鉀。
  10. 如請求項7之化合物，其中每一R1 係乙基。
  11. 一種在微電子裝置之表面上沈積含矽薄膜之方法，其包含在氣相沈積條件下將至少一種式(I)化合物引導至反應腔室中之該表面
    Figure 03_image032
    (I)， 其中每一R1 獨立地選自氫、C1 -C4 烷基或選自Cl、Br及I之鹵素原子。
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