JPS596477Y2 - electric clock - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an electric clock in which an electromechanical converter is driven by an intermittent pulse signal.

The present invention relates to an electric clock in which a standard signal of relatively high vibration frequency, such as a crystal oscillator, is frequency-divided to an ultra-low frequency using a frequency dividing circuit, and the resulting signal drives an electromechanical converter. The waveform shaping for driving the converter is characterized by the fact that it does not use any conventional resistance elements or capacitor elements, and this embodiment uses field effect transistors (FETs).
) is effective when assembled using only IC integrated circuit technology.

The purpose of the present invention is to provide a drive circuit for a crystal wristwatch or the like using a direct-coupled logic circuit.

Another purpose of the present invention is to create an easy-to-manufacture highly reliable integrated circuit using active elements such as MOSFETs that effectively utilize static charges induced on the semiconductor surface through an oxide film (SiO2) without using any passive elements. The company provides electric clocks.

As shown in Figure 1, in a conventional electric clock, a 1-second signal is input to a flip-flop (FF) using R and C, and a monostable multi (MV) signal is input from the right and left side of the FF using R and C, respectively.
1, MV2) was triggered to a predetermined pulse width, which was then inserted into a driving transistor to alternately flow current through the converter coils L1 and L2.

When R and C used for this MV1 or Mv2 require a driving current pulse width of 15 msec, R is 10 MJ.
7, C must incorporate passive elements with high resistance and capacitance of about 1500 PF, which makes it difficult to store in a narrow volume such as a wristwatch, and the elements. Since the electronic circuit is large and the wiring is extended outside, reliability is not improved.

If a wristwatch is driven by the recently developed large-scale integrated circuit (LSI or MSI) technology that assembles electrical circuits using only semiconductor integration technology, it will not only be smaller but also more reliable, reducing work steps and mass production. It is clear that the effect is great.

Due to the above-mentioned necessity, the present invention will be described in detail using a circuit for driving a pulse motor as shown in FIG. 2 as a specific example.

1 in Fig. 2 is the rotor of the motor, which is a hexapole of permanent magnets.

All other forms of these transducers are conceivable.

2 is a yoke, 3 is a drive coil, 4 is a gear that transmits rotation from the rotor, 5 is a second hand, 6, 7, 8.9 are bibolar type np
In this case, bibolar type driving transistors are used because the current capacity cannot be kept up with MOST using n- and p-type drive transistors.

Drive signals are simultaneously applied to transistors 6 and 8,
A current is passed through the coil 3 in one direction, and at the next moment a signal is given to 7 and 9, causing a current to flow through the coil 3 in the opposite direction.

In this specific example, tM drives the second hand every second with a pulse width of 15 msec.

Figure 3 is an input waveform diagram of the driving transistor in Figure 2.
nputs i and 2 are always at a positive potential, and inputs 3 and 4 have a zero potential only when a drive current with a pulse width of tM is applied. 3 and input 2
．． 4 and 1 second apart from each other.

In the worst case, there will be a time delay of td after the Reset signal is received by an external reset means, and the input
Signals at t 1, 2, and 3.4 are given to the drive circuit.

When the reset terminal R is set to (+ potential), the transistor becomes conductive and the signal is cut off.

At this time, since the capacitances of the gates of the transistors of circuits A, B, and C all overlap and influence each other, there is a time delay of td before the signal of tM is generated.

Figure 4 shows the standard signal source Fo as a frequency divider flip-flop (F
．．・・・・・・Fn・・・・・・Fx) to divide the frequency to a 1 second signal and input it into waveform shaping circuits A, B, C to generate input signals 1, 2, 3.4 as shown in Fig. 3. It is growing.

The waveform shaping circuit A serves to delay the input signal Fx by the pulse width of another input signal Fn.

Here, Fx is the output wave of a flip-flop which is inverted every second and has a cycle of 2 seconds, and Fn is the output wave of a flip-flop which has a cycle of 32 cycles.

Therefore, the Fx waveform with a period of 2 seconds is delayed from the original signal by 1/64 seconds.

Waveform shaping circuits B and C receive the signal from A above and F with a 2 second period.
The signal between x and Fx and Fx with a 180° phase shift is
ND gate circuit B and NOR gate circuit C
A signal as shown in the figure is given.

A, B, and C surrounded by dotted lines in Figure 5 are A, B, and B in Figure 4.
,C.

In B, the left half is a NAND circuit and the right half is an inverter circuit, and in C, the left half is a NOR circuit and the right half is an inverter circuit.

As described above, the present invention can generate an arbitrary pulse width without using any resistor or capacitor as a passive element, that is, Fn in FIG.
By arbitrarily shifting to Fn-1 or Fn+1,
It can vary any pulse width, and by combining it with a four-transistor drive circuit as shown in Figure 2, an extremely low frequency inverted pulse can be changed, and it can be used as a converter for an n-pole pulse motor as shown in Figure 2. It is clear that it is highly important for low-power quartz wristwatches and other high-end electric watches, as it is a highly reliable and compact drive system that uses semiconductor integrated technology.

[Brief explanation of drawings]

Figure 1 shows a drive circuit for a quartz watch, etc. according to the conventional concept, Figure 2 shows an electromechanical converter and drive circuit according to the present invention, Figure 3 shows drive waveforms according to the present invention, and Figures 4 and 5 show the invention according to the present invention. 2A and 2B are schematic diagrams each showing a specific example of a drive circuit for explaining in detail.

Claims (1)

[Scope of utility model registration request] In an electric clock comprising a time standard signal, a frequency divider consisting of a plurality of stages of flip-flops for dividing the frequency of the time standard signal, and a step motor driven based on the output signal of the frequency divider. , a waveform shaping circuit for shaping a drive signal for the step motor by limiting the pulse width of the output signal, the waveform shaping circuit comprising a delay circuit consisting only of MOSFETs for delaying the output signal; The output signal and the delay signal obtained from the delay circuit are synthesized to obtain the drive signal. An electric timepiece characterized in that a signal from an intermediate stage of the frequency divider having a frequency divider is input, and a pulse width of the drive signal is equal to a pulse width of a signal input to the delay circuit.