JPS5842478B2 - Noise removal device for electronic musical instruments - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise removal device for an electronic musical instrument in which the noise of sampling of stored musical sound waveforms is made to be outside the audible frequency range.

Conventionally, in a device that has a large number of key switches, such as the keyboard of an electronic musical instrument, when information associated with the opening and closing of a switch is transferred to the required circuit, the amount of wiring would be prohibitive if you tried to connect each switch directly to the circuit. It is uneconomical.

Furthermore, if a semiconductor integrated circuit or the like is to be used, the number of pins will be too large, making it difficult to use as is.

Currently, in view of this point, all switches are scanned for a predetermined period of time, and a pulse is generated at the time corresponding to the key switch turned on in the time sequence according to the scan, and a pulse is generated to connect a large number of switches and the required circuit. A method to save wiring is being considered.

For example, a key code multiplexing method has generally been used in which each key switch is scanned in a time-division manner to send information about the switch turned on as a TDM (time division modulation) signal or a PCM (pulse code modulation) signal.

However, since the time required to scan all the key switches is fixed, even if only a few key switches are turned on, the fixed scanning time is required, resulting in waste.

The number of key switches that are turned on at the same time when playing a normal keyboard instrument is 11 keys, taking both hands and feet into account.

Now, if we consider one block as one octave unit, it is impossible to press more than two octaves with one hand, so five blocks is the maximum number that can be occupied at the same time.

Therefore, the keyboard switches are divided into a plurality of blocks and scanned, and if even one switch is turned on, the scanning is stopped and this is detected.

Since blocks without on switches are passed through, it is possible to shorten the time required for l scanning to obtain information on turned on switches.

Recently, the applicant of the present invention has proposed a key code generation circuit and a key code detection circuit that shorten the scanning time, or a digitally processed electronic musical instrument using these circuits, in accordance with the above-mentioned idea.

In such electronic musical instruments, a method is used in which a desired frequency is generated from a main oscillator via a variable frequency divider circuit in response to a key closing signal captured by a channel determined by the maximum number of sounds of a key code detection circuit. There is.

On the other hand, a tone waveform is generated by calculating the tone waveform data required by the timbre control device with a waveform calculator to obtain a synthesized tone waveform, storing it, and reading it out at the readout frequency associated with the above-mentioned key closing. .

Conventionally, a method of storing a fixed sampling number for this synthesized musical sound waveform has been frequently used, but in this case, the sampling frequency is proportional to the fundamental frequency, so in the low frequency region of the fundamental frequency, the step noise frequency caused by sampling is low (so it falls into the audible frequency range and can be heard as noise compared to the desired musical tone).

Such a step noise frequency cannot be removed by a filter because it is proportional to the fundamental frequency and is not constant.

Furthermore, since step noise increases between the fundamental frequency and its harmonics, that is, between octaves, it is recommended to perform interlaced scanning for harmonics and store them at a constant step noise frequency for the entire range. Although it has been proposed, the memory capacity in this case increases considerably compared to the memory capacity corresponding to the harmonic number without interlaced scanning.

SUMMARY OF THE INVENTION An object of the present invention is to provide a noise removal device for an electronic musical instrument that reduces the memory capacity required to represent a required number of harmonics and eliminates step noise caused by sampling outside the audible frequency range.

In order to achieve the above object, the noise removal device for an electronic musical instrument of the present invention includes a storage circuit that stores an amplitude value at each sampling point of a musical sound waveform, a difference value at each sampling point, and a sign bit representing the sign bit representing the sign of the difference value; means for reading out the memory circuit at a frequency corresponding to the closed key; means for obtaining a tone waveform correction control signal of an octave higher than the readout frequency of the closed key; and multiplying the amplitude value by a predetermined constant. a first multiplication means for multiplying the difference value by a tone waveform correction control signal;
The present invention is characterized in that it includes an addition/subtraction circuit that performs addition/subtraction by controlling the addition/subtraction of the value obtained by the second multiplication means using the sign bit.

The present invention will be described in detail below with reference to examples.

First, an overview of a new electronic musical instrument to which the present invention is applied will be explained,
Next, detailed embodiments of the present invention will be described as part of its configuration.

The electronic musical instrument to which the present invention is applied is a digital musical instrument that calculates the musical waveform data required by the timbre control device, obtains a synthesized waveform, and generates a musical tone by reading this at the readout frequency associated with the closing of the key switch. It is an electronic musical instrument.

FIG. 1 is a basic block diagram showing the overall configuration of an electronic musical instrument to which the present invention is applied.

In the figure, key information associated with the closing of a key switch from a keyboard 4 is generated by a key code generation circuit 5.

In the key code generation circuit 5, the keyboard switches are divided into a plurality of blocks, and when one or more key switches in a block are closed, the ON state of the key switch in that block is detected, and one frame is generated by the detection block. Scanning is performed using a variable frame system comprising a key code signal KCD and a frame synchronization signal FP.

The key code detection circuit 6 has a number of channel circuits 6 (CHI) corresponding to the maximum number of simultaneous sounds.

6(cH2),・・・・・・・・・・・・・・・-,6(
CHn), and whether it is the key code signal KCD that was previously captured by the key code detection circuit 6 using the key code signal KCD and frame synchronization signal FP mentioned above;
It also detects whether the key switch is opened or not, and provides this to the common logic circuit 7.

In the common logic circuit 7, the key code signal KCD
The key code detection circuit 6 determines whether or not to capture the channel and sends a signal specifying the channel if captured.
supply to.

The key code detection circuit 6 of the channel designated for capture captures the key code signal KCD and starts counting with the envelope counter circuit 80, and the sequential pulse generation circuit 2 operates based on the master clock MC from the master clock generation circuit 1. The signal is time-divided by the corresponding channel pulse CHpn generated by the channel pulse CHpn, and is supplied to the envelope generation circuit 8 via the pass line.

The envelope generating circuit 8 calculates envelope data corresponding to the envelope data constantly read out by the envelope master clock MC' based on the count value to obtain an envelope waveform.

The state transitions of the musical sound waveform in the attack, decay, and sustain states are controlled by set values given to the envelope generation circuit 8.

Furthermore, when the key switch is closed, the release, that is, the transition to the open state, is performed by the frame synchronization signal FP and the key code signal K.
carried out in the key code detection circuit 6 by the CD,
This is carried out by calculating the data that is supplied to the envelope generation circuit 8 and associated with the release state.

Key code signal KC captured by key code detection circuit 6
The DO internal note signal NC is time-divided by its corresponding channel pulse and is applied to the note clock generation circuit 3.

The note clock generation circuit 3 includes a note clock generator corresponding to 12 notes, and a master clock M.
A signal B corresponding to each note by C.

-Blo is generated. The applied note signal NC is decoded and distributed to the note generator corresponding to the note signal NC.The gate circuit is turned on and the octave frequency selection circuit 9 passes through the pass line to the note signal generation circuit according to the octave signal OC. Signal B from 3.

~B1o is selected and the main memory circuit (I) 10, (II) 1
1 hair address read signal (ADDo-ADD4) R is input, and the waveform correction circuit 14 receives correction control signals ADD',
- Enter ADIy4.

The musical waveform calculation circuit 13 receives the signal from the synchronization detection circuit 12, detects the turned-on key switches of each drawbar switch and tablet switch, and stores the corresponding waveform data in the main memory circuits (I) 10 and (n). 11, and sequentially calculate new musical tone synthesis waveforms.
It outputs the amplitude value D1 at the sampling point, the difference value D2 at each sampling point, and the sign bit D3 representing the sign bit D3 representing the sign of the difference value, and outputs the amplitude value D1 at the sampling point, the difference value D2 at each sampling point, and the sign bit D3 representing the sign bit D3 representing the sign of the difference value. Address write signal (ADDo to ADD4) to either
Write with W.

Upon completion of writing, address read signals (ADDo to AD
D4) One period of the musical tone cycle accompanying the closing of the key switch is detected from R, and reading of new musical waveforms to the main memory circuits (I) 10 and (II) 11 in which they have been written is sequentially started.

Main memory circuit (I) 10, (
II) When the reading to 11 is completed, a new musical tone synthesis waveform is calculated by the musical sound waveform calculation circuit 13, and the main memory circuits (I) 10 and (II) which are not currently being read are
11.

The waveform of the musical sound waveform read out by the address readout signal (ADDo-ADD4) R is corrected by the waveform correction signals ADIyO to ADIy4 given to the waveform correction circuit 14, and the step sound frequency is always kept constant regardless of the readout frequency. The signal is applied to the multiplication circuit 15.

In the multiplication circuit 15 , the signal is multiplied by the envelope waveform from the envelope generation circuit 8 and inputted to the cumulative adder 16 .

Envelopes are added to the closed musical sound waveforms of the key switches of all channels, which are converted into analog by a digital-to-analog (DA) converter 17, and then sent to the sound system 1.
The sound is emitted through 8.

As mentioned above, the tone waveform calculation circuit 13 shown in FIG. 1 outputs the amplitude value D1 at each sampling point of the tone waveform, the difference value D2 at each sampling point, and the sign bit D3 representing the sign bit D3 representing the sign of the difference value, and writes the address. The main memory circuit (I
) 10 and (II) 11, and the contents of the other main memory circuit 10.11 correspond to the closed key from the octave frequency selection circuit 9, and the note signal generation circuit is activated by the octave signal OC. Signal from 3 13o-131
It is read out by the address read signal (ADDo-ADD4) H output by selecting o, and is input to the waveform correction circuit 14.

On the other hand, waveform correction control signals ADIyO to ADIyl as described below are input directly from the octave frequency selection circuit 9.

FIG. 2 is a detailed explanatory diagram of the waveform correction circuit 14, which is the main part of the present invention.

As an example, the waveforms of the scale C7, C6, and C5 in FIG. 3 are shown as waveform data from the main memory circuits (I) 10 and (IF) 11.

The waveform of C7 is formed by the data in Table 1 regarding the input amplitude D1, difference value D2, and sign bit (SB) D3.

The data in Table 1 are the difference value, time interval t, and sign bit (
SB).

In addition, the address read signal (ADDo-ADD4) R and the waveform correction control signal AD in the scales C7, C6, and C.
D9 to ADD' are selected as shown in Tables 2 and 3 below.

Here, the input signal B7 t B8 j BGI t 13
The relationship of to is a sequential doubling relationship as shown in Table 4 below.

In FIG. 2, main memory circuits (I) 10, (II) 11
The amplitude D1 of the musical sound waveform that is outputted is given to the first multiplier circuit 14-1 and is given to the constant "i o o o o o o".
(decimal number 32) is multiplied.

Here, the constant 32 corresponds to the waveform correction control signals AAD9 to AD.

is composed of 5 bits, and the second multiplier circuit 14-2
The multiplier given to 'ooooo ~ 11111'' (10
This is set because the base number is 0 to 31).

The difference value D2 is given to the second multiplication circuit 14-2, and the waveform correction control signal ADIyO~A is given via the note clock generation circuit 3 and the octave frequency selection circuit 9.
DD'.

The outputs of the first and second multiplication circuits 14-1 and 14-2 are given to an addition/subtraction circuit 14-3, and the addition/subtraction is controlled by a sign bit.

Table 2 shows address read signals (ADDo to ADD4).
) R's relationship with scales C7, C6, and C5, Table 3 shows the relationship between waveform correction control signals ADIyO to ADIy4 and scales C7,
Table 4 shows the relationship between C6 and C5 and the time relationship between each bit of the address read signal and waveform correction control signal.

As shown in Table 3, the waveform correction control signals ADD' and -ADσ4 are not applied to the scale C7.

In this case, the value 0 (decimal number) is always given as the waveform correction control signal, and the output of the multiplier circuit 14-2 is always O
Therefore, the amplitude D1 in Table 1 is the multiplier circuit 14-
The difference value D2 is multiplied by 32 by 1, and the difference value D2 is multiplied by the multiplication circuit 14-2
will always be multiplied by 0.

That is, at address 0, 128 is added/subtracted by the addition/subtraction circuit 14-
3, 256 is output at address 1, and 256 is output from address 2.
Similarly, 0 is output from the adder/subtracter circuit 14-3 at address 31.

In this way, the waveform shown in FIG. 3a is output.

Next, for scale C6, as shown in Table 3, bit AD Iy of waveform correction control signal ADD'o-ADIy4
Since Blo is given to 4, bit ADD'4 is 2'
=16, and the signal f3to becomes "
1'', the difference value D2 is multiplied by 16 in the multiplier circuit 14-2.

On the other hand, the amplitude is read out at the timing of signal B, as shown in Table 2.

As can be seen from Table 4, signal B1o has twice the frequency of signal B.

When the address is O, the amplitude D1 is 32 in the multiplier circuit 14-1.
While being multiplied, the difference value D2 is first multiplied by the multiplication circuit 14-2.
When lo is “O”, it is multiplied by O and becomes 0, then BIO is 1”
, it is multiplied by 16 and given to the addition/subtraction circuit 14-3. Therefore, when Blo is 11011, the output of the addition/subtraction circuit 14-3 is 128, and when B1° is 1'', 192 is output.

For address 1, 256 when B=0, 320 when B=1
is output.

For address 2, 384 when B=0, 448 when B-1
becomes.

Thereafter, a waveform as shown in FIG. 3 is output in the same manner.

In the scale C6, the waveform correction signals ADIT', -ADIy4
As B9) BIO is given, so B,.

0 when B1oIJ″-00″. ``10'' when 8,''
16 when the value is 01", 24 is the multiplier circuit 14-2 when the value is 11"
given to.

Also, address read signal (ADDo-ADD4) R=
Bs to B4 are given, the waveform correction signal B is 02 times the frequency of the address read signal B, and the frequency of BIO is 4 times the frequency of the address read signal B. Therefore, for one address, the waveform correction signal B1 is given.
11 j 13t.

will transition through four states from 00'' to ``11''.

Corresponding to the waveforms in Table 1, values as shown in Table 5 below are output from the addition/subtraction circuit 14-3.

In this way, the waveform shown in FIG. 3C is obtained.

As can be seen from the above, main storage devices (I) 10, (n) 1
When the readout frequency of 1 becomes low, the waveform correction signal interpolates within the same address, so the corrected waveform is sampled at the same frequency for all scales, and the step soise frequency caused by sampling is Since the entire band is constant, it can be taken outside the audible frequency range, and step noise frequency removal can be easily performed.

As described above, according to the present invention, it is possible to store data with the number of samplings required to represent the required number of harmonics, and the storage capacity can be reduced with a simple configuration.

Further, by increasing the number of samplings as the fundamental frequency becomes lower, the sampling noise is kept constant over the entire sound range and is outside the audible frequency range, thereby providing a noise removal effect.

[Brief explanation of drawings]

Fig. 1 is a schematic explanatory diagram of an electronic musical instrument to which the present invention is applied;
The figure is an explanatory diagram of an embodiment of the main part of the present invention, and FIG. 3 is an explanatory diagram of the effect of the embodiment of the present invention. In the figure, 1 is a master clock generation circuit, 2 is a sequential pulse generation circuit, and 3 is a note clock. Generation circuit, 4 is a keyboard, 5 is a key code generation circuit, 6 is a key code detection circuit, 7 is a common logic circuit, 8 is an envelope generation circuit, 9 is an octave frequency selection circuit, 10 is a main memory circuit (I), 11 is a main memory circuit (n), 12 is a synchronization detection circuit, 13 is a musical waveform calculation circuit, 14 is a waveform correction circuit, 15 is a multiplication circuit, 16 is an accumulative adder, and 17 is a D-A
18 is a sound system, 141 and 14-2 are multiplication circuits, and 14-3 is an addition/subtraction circuit.

Claims (1)

[Claims] 1. A memory circuit that stores an amplitude value at each sampling point of a musical waveform, a difference value at each sampling point, and a sign bit representing the sign bit representing the sign of the difference value, and reads out the memory circuit at a frequency corresponding to the closed key. means for obtaining a tone waveform correction control signal of an octave higher than the readout frequency of the closed key; first multiplication means for multiplying the amplitude value by a predetermined constant; An electronic musical instrument comprising: a second multiplication means for multiplying by a signal; and an addition/subtraction circuit for performing addition/subtraction by controlling addition/subtraction of the values obtained by the first and second multiplication means using the sign bit. Noise removal device.