JPH0664229A - Optical printing head - Google Patents

Abstract

PURPOSE:To enhance high speed recording properties and reliability by a method wherein a plurality of the light emitting data signals transmitted from a shift register are held for a definite period in one element of a drive circuit constituted of a membrane transistor and electric field light emitting elements are allowed to emit light two or more times. CONSTITUTION:In an optical printing head constituted by a large number of electric field light emitting elements EL1-EL4... are arranged in a line form, one light emitting element, for example, EL1 is driven by a shift register SR, latches L1, L2, AND circuits A1-A3 to the held data in the latches, an OR circuit 01, an exclusive OR circuit EX1 and a voltage applying gate G1 to constitute one element. A low rank bit is held to the latch of an odd number among two latches in each element and the gradation display data of an upper rank bit is held to the latch of an even number and the electric field light emitting elements are allowed to emit light two or more times in the light emitting number of times corresponding to a plurality of held light emitting data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printer head using a light emitting element and, more particularly, to a method for constructing a drive circuit for an optical printer head using an electroluminescent element (hereinafter referred to as an EL light emitting element).

[0002]

2. Description of the Related Art Markets of information processing equipment such as copying machines, facsimiles, computers, etc. are rapidly expanding, and devices used therefor are required to be inexpensive, high quality and highly functional. There is. This tendency is particularly strong in information processing equipment intended for personal use. The optical printer head is a device used for irradiating light on a photoconductor in the above-mentioned copying machine, facsimile, computer, etc., and as a light emitting element of the optical printer head, an EL light emitting element which can be easily miniaturized has attracted attention.

FIG. 6 shows the configuration of a conventional optical printer head using an EL light emitting element. In FIG. 6, in the entire EL light emitting element 61, a plurality of EL light emitting elements are represented by a symbol of capacitance and each has two electrodes. Of the two electrodes of each of the plurality of EL light emitting elements (EL1 to EL16) linearly arranged, one electrode (data side electrode) is grouped into a plurality of adjacent EL data side drivers 62.
Connected to. The other electrode (common side electrode) is EL
It is connected to a common electrode extended over the entire length of the printer head in the main scanning direction, and this is connected to an EL common side driver 63.

FIG. 7 shows an example of a timing chart of applying drive pulses for driving the EL printer head shown in FIG. The light-emitting element is supposed to emit light four times during one line recording period. Positive and negative pulses are sequentially applied to the common side drive lines Ca, Cb, Cc, and Cd from the EL common side driver. Along with this, pulses are also applied from the EL data driver side. Light emission or non-light emission of each EL light emitting element is determined by superposition of both voltages. As shown in FIG. 7, if EL1 to EL4 do not emit light during this 1 line recording time, a pulse in the same phase as the common side is applied to Da. When light is emitted from EL5 to EL8, a pulse having a phase opposite to that of the common side is applied to Db. Regarding EL9 to EL16, it is assumed that EL9, EL11, and EL14 emit light, and examples of Dc and Dd are shown. A positive and negative pulse of about 200V is applied to the common side, and a pulse of about 20V is applied to the data side. As described above, matrix driving is usually used for driving the EL printer head.

However, recently, in such a drive circuit section,
Thin film transistor (T
FT) is being used frequently. The data side drive circuit using the TFT has an advantage that the data input can be speeded up as a result of enabling a direct drive system in which data input is simpler. Further, the printer using the EL light emitting element and the TFT drive circuit has an excellent feature that maintenance is easy and compact, and a polygon mirror in a laser printer is unnecessary.

[0006]

However, when gradation recording is performed by using the direct drive method, the EL light emitting element that obtains gradation expression by controlling the number of times of light emission of the normal EL is 1 line recording time. It requires multiple data entries. For example, if it is attempted to control the number of times of light emission by four levels (excluding non-light emission) with the conventional circuit configuration, the data must be rewritten four times during one line recording time. When data is input a plurality of times during one line recording time, if the number of data inputs is small, the number of times of light emission tends to concentrate on a specific portion during the one line recording period, which causes a problem that the light emission distribution becomes uneven. Further, as a result, there is a problem that the stress on the EL is increased, the life of the EL light emitting element is shortened, and the EL light emission is changed with time.

On the other hand, by frequently rewriting data during 1 line time, it is possible to avoid non-uniformity of the light emission distribution. However, the drive frequency of the data transfer unit (shift register) formed by TFT is generally 10 MHz.
Since it is low, the number of data input terminals for all light emitting devices must be increased. As a result, there are problems that it is not suitable for high-speed recording, data processing before input is complicated, and the printer head configuration is complicated.

The present invention has been made to solve such a problem, and provides a light emission pattern that reduces the number of data transfers during one line recording period and does not increase the stress on the EL light emitting element. An object of the present invention is to provide an optical printer head capable of adjusting recording.

[0009]

An optical printer head of the present invention is an optical printer head having an EL light emitting element and a drive circuit composed of a thin film transistor for driving the EL light emitting element. One element of the circuit is a shift register, a plurality of light emission data storage elements per EL light emitting element capable of holding a plurality of light emission data signals transferred from the shift register for a certain period, and a plurality of light emission. Of a plurality of light emission pulse timing control signals from the pulse timing control line and a plurality of light emission data signals held in a plurality of light emission data storage elements for a certain period of time, and a plurality of logic elements, and then a frame signal. EL elements that perform logical operations and EL light emitting elements based on the logical values of these logical elements A light emitting voltage applying gate for applying a voltage to the data side electrode, and causing the EL light emitting element to emit light a plurality of times at the number of times of light emission according to a plurality of light emission data held in the light emission data storage element for a certain period Is characterized by.

The shift register relating to the optical printer head of the present invention has a function of sequentially transferring the light emission pulse data of each light emitting element controlled by an external circuit to the adjacent drive element.

The light emitting data storage element is a latch,
It has a function of receiving a latch signal from an external circuit, latching the light emission pulse data input from the shift register, holding the light emission pulse data at that time, and sending this to the logic element. In the present invention, since the gradation data is held for each EL light emitting element, the EL light emitting element 1
Requires at least two latches per device.

The light emission pulse timing control line is a control signal line from the outside, and is selectively controlled so that the light emission pulse corresponding to each gradation is dispersed during the recording time of 1 line.

The logic element is composed of AND and OR circuits and an exclusive OR circuit, and the operation of the data held by the latch and the control signal from the outside is AN.
After having been performed by the D and OR circuits, it has a function of performing an operation with the frame signal by an exclusive OR circuit and sending a positive voltage (H) or negative voltage (L) pulse signal to the voltage control gate.

The light-emission voltage applying gate receives an H or L pulse as a result of the calculation, a pulse having a phase opposite to the common side pulse for the H pulse, and a pulse having the same phase as the common side pulse for the L pulse. Is applied to the EL light emitting element.

The EL light-emitting element receives a common-side pulse voltage applied to the common electrode and a data-side pulse voltage applied to the data-side electrode in opposite phase or in phase with respect to the common-side pulse voltage to emit light or emit light. Perform a non-emission operation. By this operation, the number of times of light emission according to a plurality of light emission data held in the light emission data storage element for a certain period of time E
The L light emitting element can emit light a plurality of times.

Needless to say, the present invention can be applied to a recording section of a facsimile, a digital copier or the like.

[0017]

According to the present invention, since the gradation data corresponding to each EL light emitting element can be held for each EL light emitting element, data of light emission and non-light emission can be stored every time when the light emission pulse is applied, or at some gradations. It is not necessary to transfer each time the number of pulses is input. Moreover, since data corresponding to the adjacent EL light emitting elements can be continuously input, the processing of the data before input becomes easy. Further, it is possible to obtain an optical printer head having good recording characteristics in which the light emission pulse can be set so as not to be concentrated on a specific portion during one line recording time.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram of an optical printer head of the present invention. Here, for the sake of simplicity, the description is made with four light emitting elements, but in an actual optical printer head, the number of EL light emitting elements is several thousand. A plurality of EL light emitting elements are arranged in a line (EL1 to EL4), and one light emitting element, for example, EL1 is a shift register SR and a plurality of latches L are provided.
1, L2, AND circuit A for data held in the latch
1, A2, A3, an OR circuit O1, an exclusive OR circuit EX1, and a voltage application gate G1 drive one element. Light emission data of each light emitting element is transferred to the shift register SR and then held by the latch units L1 to L8.

Among the two latches for one light emitting element, the odd-numbered latch holds the low-order bit and the even-numbered latch holds the high-order bit gradation display data. This enables 4-gradation display including non-light emission. Latch L1
By L8, the gradation display data for the next 1 line can be transferred to the shift register SR together with the low-order bit and the high-order bit while driving the EL element parts EL1 to EL4 during the 1 line recording period.

The number of elements in the shift register itself is doubled because of the existence of the gradation data, but the data corresponding to the gradation expression is not retransferred during the 1 line recording period, so that high-speed printing is eventually performed. Can handle. Latches L1 to L8
The data held by is subjected to an exclusive OR operation with the frame signal FR after being operated with external control signals CTL1 and CTL2, whereby the voltage control gate G
Opening and closing of 1 to G4. This exclusive OR circuit E
Because of X1, it is possible to apply a voltage in phase with or opposite to the frame signal FR to the EL light emitting element by the grayscale data held in the latch.

The voltage applied to the common-side electrodes of the EL light-emitting elements EL1 to EL4 is opposite in phase to the voltage applied to the data-side electrodes of the EL elements, and there is a threshold voltage across the EL light-emitting elements. When the value voltage is exceeded, the EL light emitting element emits light.

FIG. 2 is a timing chart of signals during operation of this circuit. Here, the light emission period for 1 line is shown. During this period, light is emitted if a voltage equal to or higher than the light emission threshold voltage is applied to the data side electrode by the positive and negative 6 pulses of the positive and negative pulses on the common side electrode of the EL light emitting element. Therefore, a maximum of 12 flashes can be obtained. This is A2, A5, A if there are binary and 1 data in both of the two latches corresponding to one light emitting element.
The output of the AND circuit of 8 and A11 becomes High level and F
A signal having a phase opposite to the R signal enters the gates of G1 to G4. As a result, the output from the gate is inverted and FR
The voltage of the same phase is applied to the data side electrode of the EL light emitting element. Since FR is applied in a phase opposite to the EL common side electrode, the EL light emitting element emits light at this time. The data held in the two latches are represented by (low-order bit, high-order bit) and what happens to the voltage on the data side electrode of the EL is shown in FIG. This is an example controlled by the signals of CTL1 and CTL2 shown in FIG. As can be seen here, when the (1,1) latched data is emitted 12 times, (0,1) is emitted 8 times,
At (1,0), the light is emitted four times. That is, when the common side pulses are numbered 1 to 12 as shown in FIG. 2, when the latch data is (1, 1),
It emits light in all of 12, and when the latch data is (0,1) eight times of 1,4,5,6,7,8,9,12, when the latch data is (1,0), 1,4,7, It will emit 10 times 4 times.

The control signals CTL1 and CTL2 are selected so that the light emission pulses corresponding to the respective gradations are dispersed during the recording time of 1 line. The light emission pulse pattern is not limited to this pattern as long as it is a pattern dispersed in the recording time of one line.

In the conventional circuit configuration, it is necessary to transfer data 9 times as indicated by the arrow at the bottom of FIG. This is because when the levels of (1,1), (0,1) and (1,0) change to a state different from the inverted state when the FR signal is inverted, it is a latch in the conventional circuit. This is because it is necessary to change the data stored in. In the circuit according to the present invention, only one initial transfer is required, and even when the number of elements in the shift register is doubled, the time required for data transfer is greatly reduced. Also, the larger the number of gray scales, the greater the effect of providing a plurality of latches as in the present proposal.

When a TFT is used in the drive circuit section,
A shift register, a latch, an AND circuit, an OR circuit, an exclusive OR circuit, and the like can be formed with relatively small elements, and the voltage application gate to the EL electrode at the final stage needs to satisfy withstand voltage and current resistance characteristics. Grows larger. Therefore, the increase in the element and the occupied area thereof in the case of forming a plurality of latches may be relatively small.

Another embodiment of the present invention is shown in FIGS. Here, the number of elements in the shift register has not increased compared to the conventional circuit, but two latches for gradation expression Lan
In addition to Lbn and Lbn, it also has Lcn latch (where n = 1
~ 3). First, the upper bit data of the gradation data of each light emitting element is transferred to the shift register and held in Lc1 to Lc3. After that, the lower bit data of the gradation data is transferred in the shift register. Latch-B,
By sequentially applying the Latch-A signal, the data held in Lc1 or the like is transferred to La1 to La3. After that, the data of the lower bits of the gradation data transferred in the shift register is held in Lb1 to Lb3 by sequentially inputting the signals of Latch-C and Latch-B.

This situation is shown in the timing chart of FIG. t _n-1 , t _n , and t _{n + 1} are the n-1th line, respectively.
The printing time is for the nth line and the (n + 1) th line. t _n-1
The print data of the next line is sent during the print time of the line. The upper bit and the lower bit of the gradation data are sequentially set by using 1/2 of the recording time of 1 line. At the beginning of the next printing period, the data of the high-order bits and the low-order bits are held in La1 to L3 and Lb1 to 3, and the data of the above-described embodiment of the present invention is controlled by the control lines of CTL1 and CTL2. The light emission pulse control similar to the example is performed. However, here the number of light emission pulses per line is 14, and the first 12 pulses are controlled by using the print data of that line, and the last 2 pulses.
The pulse uses the upper bits of the print data of the next line.

In the case of a continuous line, the next higher bit is also 1
The line becomes clear by inserting these two pulses. On the other hand, if you want to separate each dot other than that, do not apply these two pulses. 1 lin
e In the latter half of the printing time, the upper bit of the next line is Lc 1
Since it exists in ~ 3, control using this data is possible. This is done by the control line of CTL3. CTL when not controlled on the next line
3 and the AND circuits with the outputs of Lc 1 to 3 are the same as the above-described embodiment. (Even in this case, Lc1 to 3 are necessary as a buffer for the read data.) FIG. 5 shows a typical example of the luminance voltage characteristic of this EL light emitting element. In the figure, Vth is a light emission threshold voltage, and positive and negative pulses of the voltage Va in the figure are applied to the light emitting EL element during driving by the electrodes on the data side and the common side. Light emission does not occur because the pulse of the voltage is applied.

[0029]

According to the optical printer head of the present invention, one element of the drive circuit composed of the thin film transistor is
A plurality of light emission data storage elements per EL light emitting element capable of holding a plurality of light emission data signals transferred from the shift register for a certain period, and a plurality of light emission pulse timings from a plurality of light emission pulse timing control lines Characterized by a plurality of logic elements that perform a logical operation of a control signal and a plurality of light emission data signals held in a plurality of light emission data storage elements for a certain period, and are held in the light emission data storage elements for a certain period of time. Since the EL light emitting element can be made to emit light a plurality of times at the number of times of light emission corresponding to a plurality of light emission data, a plurality of light emission pulses at the time of gradation expression can be used for 1 line recording time without increasing the number of data transfers. It can be distributed and set inside. As a result, high speed recording,
It is possible to obtain an optical printer head using an EL light emitting element of high recording quality, which is advantageous in terms of reliability.

This optical printer head is suitable as a high-speed printing device for output of information processing equipment such as copying machines, facsimiles, computers, etc., which are becoming smaller and more sophisticated.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of an optical printer head of the present invention.

FIG. 2 is a diagram showing a drive timing chart in the first embodiment of the optical printer head of the present invention.

FIG. 3 is a block diagram showing the configuration of another embodiment of the optical printer head of the present invention.

FIG. 4 is a diagram showing a drive timing chart in another embodiment of the optical printer head of the invention.

FIG. 5 is a diagram showing a typical example of the luminance voltage characteristic of the optical printer head of the present invention.

FIG. 6 is a block diagram showing a configuration of a main part of a conventional example of an optical printer head.

FIG. 7 is a diagram showing a drive timing chart in a conventional example of an optical printer head.

[Explanation of symbols]

EL1-EL16 ... EL light-emitting element, SR ... Shift register, L1-L8, La1-La3, Lb1-L
b3, Lc1 to Lc3 ... Latch, A1 to A12.
... AND circuit, O1 to O4 ......... OR circuit, Ex1 to E
x4 ... Exclusive OR circuit, G1 to G4 ..... Voltage application gate, 61 ...
EL data side driver, 63 ... EL common side driver.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication H04N 1/036 A 9070-5C

Claims (1)

[Claims] 1. An optical printer head having an electroluminescent device and a drive circuit composed of a thin film transistor for driving the electroluminescent device, wherein one element of the drive circuit composed of the thin film transistor is a shift register, and A plurality of light emitting data storage elements per one electroluminescent element capable of holding a plurality of light emitting data signals transferred from a shift register for a certain period of time, a plurality of light emitting pulse timing control lines, and a plurality of the light emitting elements. A plurality of logic elements for performing a logical operation of a plurality of light emission pulse timing control signals from the pulse timing control line and a plurality of light emission data signals held in the plurality of light emission data storage elements for a certain period, and then a frame signal A logic element that performs a logical operation of, and based on the logic value of the logic element, The light emitting voltage applying gate for applying a voltage to the data side electrode of the electroluminescent element, and the electroluminescent element at the number of times of light emission according to a plurality of light emission data held in the light emitting data storage element for a certain period. An optical printer head, characterized in that it emits light a plurality of times.