JPH06318590A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent excessive grinding and discontinuity when the surface of a metal film buried in a wide trench is polished by a chemical and mechanical polishing method, and a buried wiring is formed. CONSTITUTION:When a trench 5 for forming a wiring or an aperture part 4 for forming a bonding pad are formed by patterning a BPSG film, pillar type insulating films 6 which are left and arranged inside the trench 5 and the aperture part 4 by patterning are formed. Thereby excessive grinding of an AlSiCu film 7 buried in the trench 5 and an aperture part 4 by a chemical and mechanical polishing is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having embedded wiring.

[0002]

2. Description of the Related Art As one of the manufacturing methods of semiconductor devices, a surface planarization technology by a chemical mechanical polishing method is a semiconductor.
Technology Symposium Proceedings (Se
microtechnology Technology Sy
mposium Proceeding) 1991,
P. 296 or proceeding buoy L.S.
I Multi-level Interconnect Conference (Proceeding VLSI Multile)
vel Interconnect Conferen
ce) 1991, page 57.

FIGS. 4A to 4D are a plan view and a sectional view taken along the line BB 'of a semiconductor chip, which are shown in the order of steps for explaining a conventional method for manufacturing a semiconductor device.

First, as shown in FIGS. 4 (a) and 4 (b),
BPSG is formed on the insulating film 2 formed on the semiconductor substrate 1.
(Boro-Phospho-Silicate Gl
An ass) film 3 is formed to a thickness of 0.7 μm and patterned to form an opening 4 for forming a bonding pad and a groove 5 for forming a wiring.

Next, as shown in FIG. 4 (c), the opening 4
An Al film (hereinafter referred to as an AlSiCu film) 7 containing Si and Cu is deposited on the surface including the groove 5 and the groove 5 to a thickness of 1 μm by the high temperature sputtering method to fill the opening 4 and the groove 5.

Next, as shown in FIG. 4D, AlSi
The upper portions of the Cu film 7 and the BPSG film 3 are polished by the chemical mechanical polishing method until the thickness of the BPSG film 3 becomes about 0.5 μm, and then the silicon nitride film 8 is deposited on the entire surface by the plasma CVD method to 1.5 μm. Deposited to a thickness of and patterned
The bonding pad portion 9 and the embedded wiring 10 are formed.

[0007]

In this conventional method of manufacturing a semiconductor device, a metal film filled in a wide area such as a wide wiring or a bonding pad portion has a groove or an opening formed by chemical mechanical polishing. There was a problem that wiring was broken or the bonding between the bonding pad and the bonding wire was incomplete due to excessive grinding in the central part of the product, and the film disappeared, or in the worst case, bonding was not possible. .

[0008]

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming a second insulating film on a first insulating film provided on a semiconductor substrate, and the second insulating film. Selectively etching the second insulating film to form a columnar or slit-shaped patterned second insulating film inside and forming a grid-like wiring forming groove left therein, and a metal film on the surface including the groove. Is deposited to fill the inside of the groove, and the upper surfaces of the metal film and the second insulating film are polished by a chemical mechanical polishing method to fill the metal film in the groove to flatten and fill the upper surface. And a step of forming wiring.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

1 (a)-(d) and FIG. 2 (a),
FIG. 3B is a plan view and a cross-sectional view taken along the line AA ′ of the semiconductor chip shown in the order of steps for explaining the first embodiment of the present invention.

First, as shown in FIGS. 1 (a) and 1 (b),
Bonding pad in which a BPSG film 3 having a thickness of 0.7 μm is formed and patterned on an insulating film 2 formed on a semiconductor substrate 1 and columnar (or slit-shaped) insulating films 6 are arranged and left inside. The opening 4 for forming and the groove 5 for forming the wiring are formed respectively.

Next, as shown in FIG. 1C, the opening 4
The AlSiCu film 7 is deposited on the surface including the groove 5 and the high temperature sputtering method or the sputter reflow method to fill the opening 4 and the groove 5.

Next, as shown in FIG. 1D, the upper surfaces of the AlSiCu film 7 and the BPSG film 3 are polished by the chemical mechanical polishing method so that the BPSG film 3 has a thickness of about 0.5 μm. Polished into AlSiC in the openings 4 and the grooves 5.
The u film 7 is embedded to flatten the surface.

Next, as shown in FIG. 2A, a silicon nitride film 8 is deposited to a thickness of 1.5 μm as a protective film on the entire surface by plasma CVD.

Next, as shown in FIG. 2B, the silicon nitride film 8 is selectively etched to form a bonding pad portion 9 and a buried wiring 10.

As described above, the columnar (or slit-shaped) is previously formed in the pad forming opening or the wiring forming groove having a large opening area.
By providing an insulating film and subdividing the openings, excessive grinding due to chemical mechanical polishing can be prevented.

FIG. 3 is a sectional view of a semiconductor chip for explaining the second embodiment of the present invention.

As shown in FIG. 3, after the silicon nitride film 8 is opened to form the bonding pad portion 9, the surface of the BPSG film 3 is further adjusted to 0.05 by buffered hydrofluoric acid.
By etching the AlSiCu film 7 by about μm so that the upper end of the AlSiCu film 7 is projected, the bonding area between the bonding pad portion and the bonding line can be increased, and the bonding strength of the bonding line is improved.

[0019]

As described above, according to the present invention, a columnar insulating film is arranged in a groove formed for forming at least a wide buried wiring, and the groove pattern is subdivided.
By suppressing excessive grinding when flattening the upper surface of the wiring metal film filled in the groove by chemical mechanical polishing, it is possible to prevent disconnection of the wiring and defective bonding between the bonding pad and the bonding line,
It has the effect of improving reliability.

[Brief description of drawings]

1A and 1B are a plan view and a sectional view taken along the line AA ′ of a semiconductor chip, which are shown in the order of steps for explaining a first embodiment of the present invention.

2A and 2B are a plan view and a cross-sectional view taken along the line AA 'of the semiconductor chip, which are shown in the order of steps for explaining the first embodiment of the present invention.

3A and 3B are a plan view and a cross-sectional view taken along the line BB ′ of a semiconductor chip, which are shown in the order of steps for explaining a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Insulating Film 3 BPSG Film 4 Opening 5 Groove 6 Columnar Insulating Film 7 AlSiCu Film 8 Silicon Nitride Film 9 Bonding Pad 10 Embedded Wiring

Claims (2)

[Claims] 1. A step of forming a second insulating film on a first insulating film provided on a semiconductor substrate; and a step of selectively etching the second insulating film to form a columnar shape or a slit shape inside. A step of forming a grid-shaped wiring forming groove in which the patterned second insulating film is arranged and left; a step of depositing a metal film on a surface including the groove to fill the inside of the groove; A step of polishing the upper surfaces of the metal film and the second insulating film by a chemical mechanical polishing method to bury the metal film in the groove to flatten the upper surfaces to form a buried wiring. Device manufacturing method. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the metal film is deposited by a high temperature sputtering method or a sputter reflow method.