JPH06140479A - Device for testing semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To always perform tests under a constant probe pressure even when the kind of a prove card or type of a stage is different or a wafer has a thickness error at the time of testing the electric characteristics of a semiconductor integrated circuit while the circuit is kept in the state of wafer. CONSTITUTION:A probe pressure sensor 7 which measures the pressure applied to a probe 4 is installed to a probe card 6 and a comparator 12 monitors the probe pressure value measured with the sensor 7 and compares the value with a prescribed value. In accordance with the compared results of the comparator 12, the moving distance of a wafer stage 5 in the vertical direction is adjusted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit test device used for testing a semiconductor integrated circuit in a wafer state.

[0002]

2. Description of the Related Art FIG. 4 is a side view of an apparatus for explaining a test method using a test apparatus called a wafer prober apparatus for testing a conventional semiconductor integrated circuit in a wafer state. The wafer under test 1 can be fixed at a predetermined position above it.
Further, the stage 5 is configured so that it can be driven up and down by a driving device (not shown). Reference numeral 2 denotes a probe head, which stores, for example, a test pattern of the wafer under test 1 and information of different types of wafers under test, and can output a necessary test signal or the like. Further, below the probe head 2, a member called a probe card 3 having a probe needle 4 matching the shape of a wafer under test to be tested is detachably attached.

Next, a method of testing a semiconductor integrated circuit in a wafer state by using the test apparatus configured as described above will be described with reference to FIG. First, the wafer is carried below the probe card 3 by a carrying mechanism (not shown), and the wafer under test 1 is adsorbed and fixed to a predetermined position on the stage 5.

Next, as shown in FIG. 5, an operator moves a stage 5 up and down while visually checking the positional relationship between the tip of the probe needle 4 and the electrode 1b by a driving device (not shown), and the probe positioned above the stage 5 is moved. The probe needle 4 of the card 3 and the electrode 1b of the chip 1a formed on the wafer 1
Contact with.

Next, in this state, the test signal output from the probe head 2 is applied to the electrode 1b of the chip 1a via the probe needle 4. A signal generated in the wafer under test 1 that receives this test signal is sent to the probe head 2 via a probe needle different from the probe needle that outputs the test signal, and the electrical characteristics of the semiconductor chip 1a are measured. Then, it is judged whether it is good or bad.

[0006]

The conventional semiconductor integrated circuit test apparatus is constructed as described above, and the height difference of the needle of each probe card used for the test and the machine difference of the stage for fixing the wafer (machine). Difference), the difference in the stylus pressure at the time of testing due to the thickness error of the wafer under test causes contact failure, etc.
It is impossible to carry out a test under accurate test conditions, and as a result, the reliability of the test result obtained is low, and there is a problem in that the product can be judged as good or bad.

The present invention has been made to solve the above-mentioned problems, and the stylus pressure can be made constant during a test in a wafer state of a semiconductor integrated circuit, and a test can be performed while maintaining accurate test conditions. An object is to obtain a semiconductor integrated circuit test device.

[0008]

A semiconductor integrated circuit tester according to the present invention has a probe card equipped with a stylus pressure sensor using a piezoelectric conversion element, and monitors stylus pressure during a test to detect a probe needle and a wafer. The contact state of is controlled.

[0009]

According to the present invention, the stress applied to the probe needle due to the contact between the wafer under test and the probe needle during the test is detected, and the contact state between the wafer and the probe needle is adjusted in conjunction with this to constantly adjust the wafer. The stylus pressure applied to can be made constant.

[0010]

EXAMPLES Example 1. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a conceptual configuration diagram of a semiconductor integrated circuit test device according to an embodiment of the present invention. The same reference numerals as those in FIG. The card 6 is provided with a stylus pressure sensor 7 for directly detecting the pressure applied to the probe needle 4, and the detection signal 7a is detected by the comparator 1
2 is input. The comparator 12 (needle pressure determination / control means) receives the detection signal 7a, compares the signal 7a with the reference value at that time, and controls the wafer stage 5 up and down according to the comparison result. The drive signal 12a is output.

The detailed structure of the probe card 6 will be described with reference to FIG. 2. Reference numeral 70 denotes a pressure sensitive diode for realizing the needle pressure sensor 7, which is mounted so as to support the probe needle 4 from above. ing. Further, reference numeral 120 denotes an arithmetic unit for realizing the comparator 12, which stores optimum stylus pressure value range information according to the shape and test pattern of the wafer under test to be tested. A small size is used for the probe head 2, and the probe card 6 and the probe head 2 are detachably provided.

Next, the measuring method will be described with reference to the flowchart of FIG. First, in step S30, the wafer 1 is conveyed below the probe head 2 and is adsorbed and fixed at a predetermined position on the wafer stage 5 to start the test.

Next, in step S31, the wafer 1
The stage 5 which is adsorbing is raised by α μm.

Next, in step S32, the current value Ix output from the pressure sensitive diode 70 is input to the calculator 120 as the detection signal 7a, where the current value Ix is within a predetermined range (IA≤Ix≤IB). It is determined whether or not
If it is not within the predetermined range, the process proceeds to step S33.

In step S33, the obtained detection signal 7
Whether a is larger than the maximum value in the predetermined range (Ix> IB
) Is determined, and it is considered that the stylus pressure is too high when Ix> IB, the process proceeds to step S34, the wafer stage 5 is lowered by βμm, and the stage 5 is lowered by βμm until YES is determined in step S32. . On the other hand, if No is determined in step S33, it is considered that the stylus pressure is too low, so the process returns to step S31 to raise the stage 5 by αμm, and the stage 5 is raised by αμm until it is determined Yes in step S32. .

When the stylus pressure is within the predetermined range and it is determined Yes in step S32, the process proceeds to step S35, in which a predetermined test signal is applied from the probe head 2 to the electrode of the semiconductor chip via the probe needle 4. Based on the obtained signal, it is judged whether the chip is good or bad.

When the measurement of the electrical characteristics of one chip is completed as described above, the process proceeds to step S36 and the stage 5
Is lowered by γ μm to separate the electrode of the chip from the probe needle, the stage 5 is moved to the next chip position in step S37, and if it is determined in step S38 that the wafer end is not reached, the process returns to step S30 to perform the above process. When the wafer end is determined in step S38, the process ends (step S39).

As described above, according to this embodiment, the stress applied to the probe needle 4 is directly detected by using the pressure sensitive diode 70, and the wafer stage 5 is driven up and down according to the detection result. It is possible to always carry out the test with the optimum needle pressure regardless of the height difference of the needle of each probe card used for
Further, the test can be performed with the same stylus pressure between the chips regardless of the thickness error of the wafer, and the reliability of the obtained measurement result becomes high.

Although the pressure sensitive diode 70 is used as the stylus pressure sensor in the above embodiment, another piezoelectric conversion element such as a pressure sensitive transistor may be used.

In the above embodiment, the stage 5 is driven up and down to adjust the distance between the probe needle 4 and the wafer, but the stage 5 may be fixed and the probe head 2 may be driven up and down. Good.

[0021]

As described above, according to the semiconductor integrated circuit test apparatus of the present invention, when measuring the semiconductor integrated circuit in the wafer state, the needle pressure of the probe needle is monitored and the needle pressure is kept constant. Since the contact state between the probe needle and the wafer is adjusted so as to keep it, it is possible to always test under accurate test conditions, the reliability of the obtained measurement result is improved, and the accuracy of the quality judgment of the product is improved. There is an effect.

[Brief description of drawings]

FIG. 1 is a conceptual configuration diagram of a semiconductor integrated circuit test device according to an embodiment of the present invention.

FIG. 2 is a detailed configuration diagram of a probe card of the semiconductor integrated circuit test device.

FIG. 3 is a flowchart diagram for explaining a wafer test method by the semiconductor integrated circuit test apparatus.

FIG. 4 is a side view of a conventional semiconductor integrated circuit test device.

FIG. 5 is a view of a probe card seen from above during a wafer test by a conventional semiconductor integrated circuit test apparatus.

[Explanation of symbols]

 1 wafer to be tested 2 probe head 4 probe needle 5 wafer stage 6 probe card 7 stylus pressure sensor 7a detection signal 70 pressure sensitive diode 12 comparator 12a drive signal 120 calculator

Claims (1)

[Claims] 1. A semiconductor integrated circuit tester for applying a test signal to electrodes of a semiconductor chip in a wafer state to measure the electrical characteristics of each chip. A probe card having a plurality of probe needles, a probe head that detachably mounts the probe card and supplies a test signal to the probe needle, and a piezoelectric conversion element that converts stress applied to the probe needle into an electric signal. A stylus pressure determination / control means for determining whether the output of the piezoelectric conversion element is within a set range and controlling the contact state between the probe needle and the wafer according to the determination result. Characteristic semiconductor integrated circuit test equipment.