JPH04181779A - Thin film transistor - Google Patents

Abstract

PURPOSE:To obtain characteristics having a large ON to OFF ratio and a large ON current to OFF current ratio by providing the second gate electrode having a large width compared to the first gate electrode in source region and drain region directions. CONSTITUTION:On a substrate 101 such as silicon substrate, sequentially formed are a metal such as Cr, a first gate electrode 102 comprising a transparent electrode such as ITO, a first gate insulation film 103 made of an insulation film such as SiO2 and a semiconductor layer 104 comprising a silicon thin film such as polycrystal silicon. Also, a second gate insulation film 107 made of an insulation film such as SiO2, a metal such as Cr, a transparent electrode such as ITO and a second gate electrode 108 comprising a silicon thin film containing impurities are sequentially formed. Impurity ions such P and B are driven into the semiconductor layer 104 with a predetermined energy, and a source zone 106 and drain zone 105 are formed. The second gate electrode 108 is provided to cover the first gate electrode 102. By doing this, the characteristics of a large ON to OFF ratio and a large ON current to OFF current ratio can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor applied to active matrix liquid crystal displays, image sensors, three-dimensional integrated circuits, and the like.

[Conventional technology]

Conventional thin film transistors are, for example, JAPAND 5P.
The structure was as shown in iAY'86, 1986, P196-P199. This structure is generalized and its outline is shown in FIG. The figure (α) is a top view, and the figure (b) is a cross-sectional view at AA'. A source region 202 and a drain region 205 are formed on an insulating substrate 201 made of glass, quartz, sapphire, etc., which are made of a polycrystalline silicon thin film doped with impurities to serve as donors or acceptors. A source electrode 204 and a drain electrode 205 are provided in contact with this, and a channel region 206 made of a polycrystalline silicon thin film is formed so as to contact and connect above the source region 202 and drain region 2CI5. A gate insulating film 207 is provided to cover these.

[Problem to be solved by the invention]

However, the above-mentioned conventional technology has the following problems.

Figure 5 shows a channel length 1 with the structure explained in Figure 2.
It is a graph showing an example of the characteristics of a thin film transistor with a channel width of 0 μm and a channel width of 10 μm, where the horizontal axis is the gate voltage Vge,
The vertical axis is the logarithm of the drain current d. Here, when the transistor is in the off state (gate voltage is negative), the current flowing between the source and drain is OFF, and when the transistor is in the on state (gate voltage is 1ov or more), the current flows between the source and drain.
The current flowing between the drains is called on current. It is desirable that the on-current is large and the off-current is small, or in other words, the on/off ratio (on/off) is large. However, in general, when the on-state current increases, the off-state current also tends to increase, and this becomes a problem especially when realizing a liquid crystal display with a built-in driver. That is, transistors used in the pixel portion of a liquid crystal display are required to have particularly low off-current characteristics, whereas transistors used in peripheral circuits are required to have large on-current characteristics in order to operate at high speed.

The present invention is intended to solve these problems, and its purpose is to provide a thin film transistor having a large on/off ratio (on/off).

[Means to solve the problem]

The thin film transistor of the present invention includes a first gate electrode on a predetermined substrate, a T-th gate insulating film provided to cover the first gate electrode, and a T-th gate insulating film provided in contact with the first gate insulating film. a second gate insulating film provided to cover the semiconductor layer; a second gate electrode provided in contact with the second gate insulating film and covering the first gate electrode; The second gate electrode is characterized in that a source region and a drain region formed in a self-aligned manner are sequentially stacked using a mask.

〔Example〕

The present invention will be described in detail below based on Examples. 1st
The figure shows an example of a thin film transistor according to the present invention.

A first gate electrode 102 made of a metal such as Or, Ti, or a transparent electrode such as To is formed on a substrate 101 such as a glass, ceramic, or silicon substrate. The film thickness is 5QO~
5[]DDX is desirable. The material is not limited to the above materials, and any conductive material may be used. Next 5i
n2, SiN.

A first gate insulating film 10 made of an insulating film such as Ta2O, etc.
form 5. The film thickness is preferably 500 to 5000X. On the other hand, the first gate electrode 102 is made of a silicon thin film doped with impurities, and the first gate electrode 102 is formed using a thermal oxidation method.
The first gate insulating film 103 may be formed by oxidizing the surface of 02. Next, a semiconductor layer 104 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is formed. The film thickness is preferably 500 to 200X. Next 5102
, SiN, Ta2O, or the like is formed. The film thickness is 500~5o
ooX is desirable. The second gate insulating film 107
Similarly to the gate insulating film 105, the semiconductor layer 104 may be formed by oxidizing the surface using a thermal oxidation method. Then Or,
A second gate electrode 108 is formed of a metal such as Ti, a transparent electrode such as TO, and a silicon thin film doped with impurities. Finally, impurity ions such as P and B are implanted into the semiconductor layer 104 at a predetermined energy by an ion implantation method, an ion doping method, etc., and the source region 106. A drain region 105 is formed, and impurities are activated by heat treatment and laser beam irradiation. Second gate electrode 108
is conductive and the source region 106. Conditions such as the material used as a mask for ion implantation when forming the drain region 105 and the film thickness 5 are required. FIG. 4 shows a circuit of thin film transistors formed in this manner.

401 is the second gate electrode 108. 402 is the source electrode, 403 is the drain electrode, and 404 is the first gate electrode 1.
It is 02. Here, a thin film transistor consisting of 41:M*402.405 is TF'T1.404,402,4
A thin film transistor made of 05 is referred to as TFT2. Fifth
The gate electrodes of TFT1 and TFT2 are connected like the circuit shown in the figure. First gate insulating film 105 shown in FIG.
When the second gate insulating film 107 is made of the same material and is thicker than the first gate insulating film 105, the characteristics shown by the solid line in FIG. 6 are obtained.

The horizontal axis is the gate voltage 76 days (v), and the vertical axis is the logarithm of the drain current d, the source and drain voltages are 4 (v), the channel width is 10 μm, the channel length of TFT1 is 10 μm, and the channel length of TFT2 is 8 μm. Compared to the conventional characteristics shown in FIG. 3, the drain current does not increase in the negative region of the gate voltage V g s, and the drain current value of the gate voltage o(v)' in the conventional thin film transistor is maintained as it is. In other words, the off-characteristics of the thin film transistor can be significantly improved. This is because the voltage between the gate electrode and the drain region of the reed 2 becomes effectively small when the thin film transistor is off. On the other hand, when the gate voltage Vg is in the positive region, there is almost no difference from the conventional method. This is because in thin film transistors, the semiconductor layer in the channel part is as thin as 500 to 2000 nm, so the range in which the depletion layer extends is limited, and an inversion layer is likely to form. The decrease in current can be suppressed. Fig. 7 shows the relationship between the offset amount ΔL and the logarithmic value of the on-current value on. The horizontal axis represents the offset amount ΔL1, and the vertical axis represents the on-current value on.

As is clear from this figure, when the offset amount ΔL exceeds 3 μm, the on-current decreases rapidly. Here, TFTl
and T F T 2 (1'J' We have explained the case where the gate insulating film is made of the same material but has different film thickness, but the electric field strength E1 applied to the gate insulating film of TF'TI and the electric field applied to the gate insulating film of TFT2 is The electric field strength E2 to be
A similar effect can be obtained. That is, even if the first gate insulating film 105 and the second gate insulating film 107 are made of different materials (
1) The film thickness may be set so as to satisfy the formula.

In the circuit shown in FIG. 4, the voltage 11 applied to the gate electrode 401 of the TFT,
Even if you change the voltage v2 applied to 02 and set Vl and V2 to satisfy the +11 formula, the same effect as above can be obtained.On the other hand, when setting V1.'V2, El > E 2... If the settings are made to satisfy (2), the characteristics shown by the dotted line in Figure 6 will be obtained.The off-state current is about the same as that of conventional thin film transistors, but the on-state current is larger than that of conventional thin film transistors.In other words, v' l, v2
The characteristics of the thin film transistor can be controlled by setting the TPTI as shown in the circuit shown in Figure 8.
The gate electrode of TPT2 801 and the gate electrode of TPT2 802 are connected. The electric field strength of TF'T1 and TFT2 is +1
), and the characteristics shown by the solid line in FIG. 6 are obtained.

When the liquid crystal layer 8053 is driven using this thin film transistor, the first gate electrode 1°2 of TFT2 is shielded by the second gate electrode 107 of TFT2,
It can prevent gate signals from being applied to the liquid crystal layer,
Can improve reliability. In addition, the off-state current can also be reduced.
The retention characteristics of the charges accumulated in the Err* disturbing crystal layer are also improved, and the display quality of the liquid crystal display device can be greatly improved.

Although I have explained the N-type thin film transistor above, Pff
A thin film transistor can also be constructed in exactly the same way.

〔Effect of the invention〕

The present invention has the following excellent effects.

First, the off-state current can be dramatically reduced without reducing the on-state current, and when applied to a liquid crystal display device, the retention characteristics can be improved and the contrast ratio can be greatly improved.

Second, it becomes possible to shield the gate electrode,
Gate signals can be prevented from being applied to the liquid crystal layer, improving the reliability of the liquid crystal display device.

Sixth, by adjusting the signals applied to the respective gate electrodes of TFTI and TF'T2, the on-current can be increased and a high-speed logic circuit using thin film transistors can be realized.

As described above, the thin film transistor of the present invention has many excellent effects, and its application range is wide-ranging, including active matrix substrates of liquid crystal display devices, peripheral circuits thereof, image sensors, and three-dimensional integrated circuits.

[Brief explanation of the drawing]

FIG. 1 shows a cross-sectional view of an N-film transistor of the present invention. FIGS. 2(a) and 2(b) show the structure of a conventional thin film transistor, where (a) is a top view and (b) is a cross-sectional view. FIG. 3 is a characteristic diagram of a conventional thin film transistor, and FIG. 6 is a diagram showing characteristics of a thin film transistor of the present invention. FIGS. 4, 5, and 8 are diagrams showing equivalent circuits of the thin film transistor of the present invention. FIG. 7 is a diagram showing the relationship between the offset amount ΔL and the on-electrode size Qn. 104.201...Substrate 102...First gate electrode 103
...First gate insulating film 104.2 [)
6...Semiconductor layer 105.2m5...Drain region 106.202...Source region 10
7...Second gate insulating film 108
...Second gate insulating film 109
...Offsect amount ΔL207 ...
...Gate insulating film 208, 401, 404...
・Gate electrode 204.402...Source electrode 2
05.405...Drain electrode 405.50i
, soi・-・・-'rF'r1406.502,8
02... TFT2 or above H person Seiko Epson Co., Ltd. U Agent Patent attorney Kizobe Suzuki (other T names) (a) (b) Figure 5 Vgs (V) Figure 6

Claims (5)

[Claims] (1) A first gate electrode, a first gate insulating film provided to cover the first gate electrode, and a contact with the first gate insulating film on a substrate such as a glass, ceramic, or silicon substrate. a second gate insulating film provided to cover the semiconductor layer; a second gate insulating film in contact with the second gate insulating film; A second gate electrode provided with an increased width, and a source region and a drain region provided by adding impurities to the semiconductor layer in a self-aligned manner are sequentially stacked using the second gate electrode as a mask. A thin film transistor characterized by: (2) The thin film transistor according to claim 1, wherein the second gate insulating film is thicker than the first gate insulating film. (3) The thin film transistor according to claim 1 or 2, wherein the first gate electrode and the second gate electrode are connected and a predetermined electric signal is applied. (4) The thin film transistor according to claim 1 or 2, wherein predetermined electric signals are applied to the first gate electrode and the second gate electrode, respectively. (5) The thin film transistor according to claim 1 or 2, wherein the second gate electrode is fixed at a predetermined potential and a predetermined electric signal is applied to the first gate electrode.