JPH03291973A - Thin-film semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high integration and to realize a large-current driving operation at high speed by a method wherein an opening part is formed in a laminated-layer part composed of an insulating layer and of a source-drain electrode, a semiconductor layer constituting an active layer is formed uniformly on the inner-wall face of the opening part and a gate insulating layer and a gate electrode are formed on the semiconductor layer. CONSTITUTION:A tantalum film S' for source electrode use is formed on a glass substrate 1; an opening 20 is formed. A film 2' for ohmic-contact formation layer use, a film 3' for insulating layer use and a film 4' for ohmic-contact formation layer use are formed continuously on the surface. A film D' for drain electrode use is formed. Then, a wet etching treatment is executed; an opening 30 having a grade toward the inside in the side direction of the substrate is formed. A film 6' for semiconductor layer use and a film 7' for gate insulating layer use are formed continuously on the face. Then, a film G' for gate electrode use is formed. The film G' for gate electrode use is etched; a gate electrode G is formed; a dry etching treatment is executed; a gate insulating layer 7 and a semiconductor layer 6 are formed.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a thin film semiconductor device used for driving, for example, a contact image sensor, an electroluminescent display, a liquid crystal display, etc. The present invention relates to an improvement in a thin film semiconductor device that can be integrated and driven at high speed and with a large current.

C. Prior Art] As shown in FIG. 7, this type of thin film semiconductor device includes a glass substrate (a), a gate electrode (G) formed on the glass substrate (a), and a gate electrode (G) formed on the glass substrate (a). A gate insulating film (b) covering (G) and this gate insulating film (b)
A semiconductor layer (c) provided above and constituting an active layer, and a protective insulating film provided on the semiconductor layer (C) at a portion corresponding to the gate electrode (G) to protect the semiconductor layer (c). (d), ohmic contact formation layers (e) (e) provided at both ends of the semiconductor layer (C), and the semiconductor layer (C) via the ohmic contact formation layers (e) (e). 2. Description of the Related Art A MOS-type thin film semiconductor device whose main part is composed of connected source and drain electrodes (S) and (D) is widely known.

In this thin film semiconductor device, the source and
Drain voltage (VD) between drain electrodes (S) and (D)
is applied to the gate electrode (G), and the gate voltage (Vc
), a channel is formed in the semiconductor layer (C), which is the active layer, and it becomes ON state, and the drain current (I
, ) flows, but as the gate voltage (V6) is lowered, the channel is no longer in shape and becomes OFF, and the drain current (I, ) no longer flows.
This is used for driving a contact type image sensor as shown in FIG. 11.

[Problem to be solved by the invention]

By the way, in this type of thin film semiconductor device, a drain current (I,) is generated in the semiconductor layer (C) in which a channel is formed.
When flowing, the lower the resistance of the semiconductor layer (C), that is, the shorter the channel length (L) formed in the semiconductor layer (C) as shown in FIG. ) was obtained, the larger the drain current (I, ) was obtained.

However, even if the above channel length (L) is set small, the limit is about 8 to 10 μm at the conventional level, so if a large drain current (ro) is desired, the channel width (W) is set large. I had no choice but to do it.

For this reason, the dimension of the thin film semiconductor device in the direction perpendicular to the source/drain direction, that is, the width dimension becomes large, which poses a problem that becomes a major hindrance in achieving high integration.

Furthermore, when this thin film semiconductor device is applied to the above-mentioned contact type image sensor, etc., the gate electrode (G) and the wiring section (f ) is blocked by the semiconductor layer (C) and the protective insulating film (d) and cannot be formed on the thin film semiconductor device (h), so the connection region (g) between each thin film semiconductor device (h) is Therefore, there was a problem that it became impossible to achieve high integration in the arrangement direction of the photosensors (i) attached to these thin film semiconductor devices (h), that is, in the α direction. .

Furthermore, if the channel length (L) is long and the structure has a low degree of integration, there is a problem in that the high-speed response becomes poor and high-speed driving is also hindered.

[Means to solve the problem]

The present invention has been made in view of the above-mentioned problems, and its object is to provide a thin film semiconductor device that is highly integrated and capable of high-speed, large-current drive. .

That is, the present invention provides a MOS in which an active layer is a semiconductor layer provided on an insulating substrate.
A type of thin film semiconductor device is assumed, with an insulating substrate, source/drain electrodes stacked on top of this substrate with an insulating layer interposed between them, and the insulating layer and source/drain electrodes. an opening that is formed in the laminated portion and has an inner wall surface of the opening that slopes inward in the substrate side direction; a semiconductor layer that is uniformly laminated on the inner wall surface of this opening and constitutes the active layer; The device is characterized by comprising: a gate insulating layer uniformly laminated on the semiconductor layer; and a gate electrode uniformly laminated on the gate insulating layer.

In such technical means, glass, quartz, ceramics, etc. can be used as the material constituting the insulating substrate, and the source/drain material that is laminated on the insulating substrate and constitutes a laminated part with the insulating layer The electrode and the gate electrode laminated on the inner wall surface of the opening provided in the laminated portion are made of conductive materials such as copper, chromium, titanium, tantalum, tungsten, molybdenum, nickel, nickel-chromium alloy, titanium-tungsten alloy, titanium nitride, etc. Compatible with flexible materials.

Further, as the semiconductor layer that is uniformly stacked on the inner wall surface of the opening and constitutes the active layer, amorphous silicon, polysilicon, etc. can be used, and the insulating layer interposed between the source and drain electrodes, Silicon nitride (S) is used as the gate insulating layer interposed between the semiconductor layer and the gate electrode.
tN, ), silicon oxide (Sin, ), etc. are applicable.

Furthermore, in order to make ohmic contact between the source/drain electrodes and the semiconductor layer, an ohmic contact forming layer may be interposed between the insulating layer and the source/drain electrodes, and the laminated material may be gallium, boron, indium, etc. Amorphous silicon mixed with trivalent atoms or pentavalent atoms such as phosphorus, antimony, and arsenic can be used.

Next, when manufacturing this thin film semiconductor device, there is a means for depositing an insulating layer and source/drain electrodes on the insulating substrate, and a means for depositing a semiconductor layer, gate insulating layer, gate electrode, etc. on the inner wall surface of the opening. As the film means, sputtering method, chemical vapor deposition (CVD) method, vacuum evaporation method, etc. can be applied, and the film thickness of each layer can be adjusted by appropriately setting the film deposition conditions.

Additionally, reactive ion etching (
Etching means such as dry etching methods such as RIE), sputter etching, and wet etching methods can be applied. In this case, by selecting the constituent materials of the insulating layer, source/drain electrodes, etc., adjusting the etching rate of each constituent material with respect to the etching material, and setting the etching conditions appropriately, the inner wall surface of the opening can be etched on the substrate side. It becomes possible to form a gradient heading inward.

[Effect]

According to the above-mentioned technical means, an insulating substrate, source/drain electrodes stacked on this substrate with an insulating layer interposed between them, and the insulating layer and source/drain electrodes are provided. an opening formed in a laminated portion comprising: an opening having an inner wall surface of the opening having a slope inward in the substrate side direction; a semiconductor layer uniformly stacked on the inner wall surface of the opening and constituting the active layer; , a gate insulating layer uniformly laminated on this semiconductor layer, and a gate electrode uniformly laminated on this gate insulating layer, and the length of the channel formed in the semiconductor layer is sauce·
Since it is defined by the thickness of the insulating layer interposed between the drain electrodes, it is possible to set the channel length sufficiently small.On the other hand, the channel width W formed in the semiconductor layer is determined by the thickness of the insulating layer interposed between the drain electrodes. Since it is defined by the entire circumference of the semiconductor layer laminated on the inner wall surface, it is possible to set the channel width W sufficiently large without taking up exclusive space. Since the gate electrode is provided on the semiconductor device, a connection region between the gate electrode and the wiring portion can be formed on the semiconductor device.

〔Example〕

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.A thin film semiconductor device according to this embodiment includes a glass substrate (1) and a glass substrate (1) as shown in FIGS. 1) A source electrode (S) made of tantalum that is laminated on top and has a rectangular opening in its center, and a tantalum source electrode (S) that is laminated on top of this source electrode (S) and has a rectangular opening in its center that is slightly larger than the opening of the source electrode (S). An ohmic contact forming layer (2) made of n+-amorphous silicon provided with an opening, and an opening slightly larger than the opening of the ohmic contact forming layer (2) laminated on the ohmic contact forming layer (2) in the center thereof. an ohmic contact formation layer made of n+-amorphous silicon that is laminated on this insulating layer (3) and has an opening slightly larger than the opening of the insulating layer (3) in the center. (4), a chromium drain electrode (D) laminated on this ohmic contact forming layer (4) and having an opening slightly larger than the opening of the ohmic contact forming layer (4) in the center, and Laminated on the inner wall surface of the opening of the laminated portion (5) consisting of the electrode (S), the ohmic contact formation layer (2), the insulating layer (3), the ohmic contact formation layer (4), and the drain electrode (D). A semiconductor layer (6) made of amorphous silicon, a gate insulating layer (7) made of 5INX laminated on this semiconductor layer (6), and a gate electrode made of molybdenum laminated on this gate insulating layer (7). (G), this gate electrode (G) and the laminated part (
5) An insulating film made of polyimide (8) laminated thereon and a wiring part made of aluminum connected to the gate electrode (G) through an opening (80) provided in this insulating film (8)
9), and as shown in FIGS. 3 to 5, a photosensor (11), a photoconductor layer (12), and a transparent electrode (13). 10)
This device is connected to a contact type image sensor and is used to drive a contact type image sensor.

In the thin film semiconductor device according to this example,
By applying a drain voltage (VD) between the source and drain electrodes (S) and (D) and applying a gate voltage (Va) to the gate electrode (G), the semiconductor layer (c) is A channel is formed uniformly along the inner wall surface of the opening, and a drain current (I
D) flows, but as the gate voltage (Va) is lowered, a channel is no longer formed and the drain current (I
o) will stop flowing.

At this time, in this thin film semiconductor device, the length of the channel formed in the semiconductor layer (6) is the same as that of the insulating layer (3) interposed between the source electrode (S) and the drain electrode (D).
) (indicated by Ll in Figure 1), it is possible to set the channel length to be significantly smaller (for example, 1 μm or less) compared to conventional thin-film semiconductor devices. , which has the advantage of being able to be driven at high speed.

On the other hand, the channel width W uniformly formed along the inner wall surface of the opening of the semiconductor layer (6) is the total circumference length (2xWl+ in FIG. 1) of the semiconductor layer (6) stacked on the inner wall surface of the opening.
2xW2), it is possible to set the channel width W sufficiently large (for example, several tens of μm) without taking up exclusive space, which increases W/L and reduces the large current. It has the advantage of being able to be driven.

Furthermore, since this thin film semiconductor device is provided with a gate electrode (G) above the inner wall surface of the opening, the connection area between the gate electrode (G) and the wiring section (9) is shown in FIGS. As shown in the figure, it can be formed directly above the semiconductor device, and therefore, the arrangement direction of the photosensors (lO),
That is, it has the advantage of being highly integrated in the α direction.

"Manufacturing Process of Thin Film Semiconductor Device" Hereinafter, the manufacturing process of the thin film semiconductor device according to this embodiment will be described in detail with reference to the drawings.

First, as shown in FIG. 6(A), a tantalum source electrode coating (
After forming a resist film (r) in a pattern according to a photolithography process (see FIG. 6B), the above etching process was performed using a dry etching method using SF, +02 as an etching gas. An opening (20) as shown in FIG. 6(C) is formed in the source electrode film (S').

Next, as shown in FIG. 6(D), an ohmic contact forming layer film (2゛) made of n+-amorphous silicon, SIN, is formed on this surface by plasma CVD.

A film for an insulating layer (3') made of N+ and a film for an ohmic contact formation layer (4°) made of n+-amorphous silicon were successively formed, and a chrome film made of A drain electrode film (Do) is formed.

Next, a resist film (r) is formed in a pattern on this drain electrode film (Do) by a photolithography process.
After forming (see FIG. 6E), a wet etching process is performed to open an opening (30) having a slope inward in the substrate side direction as shown in FIG. 6(F). In this case, a mixed solution of cerium nitrate and perchloric acid is used as an etching agent for the chromium drain electrode coating (Do), and the n''-amorphous silicon ohmic contact forming layer coating (2°) (4 ') A mixed solution of hydrofluoric acid and nitric acid is used as the etching agent.
Furthermore, buffered sonic acid is used as an etching agent for the 5tNx insulating layer film (3゛).

Next, on this surface, a semiconductor layer film (6') made of amorphous silicon and a gate insulating layer film (7') made of SiN x are successively deposited on this surface using the plasma CVD method without breaking the vacuum condition. A film is formed (see FIG. 6G).

In this case, the film forming temperature conditions were 280°C, and the plasma power was 12EOW/car.
.

1. OmW/car. In addition, the plasma power of the latter film for gate insulating layer (Go) was set to 1. OmW/ct
The reason why j is set so low is to reduce damage caused by plasma at the interface between the film for the semiconductor layer (6°) and the film for the gate insulating layer (7°).

Next, a molybdenum gate electrode film (Go) is formed on this surface by a sputtering method, and a resist film (r) is formed in a pattern in the opening (30) according to a photolithography process ( (see Figure 6H), the molybdenum gate electrode film (Go) is etched by the sea urchin metetching method using phosphoric acid to form the gate electrode (G).
o) has been etched and exposed S xN
The film for the gate insulating layer (7°) made of x and the film for the semiconductor layer made of amorphous silicon (6') were dry etched by RIE using SFs +Ot, as shown in Fig. 6 (1). Gate insulating layer (7) and semiconductor layer (6
) and respectively.

Furthermore, after forming a resist film (r) in a pattern on this surface as shown in FIG. ), an insulating layer (3), an ohmic contact forming layer (4), and a drain electrode (D), and a polyimide insulating film (8) is formed on this surface as shown in FIG. 6(K). ) is deposited.

After opening an opening (80) called a via hole in this insulating film (8), an aluminum wiring part (9) is formed.
A thin film semiconductor device as shown in FIG. 6(L) was obtained.

In addition, in this manufacturing example, a semiconductor layer (6
), but this amorphous silicon may be subjected to an excimer laser annealing process to form polysilicon during the manufacturing process, and the semiconductor layer (6) may be formed of this polysilicon. This has the advantage of further improving its high-speed response.

In addition, in this manufacturing example, the semiconductor layer film (6') made of amorphous silicon and the gate insulating layer film (7°) made of 5INX are each formed by plasma CVD. Light C using ultraviolet light instead of the film method
Of course, the film may also be formed by the VD method.

〔Effect of the invention〕

According to the present invention, since the length of the channel formed in the semiconductor layer is determined by the thickness of the insulating layer interposed between the source and drain electrodes, it is necessary to set the channel length sufficiently small. On the other hand, since the channel width W formed in the semiconductor layer is defined by the total circumferential length of the semiconductor layer laminated on the inner wall surface of the opening, the channel width W can be changed without taking up exclusive space. can be set sufficiently large, and since the gate electrode is provided above the inner wall surface of the opening, it is possible to form a connection region between the gate electrode and the wiring section on the semiconductor device. .

Therefore, it is possible to drive at high speed and with a large current, and also has the effect of achieving high integration.

[Brief explanation of drawings]

1 to 6 show an embodiment of the present invention, FIG. 1 is a partially cutaway perspective view of a thin film semiconductor device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line ■-■ of FIG. 3 is a schematic perspective view of a contact type image sensor incorporating this thin film semiconductor device, FIG. 4 is a sectional view taken along IV--IV plane of FIG. 3, and FIG. 5 is a plan view of FIG. 3. 6(A)-(
L) is a process explanatory diagram showing the manufacturing process of this thin film semiconductor device, while FIGS. 7 to 11 show conventional examples, and FIG. 7 is a schematic perspective view of a conventional MOS type thin film semiconductor device. 8 is a sectional view taken along the line ■--■ in FIG. 7, FIG. 9 is a schematic perspective view of a contact type image sensor incorporating this thin film semiconductor device, and FIG. 10 is a cross-sectional view taken along the line X--X in FIG. 11 shows a plan view of FIG. 9, respectively. [Explanation of symbols] (S)...Source electrode (D)...Drain electrode (G)...Gate electrode (1)...Glass substrate (3)...Insulating layer (5)... Laminated portion (6)...Semiconductor layer (7)...Gate insulating layer

Claims (1)

[Claims] MO whose active layer is a semiconductor layer provided on an insulating substrate
An S-type thin film semiconductor device is composed of an insulating substrate, source/drain electrodes stacked on top of this substrate with an insulating layer interposed between them, and the insulating layer and source/drain electrodes. an opening formed in a laminated portion where the semiconductor layer is formed, and having an inner wall surface of the opening having a slope inward in the substrate side direction; a semiconductor layer uniformly stacked on the inner wall surface of the opening and constituting the active layer; 1. A thin film semiconductor device comprising: a gate insulating layer uniformly stacked on the layer; and a gate electrode uniformly stacked on the gate insulating layer.