JPH03286621A - Polarity changeover josephson driver circuit - Google Patents
Polarity changeover josephson driver circuitInfo
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- JPH03286621A JPH03286621A JP8870790A JP8870790A JPH03286621A JP H03286621 A JPH03286621 A JP H03286621A JP 8870790 A JP8870790 A JP 8870790A JP 8870790 A JP8870790 A JP 8870790A JP H03286621 A JPH03286621 A JP H03286621A
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- josephson
- drive voltage
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- 238000010168 coupling process Methods 0.000 claims abstract description 21
- 238000005859 coupling reaction Methods 0.000 claims abstract description 21
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 241000238366 Cephalopoda Species 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
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Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ｅ／Ｗセフンン素子を用いた超伝導集積回路
に関し、よう詳しくは超伝導記憶集積回路のワード線及
びビット線などの被駆動線路に電流を注入しかつ任意に
電流の方向を反転できる極性切換型ショセフンン躯動回
路に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a superconducting integrated circuit using an e/W electronic device, and more specifically, to a superconducting integrated circuit using an e/W electronic device, and more specifically, to a superconducting integrated circuit that uses an e/W electronic device, and more specifically, to a superconducting integrated circuit that uses an e/W electronic device, and more particularly, to a superconducting integrated circuit that uses an e/W electronic device. This invention relates to a polarity switching type moving circuit that can inject current into a line and arbitrarily reverse the direction of the current.
第３図に、従来から知られている極性切換型ジョセフソ
ン駆動回路を説明するための等価回路図を示す（昭和６
３年電子情報通信学会春季全国大会）、第３図を用いて
従来の技術の説明を行なう。Figure 3 shows an equivalent circuit diagram for explaining the conventionally known polarity switching type Josephson drive circuit (Showa 6).
The conventional technology will be explained using FIG. 3 (IEICE Spring National Conference).
第３図に示すように本躯動回路は、４個の磁界結合型ジ
ョセフソンゲート回路Ｇｌ、Ｇ２．Ｇ３゜Ｇ４と３個の
抵抗Ｋｌ、Ｒ２，Ｒとメモリセルアレイのワード線筐た
はビット線などの被駆動線路よｂＷ４威される。本回路
に３いてバイアス入力端Ｂ１からバイアス電流を供給し
た状態で、信号入力端Ｓ１に信号を入力すると伽界結合
型ジョセフソンゲート回路Ｇｌ、Ｇ３が超伝導状態から
電圧状態にスイッチし、バイアス電流は被駆動線路３に
注入される。被駆動線路に流れたバイアス電流は、磁界
結合型ジゴセフンンゲート回路０４ ｆｆ！１って接地
に流れ込む０以上の動作により被駆動線路に時計回す方
向に出力電流を発生させることができる。一方、バイア
ス入力端Ｂ２からバイアス電流を供給した状態で、信号
入力端Ｓ２に信号を入力すると磁界結合型ジ１セフノン
デート回路Ｇ２゜Ｇ４が超伝導状態から電圧状態にスイ
ッチし、バイアス電流は被駆動線路（リターンライン５
）に注入される。被駆動線路に流れたバイアス電流は、
磁界結合型ジョセフソングー１回路Ｇ３を通って接地に
流れ込む。以上の動作にょシ被駆動線路に反時計回シ方
向に出力電流を発生させることができる。As shown in FIG. 3, this main body circuit includes four magnetically coupled Josephson gate circuits Gl, G2 . G3, G4, three resistors Kl, R2, R, and a driven line such as a word line case or a bit line of a memory cell array are connected to bW4. When a signal is input to the signal input terminal S1 while a bias current is supplied from the bias input terminal B1 in this circuit, the Josephson gate circuits G1 and G3 switch from the superconducting state to the voltage state, and the bias current is supplied from the bias input terminal B1. Current is injected into the driven line 3. The bias current flowing to the driven line is transferred to the magnetic field coupling type gigabus gate circuit 04 ff! 1 flowing into ground can generate an output current in the clockwise direction in the driven line. On the other hand, when a signal is input to the signal input terminal S2 while a bias current is being supplied from the bias input terminal B2, the magnetically coupled di-1-cefnon-dating circuit G2゜G4 switches from the superconducting state to the voltage state, and the bias current is driven Railway track (return line 5
). The bias current flowing through the driven line is
It flows into ground through the magnetically coupled Joseph Song 1 circuit G3. Through the above operation, it is possible to generate an output current in the counterclockwise direction in the driven line.
以上説明したように、従来の技術にょシ被駆動線路に電
流を注入し、かつ任意に電流の方向を反転できる極性切
換型ジョセフソン駆動回路を実現することができる。As described above, it is possible to realize a polarity-switching Josephson drive circuit that can inject current into a driven line and arbitrarily reverse the direction of the current using conventional techniques.
従来の技術にかいては、磁界結合型ショセフンンゲート
回路（２接合Ｓ ＱＵ Ｉ Ｄゲート）を用いているた
め、入力信号を注入するための制御配線と８ＱＵＩＤル
ープとの磁界結合のための額板を得るために素子の面積
が大きくなり大規模な集積化が困難であるという問題点
があった。In the conventional technology, since a magnetic field coupling type SQUID gate circuit (two-junction SQUID gate) is used, the control wiring for injecting the input signal and the 8QUID loop for magnetic coupling There is a problem in that the area of the device becomes large in order to obtain a plaque, making large-scale integration difficult.
本発明の目的は、このような従来の極性切換型ジョセ７
ンン駆動回路の問題点を除去し、回路の微細化が可能な
極性切換型ジョセフノン駆動回路を提供することにある
。An object of the present invention is to solve the problem of the conventional polarity switching type Josei 7.
It is an object of the present invention to provide a polarity switching type Joseph Nonn drive circuit which eliminates the problems of the NON drive circuit and allows miniaturization of the circuit.
本発明によれば、バイアス入力端に第一の直接結合型ジ
ョセフソンゲート回路のバイアス入力端（Ｂ１）が接続
され、前記第一の直接結合型ショセ７ノンデート回路の
出力端に負荷抵抗を介して第二の直接結合型ジョセフソ
ンケート回路のバイアス入力端が接続され、信号入力端
に第一の入力抵抗を介して前記第一の直接結合型ジョセ
フソンゲート回路の信号入力端が接続され、前記信号入
力端に第二の入力抵抗と帝飴遅延回路を介して前記第二
の直接結合型ジョセフンンケート回路の信号入力端が接
続され、前記第二の直接結合型ジョセフソンゲート回路
の出力端が出力端に接続されてなる第一の駆動電圧発生
回路と、前記第一の駆動電圧発生回路と同一の回路構成
を有する第二の駆動電圧発生回路と、前記第一及び第二
の駆動電圧発生回路の出力端間に接続された被部ｍａ路
とから構成される極性切換型ジョセフソン駆動回路が得
られる。According to the present invention, the bias input terminal (B1) of the first direct coupling type Josephson gate circuit is connected to the bias input terminal, and the bias input terminal (B1) of the first direct coupling type Chausse7 non-dating circuit is connected to the bias input terminal via the load resistor. A bias input terminal of a second direct coupling type Josephson gate circuit is connected to the bias input terminal of the second direct coupling type Josephson gate circuit, and a signal input terminal of the first direct coupling type Josephson gate circuit is connected to the signal input terminal via a first input resistor. The signal input terminal of the second direct-coupled Josephson gate circuit is connected to the signal input terminal via a second input resistor and a delay circuit, and the output of the second direct-coupled Josephson gate circuit is connected to the signal input terminal of the second direct-coupled Josephson gate circuit. a first drive voltage generation circuit whose end is connected to an output end; a second drive voltage generation circuit having the same circuit configuration as the first drive voltage generation circuit; and the first and second drive voltage generation circuits. A polarity-switchable Josephson drive circuit is obtained, which is comprised of a covered part (ma) connected between the output terminals of the voltage generation circuit.
第１図は、本発明の第１の実施例を説明するための等価
回路図である。FIG. 1 is an equivalent circuit diagram for explaining a first embodiment of the present invention.
第１図に示す実り例は、２個の駆動電圧発生回路（１，
２）と、メモリセルアレイからなる被駆動線路３と、メ
モリセルプレイのリターンライン５からなる被駆動線路
と、抵抗Ｒとから構成され、第一の駆動電圧発生回路１
の出力端０１Ａと抵抗九の一端に被駆動線路３が接続さ
れ、抵抗Ｒの他端と第二の駆動電圧発生回路２の出力端
０２Ａに被駆動線路であるリターンライン５が接続され
た構成を有する。第一、第二の駆動電圧発生回路１゜２
は、同一の回路ａＩ戒を有しているので、以下、第一の
駆動電圧発生回路を例として説明する。第一の駆動電圧
発生回路１＃′ｉ、２個のジョセフソン接合（Ｊｌｌ、
Ｊ１２）と抵抗Ｒ１１０からなる第一の直接結合型ジョ
セ７ンンデート回路Ｇｌｌと、２個のジョセフソン接合
Ｊ１３．Ｊ１４と抵抗Ｒ１２０から□る第二の直接結合
型ジョセフソンゲート回路０１２と、第一の入力抵抗Ｒ
１１、第二の入力抵抗Ｒ１２と、負荷抵抗Ｒ１３と、遅
延回路ＤＬＩとしてのストＩＪツブ線路とで構成される
。第一の直接結合型ジョセフソンゲート回路Ｇｌｌの出
力端Ｏｉｌに負荷抵抗凡１３を介して第二の直接結合型
ジョセ７ンンデート回路Ｇ１２のバイアス入力端Ｂ１２
が接続され、第一の直接結合型ンヨセフソンゲート回路
０１１の信号入力端ＳＩＡに第、第二の入力抵抗Ａｌｌ
、Ｒ１２とストリップ線路（ＤＬＩ）を介して第二の直
接結合型ジョセフソンゲート回路Ｇ１２の信号入力端８
１２が接続されている。ストリップ線路（ＤＬｌ）は、
インダクタ（Ｌｌ）とキャパシタ（Ｃ１）からなる等価
回路で示しである。ここで、第一の入力抵抗Ｒ１１と第
二の入力抵抗Ｒ１２ａ同一の値に設定されているものと
する。The fruitful example shown in FIG. 1 consists of two drive voltage generation circuits (1,
2), a driven line 3 consisting of a memory cell array, a driven line consisting of a return line 5 of a memory cell play, and a resistor R.
A configuration in which a driven line 3 is connected to the output terminal 01A of the resistor R and one end of the resistor 9, and a return line 5, which is a driven line, is connected to the other end of the resistor R and the output terminal 02A of the second drive voltage generation circuit 2. has. First and second drive voltage generation circuits 1゜2
Since both have the same circuit aI rule, the first drive voltage generation circuit will be explained below as an example. First drive voltage generation circuit 1#'i, two Josephson junctions (Jll,
J12) and a resistor R110, and two Josephson junctions J13. A second direct-coupled Josephson gate circuit 012 from J14 and resistor R120, and a first input resistor R
11. It is composed of a second input resistor R12, a load resistor R13, and a strike IJ tube line as a delay circuit DLI. The bias input terminal B12 of the second directly coupled Josephson gate circuit G12 is connected to the output terminal Oil of the first directly coupled Josephson gate circuit Gll through a load resistor 13.
is connected to the signal input terminal SIA of the first direct coupling type Nyosefson gate circuit 011, and the second input resistor All
, R12 and the signal input terminal 8 of the second direct coupling type Josephson gate circuit G12 via the strip line (DLI).
12 are connected. Strip line (DLl) is
This is an equivalent circuit consisting of an inductor (Ll) and a capacitor (C1). Here, it is assumed that the first input resistance R11 and the second input resistance R12a are set to the same value.
本実施例の極性切換型ジョセフソン駆動回路は、直接結
合型のジョセフソンゲート回路のみで形成されているの
で従来の技術で示した磁界結合型のジョセフソンゲート
回路に比べて回路の面積を大幅に減少させることができ
る。Since the polarity switching type Josephson drive circuit of this embodiment is formed only with a direct coupling type Josephson gate circuit, the circuit area can be significantly reduced compared to the magnetic field coupling type Josephson gate circuit shown in the conventional technology. can be reduced to
本実施例の極性切換型ジョセフソン駆動回路の動作原理
は以下の７０くである。バイアス入力端子ＢＩＡからバ
イアス電流を供給した状態で、入力信号端ＳＩＡに信号
を入力すると第一の駆動電圧発生回路ｌに訃いて、第一
の直接結合型ジョセフソンゲート回路Ｇｌｌのジョセフ
ソン接合Ｊ１１゜Ｊ１２が超伝導状態から電圧状態にス
イッチし、バイアス電流は抵抗Ｒ１３を通して第二の直
接結合型ジョセフソンゲート回路Ｇ１２のジョセフソン
接合Ｊ１３に流れる。九マし、ＲＩＩＯ＜Ｒ１３とする
。その後ストリップ線路（ＤＬＩ）ｔ−通って遅れて入
力した信号にようジョセフソン接合Ｊ１３゜Ｊ１４が超
伝導状態から電圧状態にスイッチし、バイアス電流は被
駆動線路３に注入される。被駆動線路３に流れたバイア
ス電流は、第二の駆動電圧発生回路２のジョセフソン接
合Ｊ２３を通って接地に流れ込む。このとき端子８１Ａ
から入力された信号は、第一の駆動電圧発生回路１に釦
いて、ジョセフソン接合Ｊ１２．Ｊ１４が電圧状態にス
イッチした時点で抵抗Ｒ１２，Ｒ１２０を通って接地に
流れるためバイアス電流との入出力分離が計られている
。以上の動作によう被駆動線路に時計回シ方向に出力電
流を発生させることができる。The operating principle of the polarity switching type Josephson drive circuit of this embodiment is as follows. When a signal is input to the input signal terminal SIA while a bias current is supplied from the bias input terminal BIA, the signal is input to the first drive voltage generation circuit l, and the Josephson junction J11 of the first direct coupling type Josephson gate circuit Gll is input. J12 switches from the superconducting state to the voltage state, and the bias current flows through the resistor R13 to the Josephson junction J13 of the second directly coupled Josephson gate circuit G12. 9, and RIIO<R13. Thereafter, the Josephson junctions J13 and J14 switch from the superconducting state to the voltage state according to a signal inputted later through the strip line (DLI) t-, and a bias current is injected into the driven line 3. The bias current flowing through the driven line 3 flows into the ground through the Josephson junction J23 of the second drive voltage generating circuit 2. At this time, terminal 81A
The signal inputted from the Josephson junction J12. When J14 switches to the voltage state, it flows to ground through resistors R12 and R120, so that input/output separation from the bias current is achieved. With the above operation, it is possible to generate an output current in the clockwise direction in the driven line.
方、バイアス入力端Ｂ２Ａからバイアス電流を供給した
状態で、信号入力端Ｓ２Ａに信号を入力すると第二の駆
動電圧発生回路２にかいて、第一の直接結合型ジョセフ
ソンゲート回路Ｇ２１のジョセフソン接合Ｊ２１．Ｊ２
２が超伝導状態から電圧状態にスイッチし、バイアス電
流は抵抗Ｒ２３に通して第二の直接結合型ジョセフソン
ゲート回路Ｇ２２のジョセフソン接合Ｊ２３に流れ、そ
の後ストリッツ′線路（Ｄｉ、２）を通って遅れて入力
した信号によシジョセフソン接合Ｊ２３．Ｊ２４が超伝
導状態から電圧状態にスイッチし、バイアス電流は被駆
動線路５に注入される。被駆動線路に流れたバイアス電
流は、第一の駆動電圧発生回路ｌのジョセフソン接合Ｊ
１３を通って接地に流れ込む。On the other hand, when a signal is input to the signal input terminal S2A while a bias current is supplied from the bias input terminal B2A, the signal is applied to the second drive voltage generation circuit 2, and the Josephson voltage of the first directly coupled Josephson gate circuit G21 is applied. Junction J21. J2
2 switches from the superconducting state to the voltage state, the bias current flows through the resistor R23 to the Josephson junction J23 of the second directly coupled Josephson gate circuit G22, and then through the Stritz' line (Di,2). Josephson junction J23. J24 switches from the superconducting state to the voltage state and a bias current is injected into the driven line 5. The bias current flowing into the driven line is connected to the Josephson junction J of the first drive voltage generating circuit l.
13 and flows into the ground.
このとき信号入力端Ｓ２Ａから入力された信号は、第二
の駆動電圧発生回路２に釦いて、ジョセフソン接合Ｊ２
２．Ｊ２４が電圧状態にスイッチした時点で抵抗Ｒ２１
，Ｒ２２を通って接地に流れるためバイアス電流との入
出力分離が計られでいる。以上の動作によシ板躯動線路
に反時計回シ方向に出力ｔｉを発生させることができる
。At this time, the signal input from the signal input terminal S2A is sent to the second drive voltage generation circuit 2, and the signal is sent to the Josephson junction J2.
2. When J24 switches to voltage state, resistor R21
, R22 to ground, so that the input and output are separated from the bias current. By the above operation, the output ti can be generated in the counterclockwise direction on the plate sliding line.
本実施例の極性切換型ジョセフソン駆動回路を広い動作
マージンで動作させるためには、以下のように回路定数
を決定する必要がある。In order to operate the polarity switching type Josephson drive circuit of this embodiment with a wide operating margin, it is necessary to determine circuit constants as follows.
１１＝Ｉ３．１２＝Ｉ４．ＩＩ／２＜Ｉ２＜Ｉｌここで
、ＩＯ，Ｉ２．Ｉ３．Ｉ４ Ｆｉジョセフソン接合Ｊｌ
ｌとＪ２１．Ｊ１２とＪ２２．Ｊ１３とＪ２３．Ｊ１４
とＪ２４の超伝導臨界電流値である。11=I3.12=I4. II/2<I2<Il where IO, I2. I3. I4 Fi Josephson Junction Jl
l and J21. J12 and J22. J13 and J23. J14
and the superconducting critical current value of J24.
以上説明したように、本実施例によう回路のレイアウト
面積が小さくなシ高集積化が可能な極性切換型ジョセフ
ソン駆動回路を実現することができる。As described above, according to this embodiment, it is possible to realize a polarity switching type Josephson drive circuit that has a small circuit layout area and can be highly integrated.
本実施例にかいては被駆動線路中に抵抗Ｒを挿入したが
、この代わシにジョセフソン接合で構成されるリセット
ゲートを用いても同様の効果を得ることができる。In this embodiment, a resistor R is inserted into the driven line, but the same effect can be obtained by using a reset gate made of a Josephson junction instead.
なか、第１の実施例にかいてジョセフソン接合Ｊｌｌ、
Ｊ１２．・・・の代シにそれぞれこれらを複数個、例え
ば４個直列に接続したものを使用してもよい。回路の動
作時間に記惟セルアレイからなる被駆動線路のインダク
タンスをＬ１駆動電圧を■、駆動電流（出力電流）を工
とすると、ＬＩ／Ｖで評価することができる。駆動電圧
Ｖは、ジョセフソン接合が電圧状態にスイッチしたとき
の発生電電圧である。従って、ジョセフソン接合を複数
個直列接続することと第１の実施例に比べて複数倍の駆
動電圧を発生し、動作時間の短縮化が可能となる。Among them, in the first embodiment, Josephson junction Jll,
J12. Instead of . . . , a plurality of these, for example four connected in series, may be used. The inductance of the driven line consisting of the memory cell array during the circuit operation time can be evaluated by LI/V, where the L1 drive voltage is 2 and the drive current (output current) is . The drive voltage V is the generated voltage when the Josephson junction switches to a voltage state. Therefore, by connecting a plurality of Josephson junctions in series, it is possible to generate a driving voltage several times higher than that in the first embodiment, and to shorten the operating time.
第２図は、本発明の第２の実施例を説明するための等他
回路図である。FIG. 2 is a circuit diagram for explaining a second embodiment of the present invention.
第２図に示す実施例は、第１の実施例にかいて用いたス
トリップ線路ＤＬＩ、ＤＬ２の代わｂにそれぞれ一端を
接地したジョセフソン接合Ｊ１５゜Ｊ２５を挿入した極
性切換型ジョセフノン駆動回路である。ここで、ジョセ
フソン接合Ｊ１５．Ｊ２５は、信号が入力したときに必
ず電圧状態にスイッチするように、その超伝導臨界電流
値を入力信号値以下に設定される。これによりジョセフ
ソン接合１個のスイッチ時間だけの遅延時間を得ること
ができる。従って、同一の遅延時間を得るのにストリッ
プ線路で遅延回路を形成した第１の実施例に比べてさら
に回路の面積を小さくすることができる。回路の動作原
理は第１の実施例と同様である。The embodiment shown in FIG. 2 is a polarity switching type Josephnon drive circuit in which Josephson junctions J15 and J25, each with one end grounded, are inserted in place of the strip lines DLI and DL2 used in the first embodiment. be. Here, Josephson junction J15. J25 has its superconducting critical current value set below the input signal value so that it always switches to the voltage state when a signal is input. As a result, a delay time corresponding to the switching time of one Josephson junction can be obtained. Therefore, the area of the circuit can be further reduced compared to the first embodiment in which the delay circuit is formed using a strip line to obtain the same delay time. The operating principle of the circuit is the same as that of the first embodiment.
以上説明したように本発明は、直接結合型ジョセフソン
接合で駆動電圧発生回路を構成することによシ、回路の
微細化と高速動作が可能な極性切換型ジ曹セ７ソン駆動
回路を実現することができる効果がある。As explained above, the present invention realizes a polarity-switching type DC/DC drive circuit that is capable of circuit miniaturization and high-speed operation by configuring the drive voltage generation circuit with a direct coupling type Josephson junction. There is an effect that can be done.
【図面の簡単な説明】
第１図は、本発明による極性切換型ジ】セフソン駆動回
路の第１の実施例を説明するための等他回路図、第２図
は、本発明による極性切換型ジ曹セ７ソン駆動回路の第
２の実施例を説明するための等他回路図、第３図は、従
来の技術による極性切換型ジョセフンン駆動回路を説明
するための等他回路図である。
１・−・第一の駆動電圧発生回路、２・・・第二の駆動
電圧発生回路、３・・−被駆動線路、４−・・メモリセ
ルアレイ、５・・・リターンライン、 ＢＩＡ、Ｂｌ
ｌ 。
Ｂ１２．Ｂ２Ａ、 Ｂ２１．Ｂ２２・・・バイアス入力
端、０１〜Ｇ４・・・磁界結合型ジョセフソンゲート回
路、Ｇｌｌ・・・第一の駆動電圧発生回路の第一の直接
結合型ジョセフソンゲート回路、Ｇ１２・・・第一の駆
動電圧発生回路の第二の直接結合型ジョセフソンゲート
回路、Ｇ２１・・・第二の駆動電圧発生回路の第一の直
接結合型ジョセ７ンンケート回路、Ｇ２２・・・第二の
駆動電圧発生回路の第二の直接結合型ジョセフソンゲー
ト回路、ＣＩ、Ｃ２−・キャパシタ、ＤＬｌ、ＤＬ２・
−・遅延回路、Ｊｌｌ、Ｊ１２．Ｊ１３゜Ｊ１４．Ｊ１
５．Ｊ２１．Ｊ２２．Ｊ２３．Ｊ２４．Ｊ２５・・・ジ
ョセフソン接合、Ｌｌ、Ｌ２・・・インダクタ、Ｍ１〜
ＭＮ・・・メモリセル、 Ｏｌｌ、０１２．ＯＩＡ。
０２１．０２２，０２Ａ・・・出力端、Ｒ１１・・・ｌ
の第一の入力抵抗、Ｒ１２・・・１の第二の入力抵抗、
Ｒ２１・・・２の第一の入力抵抗、Ｒ２２・・・２の第
二の入力抵抗、Ｓｌ、８１Ａ、８２，８２Ａ・・・信号
入力端。[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a circuit diagram for explaining a first embodiment of the polarity switching type Cefson drive circuit according to the present invention, and FIG. 2 is a polarity switching type circuit diagram according to the present invention. FIG. 3 is a circuit diagram illustrating a second embodiment of a polarity switching type driver circuit according to the prior art. DESCRIPTION OF SYMBOLS 1--First drive voltage generation circuit, 2--Second drive voltage generation circuit, 3--Driven line, 4--Memory cell array, 5--Return line, BIA, Bl
l. B12. B2A, B21. B22...bias input terminal, 01-G4...magnetic field coupling type Josephson gate circuit, Gll...first direct coupling type Josephson gate circuit of the first drive voltage generation circuit, G12...th A second direct-coupled Josephson gate circuit of the first drive voltage generation circuit, G21... a first direct-coupled Josephson gate circuit of the second drive voltage generation circuit, G22... a second drive voltage The second direct-coupled Josephson gate circuit of the generation circuit, CI, C2- capacitor, DLl, DL2-
-・Delay circuit, Jll, J12. J13゜J14. J1
5. J21. J22. J23. J24. J25...Josephson junction, Ll, L2...Inductor, M1~
MN...Memory cell, Oll, 012. OIA. 021.022,02A...output end, R11...l
A first input resistance of R12...1, a second input resistance of R12...1,
First input resistance of R21...2, second input resistance of R22...2, Sl, 81A, 82, 82A... signal input terminal.
Claims (1)
回路のバイアス入力端が接続され、前記第一の直接結合
型ジョセフソンゲート回路の出力端に負荷抵抗を介して
第二の直接結合型ジョセフソンゲート回路のバイアス入
力端が接続され、信号入力端に第一の入力抵抗を介して
前記第一の直接結合型ジョセフソンゲート回路の信号入
力端が接続され、前記信号入力端に第二の入力抵抗と遅
延回路を介して前記第二の直接結合型ジョセフソンゲー
ト回路の信号入力端が接続され、前記第二の直接結合型
ジョセフソンゲート回路の出力端が出力端（Ｏ）に接続
されてなる第一の駆動電圧発生回路と、前記第一の駆動
電圧発生回路と同一の回路構成を有する第二の駆動電圧
発生回路と、前記第一及び第二の駆動電圧発生回路の出
力端間に接続された被駆動線路とから構成されることを
特徴とする極性切換型ジョセフソン駆動回路。A bias input terminal of a first direct-coupled Josephson gate circuit is connected to the bias input terminal, and a second direct-coupled Josephson gate circuit is connected to the output terminal of the first direct-coupled Josephson gate circuit via a load resistor. A bias input terminal of the gate circuit is connected, a signal input terminal of the first direct coupling type Josephson gate circuit is connected to the signal input terminal via a first input resistor, and a second input terminal is connected to the signal input terminal. A signal input terminal of the second direct-coupled Josephson gate circuit is connected via a resistor and a delay circuit, and an output terminal of the second direct-coupled Josephson gate circuit is connected to an output terminal (O). a first drive voltage generation circuit having the same circuit configuration as the first drive voltage generation circuit, and between the output terminals of the first and second drive voltage generation circuits. A polarity switching type Josephson drive circuit comprising a connected driven line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8870790A JP2861229B2 (en) | 1990-04-03 | 1990-04-03 | Josephson drive circuit with polarity switching |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8870790A JP2861229B2 (en) | 1990-04-03 | 1990-04-03 | Josephson drive circuit with polarity switching |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03286621A true JPH03286621A (en) | 1991-12-17 |
| JP2861229B2 JP2861229B2 (en) | 1999-02-24 |
Family
ID=13950365
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8870790A Expired - Lifetime JP2861229B2 (en) | 1990-04-03 | 1990-04-03 | Josephson drive circuit with polarity switching |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2861229B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10211798B2 (en) | 2016-06-27 | 2019-02-19 | International Business Machines Corporation | Driving the common-mode of a Josephson parametric converter using a short-circuited coplanar stripline |
-
1990
- 1990-04-03 JP JP8870790A patent/JP2861229B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10211798B2 (en) | 2016-06-27 | 2019-02-19 | International Business Machines Corporation | Driving the common-mode of a Josephson parametric converter using a short-circuited coplanar stripline |
| US10581394B2 (en) | 2016-06-27 | 2020-03-03 | International Business Machines Corporation | Driving the common-mode of a Josephson parametric converter using a short-circuited coplanar stripline |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2861229B2 (en) | 1999-02-24 |
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