JP2782640B2 - Internal connection structure of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an internal connection structure of a semiconductor device for a semiconductor module composed of a plurality of diodes, thyristors and the like.

[0002]

2. Description of the Related Art First, the structure of a conventional semiconductor device will be described with reference to FIGS.
And will be described. In the figure, 1 is a heat dissipation base plate, 2
Is an insulating substrate, 3 is a semiconductor chip (diode) mounted side by side on the insulating substrate 2, 4 is a U-shaped upper electrode joined on the semiconductor chip 3, 5, 6, 7 are connection terminals, 8 is It is an outer case. The upper electrode 4, the connection terminals 5, 6, and 7 are formed by pressing a copper plate or the like into a predetermined shape by pressing. Of the connection terminals 5, 6, and 7, the connection terminal 5 also serves as a mounting base for the right semiconductor chip 3, and the connection terminal 6 is connected to the semiconductor chip 3 arranged on the left via the upper electrode 4. The connection terminal 7 is internally wired so as to also serve as a mounting base for the left semiconductor chip 3 and a connection conductor for connecting the left and right semiconductor chips in series. , And becomes an external lead-out terminal. FIG. 4 shows an equivalent circuit of the diode module having the above configuration.

The above-mentioned diode module is assembled as follows. First, the semiconductor chip 3 is individually soldered and mounted on the connection terminals 5 and 7, and the upper electrode 4 is soldered on the semiconductor chip 3 to assemble a single unit. Next, each of the above-mentioned units is arranged and joined at a predetermined position on the insulating substrate 2 joined to the heat radiation base 1 and
The tip of the connection terminal 7 on which the left semiconductor chip 3 is mounted is superimposed on the upper surface of the upper electrode 4 of the right semiconductor chip 3 and soldered between them. The connection terminals 6 are soldered.
After that, the outer case 8 is covered, and the inside of the case is filled with a sealing resin (for example, silicone gel) to complete the module assembly.

[0004]

However, in the internal connection structure of the semiconductor device described above, there remains a problem in the soldering between the upper electrode 4 and the connection terminal, particularly the solderability between the connection terminal 7 and the connection terminal 7. . That is, in order to secure a good solder joint state when soldering between the upper electrode 4 and the connection terminal 7 by the above-described module assembling method, the left and right semiconductor chips 3 are arranged on the insulating substrate 2. In the assembled state, the conductor pieces of the connection terminals 7 and the upper surface of the upper electrode 4 need to overlap each other so as to be in close contact with each other. Therefore, parts such as the upper electrode and the connection terminal which are bent and formed by press working or the like have variations in size and shape, and may be deformed when the parts are handled after forming.

Therefore, as shown in FIG.
When soldering between the upper electrode 4 and the upper electrode 4, if the height dimension h of the upper electrode 4 is uneven or deformed (any one of the upper side 4 a and the lower side 4 b of the U-shaped upper electrode 4 is inclined), The degree of parallelism between the upper surface of the electrode 4 and the surface of the connection terminal 7 cannot be obtained, and a gap is generated on the soldering surface between the two.
For this reason, in the soldered state, the solder layer 9 has a form as shown in the figure, resulting in poor soldering. When thermal or mechanical stress is applied, the solder joints are peeled off, and the reliability of the product is reduced. It drops significantly. Further, if the amount of solder is increased so as to fill the gap on the soldering surface, the solder may hang down on the semiconductor chip 3 due to the gap, which may cause poor chip characteristics.

The present invention has been made in view of the above points. When soldering between an upper electrode and a connection terminal, even if the size and shape of each component are varied or deformed,
An object of the present invention is to provide an internal connection structure of a semiconductor device in which a good soldering state can be secured by compensating for these dimensional errors and deformation.

[0007]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention is directed to a groove module in which connection terminals are fitted on the upper surface of an upper electrode of a semiconductor chip for the above-described diode module and the like. And soldering is performed by inserting the connection terminal into the groove.

In the above structure, the groove is formed between the upper surface of the upper electrode and the side wall rising upward from both left and right side edges of the upper surface, and the side wall is formed by bending. be able to.

[0009]

According to the above construction, when the connection terminals are superimposed on the upper electrode and soldered between them, even if each component has a slight dimensional variation or deformation, the connection terminals enter the groove and move upward. Since the electrode faces the electrode, if the amount of solder is sufficient, the solder held in the groove is normally soldered between the two. Moreover, since the groove functions to prevent the molten solder from protruding and dripping, even if the amount of solder is slightly increased, there is no danger that excess solder will drool onto the semiconductor chip.

[0010]

1 and 2 show an embodiment of the present invention in which the diode module shown in FIG. 3 is implemented. The same members corresponding to FIGS. 3 and 4 are denoted by the same reference numerals. It is. That is, the U-shaped upper electrode 4 mounted on the semiconductor chip 3 is bent at right angles from the left and right side edges of the upper side 4a to the upper side at right angles to be bent, and the left and right side walls 4c, 4c are bent. A U-shaped groove 4e is formed between 4d and the upper surface of the electrode 4. The groove width of the groove 4e is selected according to the dimension (width of the electrode conductor piece) of the mating connection electrode 7 to be soldered to the upper electrode 4. When the connection electrodes 6 and 7 are soldered to the upper electrode 4, the connection electrodes are connected to the left and right side walls 4c and 4c.
d and fitted in the groove 4e, and in this state, soldering is performed between the upper electrode 4 and the connection electrode 7.

[0011]

As described above, according to the internal connection structure of the present invention, when the connection terminals are overlaid on the upper electrode and soldered between them, there is a slight dimensional variation and deformation of each component. Even if there is a sufficient amount of solder, the solder held in the groove can be normally soldered between the two. In addition, since the molten solder is prevented from protruding and dripping by the groove, even if the amount of solder is increased, there is no danger that excess solder will drip onto the semiconductor chip, thereby improving the workability of soldering. .

[Brief description of the drawings]

FIG. 1 is an exploded perspective view of a main structure showing an internal connection structure according to an embodiment of the present invention.

FIG. 2 is an assembly view of a semiconductor device employing the internal connection structure of FIG. 1;

FIG. 3 is an assembly configuration diagram of a conventional semiconductor device.

FIG. 4 is an equivalent circuit diagram of FIG.

FIG. 5 is an exploded perspective view of a main part structure in FIG. 3;

6 is a diagram showing a state where soldering is performed in FIG. 5;

[Explanation of symbols]

 Reference Signs List 3 semiconductor chip 4 upper electrode 4a upper side 4c side wall 4d side wall 4e groove 6 connection terminal 7 connection terminal

Claims (3)

(57) [Claims] 1. A semiconductor device in which a U-shaped upper electrode is mounted and joined on a semiconductor chip, and a connection terminal is overlapped on an upper surface of the upper electrode and soldered. An internal connection structure for a semiconductor device, wherein a recessed portion is formed. 2. The internal connection structure according to claim 1, wherein
An internal connection structure for a semiconductor device, wherein a groove is formed between an upper surface of an upper electrode and a side wall rising upward from both left and right side edges of the upper surface. 3. The internal connection structure according to claim 2,
An internal connection structure for a semiconductor device, wherein a side wall is formed by bending.