JP2002075857A - Resist pattern forming method - Google Patents
Resist pattern forming methodInfo
- Publication number
- JP2002075857A JP2002075857A JP2001175821A JP2001175821A JP2002075857A JP 2002075857 A JP2002075857 A JP 2002075857A JP 2001175821 A JP2001175821 A JP 2001175821A JP 2001175821 A JP2001175821 A JP 2001175821A JP 2002075857 A JP2002075857 A JP 2002075857A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- resist pattern
- resist
- exposure
- resist film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
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- Preparing Plates And Mask In Photomechanical Process (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体集積回路等の
製造時に用いる、微細なレジストパタンの形成方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a fine resist pattern used in manufacturing a semiconductor integrated circuit or the like.
【0002】[0002]
【従来の技術】従来、半導体集積回路等の微細パタン
は、レチクル、マスク等の原図基板上の微細パタンを半
導体ウェハ等の被露光基板上に形成したレジストに転写
したレジストパタンを基にして製造する。すなわち、前
記原図基板を短波長可視光、紫外光、遠紫外光、真空紫
外光、極端紫外光などの露光光線によって照明し、投影
露光、近接露光、密着露光などの各種露光手段によって
前記被露光基板上に形成したレジスト膜を前記原図基板
上の微細パタン形状または該微細パタン形状と相関のあ
る形状に露光する。露光後、前記レジスト膜に現像処理
を加えると露光強度分布に応じてレジスト膜の一部が除
去され、所望のレジストパタンが得られる。このよう
に、露光と現像を組み合わせてレジストパタンを形成す
るプロセスをリソグラフィと称している。2. Description of the Related Art Conventionally, a fine pattern of a semiconductor integrated circuit or the like is manufactured based on a resist pattern obtained by transferring a fine pattern on an original substrate such as a reticle or a mask to a resist formed on a substrate to be exposed such as a semiconductor wafer. I do. That is, the original drawing substrate is illuminated with exposure light such as short-wavelength visible light, ultraviolet light, far ultraviolet light, vacuum ultraviolet light, and extreme ultraviolet light, and is exposed to light by various exposure means such as projection exposure, proximity exposure, and contact exposure. The resist film formed on the substrate is exposed to a fine pattern shape on the original substrate or a shape correlated with the fine pattern shape. After the exposure, when the resist film is subjected to a developing treatment, a part of the resist film is removed according to the exposure intensity distribution, and a desired resist pattern is obtained. The process of forming a resist pattern by combining exposure and development in this way is called lithography.
【0003】半導体集積回路や半導体素子、光エレクト
ロニクス素子、マイクロマシン用微細部品等のパタンの
最小寸法は、リソグラフィにより形成するレジストパタ
ンを如何に微細にできるかにより決まってしまう。その
ため、上記の回路や素子や部品のパタンを微細化するに
は、リソグラフィで形成できるレジストパタン寸法を極
力小さくする必要がある。The minimum size of a pattern of a semiconductor integrated circuit, a semiconductor device, an optoelectronic device, a micro component for a micromachine, and the like is determined by how fine a resist pattern formed by lithography can be. Therefore, in order to miniaturize the patterns of the above-mentioned circuits, elements and components, it is necessary to minimize the resist pattern dimensions that can be formed by lithography.
【0004】ところで、とくにパタンの微細化が急務と
なっている半導体集積回路や半導体素子用パタンの形成
には、レンズやミラー、またはそれらを組み合わせた投
影露光光学系を用いて原図基板上の微細パタンを被露光
基板上に投影露光する、投影露光法が主として用いられ
ている。投影露光法により転写可能なレジストパタンの
最小寸法、すなわち解像度を決定している主要因は、投
影露光に使用する露光装置の投影露光光学系の開口数N
Aと露光波長λである。[0004] In particular, in the formation of patterns for semiconductor integrated circuits and semiconductor elements for which miniaturization of patterns is urgently required, lenses, mirrors, or projection exposure optical systems combining them are used to form fine patterns on the original drawing substrate. A projection exposure method of projecting and exposing a pattern on a substrate to be exposed is mainly used. The main factor that determines the minimum dimension of a resist pattern that can be transferred by the projection exposure method, that is, the resolution, is the numerical aperture N of the projection exposure optical system of the exposure apparatus used for projection exposure.
A and the exposure wavelength λ.
【0005】無収差の投影露光光学系を仮定すると、解
像度Rは露光波長λに比例し、投影露光光学系の開口数
NAに反比例する。したがって、短波長で露光する程、
また、大きい開口数の投影露光光学系を用いて露光する
程高解像となり、より微細なパタンが転写される。Assuming a projection exposure optical system having no aberration, the resolution R is proportional to the exposure wavelength λ and inversely proportional to the numerical aperture NA of the projection exposure optical system. Therefore, the shorter the wavelength, the more exposure
In addition, the higher the exposure is made by using a projection exposure optical system having a large numerical aperture, the higher the resolution becomes, and a finer pattern is transferred.
【0006】しかしながら、露光波長λを短くするこ
と、あるいは、投影露光光学系の開口数NAを大きくす
ることはそれぞれ技術的に相当困難であり、いずれも現
状技術の限界に達している。However, it is technically very difficult to shorten the exposure wavelength λ or increase the numerical aperture NA of the projection exposure optical system, and each of them has reached the limit of the current technology.
【0007】低収差の投影露光光学系を実現するには、
レンズを用いた投影露光光学系が好ましいが、200n
m以下の波長の光に対し高透過率を有して安定で安価な
レンズ材料はほとんど存在しない。一方、ミラーを用い
る投影露光光学系は空間的に配置する時の制約から使用
できる面の数が限られてしまい、装置も大型化してしま
うため、極微細レジストパタンを転写できる実用的な低
収差投影露光光学系はまだ開発されていない。したがっ
て、露光波長λを短くするには限界があり、現状ですで
にほぼその限界に達している。To realize a projection exposure optical system with low aberration,
A projection exposure optical system using a lens is preferable.
There are few stable and inexpensive lens materials that have high transmittance for light having a wavelength of less than m. On the other hand, a projection exposure optical system using a mirror limits the number of surfaces that can be used due to restrictions when spatially arranged, and the device becomes large, so that a practical low aberration that can transfer an extremely fine resist pattern can be used. Projection exposure optics have not been developed yet. Therefore, there is a limit to shorten the exposure wavelength λ, and at present, the limit has been almost reached.
【0008】また、実用的な大きさの露光フィールドを
仮定すると、開口数NAを大きくとるには投影露光光学
系の口径を大きくとることが必要であり、収差の補正も
難しくなることから、開口数NAを大幅に大きくするこ
とも難しく、現状ですでに可能な限りの高開口数化が図
られている。Further, assuming that the exposure field has a practical size, it is necessary to increase the aperture of the projection exposure optical system in order to increase the numerical aperture NA, and it becomes difficult to correct aberrations. It is also difficult to greatly increase the numerical aperture, and at present, the highest possible numerical aperture has already been achieved.
【0009】これに対し、近接露光や密着露光では、露
光波長をλ、原図基板と被露光基板との間隙をzとする
時、解像度Rはλzの平方根に比例する。すなわち、近
接露光や密着露光の場合には、露光波長λと原図基板・
被露光基板間隙zが解像度を決定する主要因である。In contrast, in proximity exposure or close contact exposure, when the exposure wavelength is λ and the gap between the original substrate and the substrate to be exposed is z, the resolution R is proportional to the square root of λz. That is, in the case of proximity exposure or contact exposure, the exposure wavelength λ and the original substrate
The exposed substrate gap z is the main factor that determines the resolution.
【0010】したがって、解像度を上げるためには、露
光波長λを短くして原図基板と被露光基板との間隙zを
狭くすれば良い。しかし、近接露光や密着露光では、基
本的に原図基板と同じ寸法の微細パタンしか転写できな
いため、原図基板上に極微細パタンを作ること自体が困
難となってきている。加えるに露光波長λを短くすると
原図基板の露光光線透過率が低下し、光の吸収による原
図基板の伸縮が問題になる。また、原図基板・被露光基
板間隙zを小さくしたり、両者を接触あるいは密着させ
たりすると、原図基板の汚染や被露光基板に形成したレ
ジスト膜の損傷等が懸念される。したがって、露光波長
λや原図基板・被露光基板間隙zを大幅に改善すること
は、事実上非常に困難である。Therefore, in order to increase the resolution, the exposure wavelength λ may be shortened to reduce the gap z between the original substrate and the substrate to be exposed. However, in proximity exposure or close contact exposure, since only a fine pattern having the same dimensions as the original substrate can be transferred, it is becoming difficult to form an ultra-fine pattern on the original substrate. In addition, when the exposure wavelength λ is shortened, the exposure light transmittance of the original substrate decreases, and the expansion and contraction of the original substrate due to light absorption becomes a problem. Further, when the gap z between the original substrate and the substrate to be exposed is reduced or the two are brought into contact or in close contact with each other, contamination of the original substrate or damage to the resist film formed on the substrate to be exposed may be caused. Therefore, it is practically very difficult to significantly improve the exposure wavelength λ and the gap z between the original substrate and the substrate to be exposed.
【0011】一方、遮光部と透過部とを有する通常のレ
チクルやマスクの他に、各種位相シフタを適宜配置した
位相シフトマスクが開発されている。該位相シフトマス
クを用いると、レジスト膜を露光する光線の光強度分布
の明暗コントラストが改善させ、同じ開口数NA、同じ
露光波長λ、同じ原図基板・被露光基板間隙zに対して
高解像が得られる。この方法も順次取り入れられて来て
おり、高解像化の有効な方策となっている。しかし、位
相シフトマスクを適用してもなおかつ解像度は不足して
おり、さらなる解像度の向上が求められる状況にある。On the other hand, in addition to ordinary reticles and masks having a light shielding portion and a transmitting portion, phase shift masks in which various phase shifters are appropriately arranged have been developed. The use of the phase shift mask improves the light / dark contrast of the light intensity distribution of the light beam for exposing the resist film, and achieves a high resolution with respect to the same numerical aperture NA, the same exposure wavelength λ, and the same original substrate / substrate gap z. Is obtained. This method has also been gradually adopted, and is an effective measure for achieving high resolution. However, even if the phase shift mask is applied, the resolution is still insufficient, and there is a situation where further improvement in the resolution is required.
【0012】また、同じ光強度分布のコントラストに対
してレジストパタンの形成方法やレジスト膜の構成、材
料等を工夫して解像度を上げる試みもなされている。レ
ジストの薄膜化、表面反応レジストプロセス、多層レジ
スト、コントラストエンハーンスメントレイヤ(以下C
ELと記す。)の適用等が代表例である。Also, attempts have been made to improve the resolution by devising a method of forming a resist pattern, a structure and a material of a resist film, etc. for the same contrast of the light intensity distribution. Resist thinning, surface reaction resist process, multilayer resist, contrast enhancement layer (hereinafter C
Recorded as EL. ) Is a typical example.
【0013】レジストの膜厚を薄くすると、その膜厚間
を露光光線が通過する際の光路長が短くなり、レジスト
基板の光強度分布をレジスト表面の光強度分布とあまり
変わらないようにできる。また、投影露光時には、レジ
スト厚さ全体を焦点深度内に収めることができる。その
ため、レジスト膜厚が厚い時に比して、レジスト膜を露
光する光線の光強度分布の明暗コントラストが低くても
解像する。When the film thickness of the resist is reduced, the optical path length when the exposure light beam passes between the film thicknesses is shortened, and the light intensity distribution of the resist substrate can be made not so different from the light intensity distribution of the resist surface. At the time of projection exposure, the entire resist thickness can be kept within the depth of focus. For this reason, even if the light-intensity distribution of the light beam for exposing the resist film is low in contrast to the case where the resist film thickness is large, the image is resolved.
【0014】表面反応レジストプロセスは、露光時にレ
ジストの表面だけが反応するようにせしめ、シリル化等
を利用して表面だけが反応した部分の形状を表面反応層
の下に設けた材料に移して行く方法である。露光時にレ
ジストの表面だけ感光させれば良いので、レジスト膜を
露光する光線の光強度分布の明暗コントラストが低くて
も解像する。In the surface reaction resist process, only the surface of the resist is reacted at the time of exposure, and the shape of the portion where only the surface has reacted is transferred to a material provided under the surface reaction layer by using silylation or the like. The way to go. Since only the surface of the resist is required to be exposed at the time of exposure, the light can be resolved even if the contrast of the light intensity distribution of the light beam for exposing the resist film is low.
【0015】多層レジストはレジストを2層または多層
に重ねて塗布し、最上層のレジストを薄くして、低コン
トラストの光強度分布でも該最上層のレジストが原図基
板上の微細パタンに対応した形状に解像するようにす
る。そして、最上層から順次、上層レジストパタンをマ
スクにその下のレジスト膜をエッチングし、最終的には
後続の工程に必要な最下層レジストのパタンを形成す
る。The multi-layer resist is formed by coating the resist in two or more layers so as to make the uppermost resist thinner so that the uppermost resist has a shape corresponding to the fine pattern on the original drawing substrate even with a low contrast light intensity distribution. Resolution. Then, using the upper resist pattern as a mask, the resist film thereunder is sequentially etched from the uppermost layer, and finally, the pattern of the lowermost resist required for the subsequent process is formed.
【0016】多層レジストを2層レジストの構成とし、
エッチングを用いずに上層レジストパタンを遮光部とし
て下層レジスト膜を露光し、露光後現像して上層レジス
トパタンの形状をそのまま下層レジスト膜に移す方法も
たとえば、Jounal of Vacuum Sci
ence and Technology Vol.1
6,p.1620(1979)等に開示されている。し
かしながら、開示されている方法では、下層レジスト膜
露光時にはフィールド内全域を一括照射するため、下層
レジストには、上層レジストパタンの形状がそのまま転
写されるに過ぎない。したがって、下層レジスト膜を露
光後、現像して最終的に得られるパタンのピッチは、上
層レジストパタンと同じであり、上層レジストパタンの
ピッチより遥に小さいピッチのレジストパタンを形成す
ることはできない。The multi-layer resist is constituted by a two-layer resist,
A method of exposing the lower resist film using the upper resist pattern as a light-shielding portion without using etching, developing after exposure, and transferring the shape of the upper resist pattern to the lower resist film as it is, for example, Journal of Vacuum Sci.
ence and Technology Vol. 1
6, p. 1620 (1979). However, according to the disclosed method, the entire area within the field is collectively irradiated at the time of exposing the lower resist film, so that the shape of the upper resist pattern is simply transferred to the lower resist. Therefore, the pitch of the pattern finally obtained by exposing and developing the lower resist film is the same as that of the upper resist pattern, and it is impossible to form a resist pattern having a pitch much smaller than the pitch of the upper resist pattern.
【0017】また、CELを用いる方法は、レジスト膜
上にCEL膜を形成し、光強度の明暗の差を増強してレ
ジストを感光させる方法である。CEL膜は露光によっ
て感光部の透過率が増すので、露光部と未露光部の感光
比率が改善される。このため、CELを用いない時に比
して解像度が向上する。In the method using CEL, a CEL film is formed on a resist film, and the resist is exposed to light by increasing the difference in light intensity between light and dark. Since the transmittance of the CEL film increases in the exposed portion by exposure, the exposure ratio of the exposed portion and the unexposed portion is improved. Therefore, the resolution is improved as compared with the case where CEL is not used.
【0018】これらのレジストプロセスを工夫する方法
は、最上層または最上部分の材料を最初に露光する時の
光強度分布に対応したパタンを形成する方法であり、以
下の層または部分は、最上層または最上部分の材料に形
成されたパタン形状を、後続のエッチング等に対する耐
性を高めて作り直す目的で使用しているに過ぎない。し
たがって、解像度は最上層または最上部分の材料を露光
する光強度分布でほぼ決まってしまう。また、最上層ま
たは最上部分の材料を露光する光強度分布自体が改善さ
れる訳ではないので、解像度の改良状況は一般に高々1
0〜20%程度であり、あまり顕著ではない。The method of devising these resist processes is a method of forming a pattern corresponding to the light intensity distribution at the time of first exposing the material of the uppermost layer or the uppermost part. Alternatively, the pattern shape formed on the uppermost material is merely used for the purpose of increasing the resistance to the subsequent etching or the like and recreating the pattern. Therefore, the resolution is almost determined by the light intensity distribution for exposing the uppermost layer or uppermost material. Further, since the light intensity distribution itself for exposing the material of the uppermost layer or the uppermost portion is not improved, the state of improvement in resolution is generally at most one.
It is about 0 to 20%, which is not very noticeable.
【0019】さらに別の解像度改善方法として、露光フ
ィールド内のパタンを2群のパタン群に分割し、分割し
た各群のパタンを2回に分けて露光する方法がDige
stof Papers,Micro Process
'94,pp.4−5に開示されている。この方法は、
通常、レジストは光強度に比例して感光し、現像液に対
する溶解性が露光強度に対応して変化するのに対し、感
光性や現像液に対する溶解性が露光強度の2乗に比例し
て変化する2光子レジストを利用する方法である。2光
子吸収レジストを利用して分割した2群のパタンを順次
露光すれば、各パタン群露光時の光強度分布の明暗コン
トラストが低くてもそれを2乗した分布のコントラスト
は十分高くなるので、分割露光したパタンの合成により
従来より狭いピッチのパタンを形成できる。但し、この
方法では、上記の特別な特性を持つレジストが不可欠で
あるのに対し、必要とされる実用的な2光子吸収レジス
トは技術の開示後未だに開発されていない。As yet another resolution improving method, there is a method in which a pattern in an exposure field is divided into two groups of patterns, and each of the divided patterns is exposed twice.
stof Papers, Micro Process
'94, pp. 4-5. This method
Usually, the resist is exposed in proportion to the light intensity, and the solubility in the developer changes according to the exposure intensity, whereas the photosensitivity and the solubility in the developer change in proportion to the square of the exposure intensity. This is a method using a two-photon resist. If two groups of patterns divided by using a two-photon absorption resist are sequentially exposed, even if the light-dark contrast of the light intensity distribution at the time of exposure of each pattern group is low, the contrast of the squared distribution becomes sufficiently high. By synthesizing the patterns subjected to the divided exposure, it is possible to form a pattern having a narrower pitch than the conventional one. However, in this method, a resist having the above-mentioned special characteristics is indispensable, whereas a required practical two-photon absorption resist has not yet been developed after the disclosure of the technology.
【0020】[0020]
【発明が解決しようとする課題】以上に説明したよう
に、解像度の改善方法は多数あるが、それぞれに様々な
制約があり、可能な限り各種の方法を利用してもなおか
つ所望の解像度が得られず、集積度、微細度を大幅に向
上できる新しい方法が嘱望されていた。新しい微細パタ
ン形成方法としては、以上に示した従来の高解像化方法
と矛盾せず、一緒に適用できて、効果が相乗的に生ずる
ような方法であることが好ましいことは言う迄もない。As described above, there are many methods for improving the resolution, but each has various restrictions, and a desired resolution can be obtained even if various methods are used as much as possible. Therefore, a new method capable of greatly improving the degree of integration and fineness has been demanded. It is needless to say that a new method for forming a fine pattern is preferably a method which can be applied together with the conventional high resolution method described above, and which can produce an effect synergistically. .
【0021】[0021]
【課題を解決するための手段】本発明では、大幅に集積
度や微細度を向上させ、また、従来の高解像化手段の多
くを本発明と同時に適用できるようにするため、露光フ
ィールド内のパタンを2群のパタン群に分割し、分割し
た各群のパタンを露光および現像する工程を順次行う、
2段階のパタン形成工程を含むようにする。According to the present invention, the integration field and the fineness are greatly improved, and many of the conventional high resolution means can be applied simultaneously with the present invention. Is divided into two groups of patterns, and the steps of exposing and developing the divided patterns of each group are sequentially performed.
A two-step pattern forming process is included.
【0022】そして、第1のレジストパタン形成工程に
おいては、基板上または被膜付き基板上に形成した下層
レジスト膜および上層レジスト膜からなる2層レジスト
を用い、下層レジスト膜が感光せず上層レジスト膜だけ
が感光する波長帯の露光光線により上層レジスト膜を前
記の分割した第1のパタン群に対応した形状に露光し、
前記露光の後、現像を行って、該第1のパタン群に対応
した上層レジストパタンを形成する。In the first resist pattern forming step, a two-layer resist composed of a lower resist film and an upper resist film formed on a substrate or a substrate with a coating is used, and the lower resist film is not exposed and the upper resist film is not exposed. Exposing the upper resist film to a shape corresponding to the divided first pattern group by an exposure light beam in a wavelength band to which only
After the exposure, development is performed to form an upper resist pattern corresponding to the first pattern group.
【0023】また、第2のレジストパタン形成工程にお
いては、前記第1のレジストパタン形成工程で形成した
上層レジストパタンをほとんど透過できず、かつ、下層
レジスト膜が感光し、第1のレジストパタン形成工程で
用いる露光光線よりも短波長帯の露光光線により、前記
上層レジストパタン中の任意のパタンと該任意のパタン
に隣接するパタンとの間に露出した下層レジスト膜を前
記の分割した第2のパタン群に対応するパタン形状に露
光し、該露光の後、現像を行って、上層レジストパタン
の直下および前記第2のパタン群に対応するパタン形状
露光の際の暗部に、下層レジストパタンを形成する。In the second resist pattern forming step, the upper resist pattern formed in the first resist pattern forming step is hardly penetrable, and the lower resist film is exposed to light to form the first resist pattern forming step. By the exposure light beam having a shorter wavelength band than the exposure light beam used in the step, the lower resist film exposed between an arbitrary pattern in the upper resist pattern and a pattern adjacent to the arbitrary pattern is divided into the second resist film. Exposure is performed in a pattern shape corresponding to the pattern group, and after the exposure, development is performed to form a lower resist pattern immediately below the upper resist pattern and in a dark portion of the pattern shape exposure corresponding to the second pattern group. I do.
【0024】パタンを2群のパタン群に分割する際に
は、パタンを一つおきに2つのパタン群に分割するなど
して、第1のレジストパタン形成工程において形成する
レジストパタンの中心線間の間隔を該レジストパタンの
最小線幅の3.5倍以上となし、第2のレジストパタン
形成工程においてレチクルまたはマスクによって形成す
るレジストパタンの中心線間の間隔を該レジストパタン
の最小線幅の3.5倍以上とする。When the pattern is divided into two groups of patterns, every other pattern is divided into two groups of patterns so that the center line of the resist pattern formed in the first resist pattern forming step is formed. Is set to be 3.5 times or more the minimum line width of the resist pattern, and the interval between the center lines of the resist pattern formed by the reticle or the mask in the second resist pattern forming step is set to the minimum line width of the resist pattern. 3.5 times or more.
【0025】さらにまた、第1のレジストパタン形成工
程および/または第2のレジストパタン形成工程におい
て、周辺の光強度が中心の光強度より高い照明2次光源
により原図基板を照明する投影露光法を用いてパタンを
形成する。Further, in the first resist pattern forming step and / or the second resist pattern forming step, a projection exposure method of illuminating the original substrate with an illumination secondary light source whose peripheral light intensity is higher than the central light intensity is provided. To form a pattern.
【0026】また、第1のレジストパタン形成工程およ
び/または第2のレジストパタン形成工程において、シ
フタエッジ型位相シフトマスクを用いてレジストパタン
を形成する。In the first resist pattern forming step and / or the second resist pattern forming step, a resist pattern is formed using a shifter edge type phase shift mask.
【0027】[0027]
【発明の実施の形態】以下、本発明を図面に示す実施の
形態に基づいて詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on an embodiment shown in the drawings.
【0028】図1は本発明のレジストパタン形成方法の
説明図である。まず、図1(a)に示すように、半導体
ウェハ等の基板1に下層レジスト膜2を付し、その上に
上層レジスト膜3を重ねて形成する。このようなレジス
トの構成を形成するには、たとえば、ヘキサメチルジン
ラザン等の界面活性剤で基板1をレジストの塗布性が良
くなるように改質した後、スピンコータを用いて下層レ
ジスト膜2を塗布してベークする。そして、その上に上
層レジスト膜3を塗布し、再びベークする。界面活性剤
によるレジストの付着性を改善する処置は、下層レジス
ト膜2が問題なく塗布でき、後述の現像工程においてレ
ジストのはがれや現像むら等を生じなければ省略しても
良い。FIG. 1 is an explanatory view of a method for forming a resist pattern according to the present invention. First, as shown in FIG. 1A, a lower resist film 2 is formed on a substrate 1 such as a semiconductor wafer, and an upper resist film 3 is formed thereon. In order to form such a resist composition, for example, after modifying the substrate 1 with a surfactant such as hexamethylzine lazan so that the coatability of the resist is improved, the lower resist film 2 is formed using a spin coater. Apply and bake. Then, an upper resist film 3 is applied thereon and baked again. The treatment for improving the adhesiveness of the resist by the surfactant may be omitted if the lower resist film 2 can be applied without any problem and the peeling of the resist or uneven development is not caused in a developing step described later.
【0029】なお、基板1上には任意の被膜が任意の層
形成されていても良い。レジストパタン形成のテストを
行うだけの場合には、基板1上にレジストを塗布するこ
とが多いが、半導体集積回路等を製作する場合には、リ
ソグラフィによりレジストパタンを作るだけが目的では
なく、レジストパタンをマスクにエッチングを行う等し
てレジストの下の被膜を加工するのが目的であることが
多い。したがって、その場合には、基板1上に被加工膜
となる絶縁膜、金属膜、半導体膜等が形成されている場
合が多いが、そのような被膜付きの基板1でも良い。被
膜の一部が任意のパタン形状に除去されている基板すな
わち任意のパタン付きの基板であっても良いことは言う
迄もない。Incidentally, an arbitrary coating may be formed on the substrate 1. A resist is often applied on the substrate 1 only when a test for forming a resist pattern is performed. However, when a semiconductor integrated circuit or the like is manufactured, not only the purpose of making a resist pattern by lithography but also the purpose of the resist. In many cases, the purpose is to process a film under the resist by performing etching using a pattern as a mask. Therefore, in such a case, an insulating film, a metal film, a semiconductor film, or the like, which is a film to be processed, is often formed on the substrate 1, but the substrate 1 with such a coating may be used. Needless to say, the substrate may be a substrate from which a part of the coating is removed in an arbitrary pattern shape, that is, a substrate with an arbitrary pattern.
【0030】また、基板1の表面からの露光光線の反射
が問題になる場合には、基板1上に反射防止膜を形成
し、その上に下層レジスト膜2を付し、その上に上層レ
ジスト膜3を重ねて形成しても良い。If reflection of exposure light from the surface of the substrate 1 becomes a problem, an antireflection film is formed on the substrate 1, a lower resist film 2 is formed thereon, and an upper resist film is formed thereon. The films 3 may be formed in layers.
【0031】下層レジスト膜2上に上層レジスト膜3を
形成する際、下層レジスト膜2はその感光波長帯が上層
レジスト膜3の感光波長帯より長波長側に存在するレジ
スト膜とし、上層レジスト膜3を露光する露光光線には
感光しないレジスト膜とする。When forming the upper resist film 3 on the lower resist film 2, the lower resist film 2 is a resist film whose photosensitive wavelength band exists on the longer wavelength side than the photosensitive wavelength band of the upper resist film 3. 3 is a resist film that is not exposed to exposure light for exposure.
【0032】具体例を挙げれば、下層レジスト膜2とし
て波長248nmのKrFエキシマレーザ露光用レジス
ト膜または波長210〜270nm程度の遠紫外線露光
用レジスト膜を用い、上層レジスト膜3として波長36
5nmのi線露光用レジストまたは波長436nmのg
線露光用レジストを使用する。下層レジスト膜2を波長
193nmのArFエキシマレーザ露光用レジスト膜と
し、上層レジスト膜3を波長248nmのKrFエキシ
マレーザ露光用レジスト膜または波長210〜270n
mの遠紫外線露光用レジスト膜あるいは波長365nm
のi線露光用レジストまたは波長436nmのg線露光
用レジストとしても良い。下層レジスト膜2を波長15
7nmのフッ素エキシマレーザ露光用レジスト膜とし、
上層レジスト膜3を波長193nmのKrFエキシマレ
ーザ露光用レジスト膜、波長248nmのKrFエキシ
マレーザ露光用レジスト膜または波長210〜270n
mの遠紫外線露光用レジスト膜あるいは波長365nm
のi線露光用レジストまたは波長436nmのg線露光
用レジストとしても良い。As a specific example, a resist film for exposing a KrF excimer laser having a wavelength of 248 nm or a resist film for exposing to a deep ultraviolet ray having a wavelength of about 210 to 270 nm is used as the lower resist film 2, and a resist film having a wavelength of 36 nm is used as the upper resist film 3.
5nm i-line exposure resist or 436nm wavelength g
A resist for line exposure is used. The lower resist film 2 is a resist film for 193 nm wavelength ArF excimer laser exposure, and the upper resist film 3 is a 248 nm wavelength KrF excimer laser exposure resist film or 210 to 270 n.
m deep UV exposure resist film or wavelength 365nm
Or a resist for g-ray exposure with a wavelength of 436 nm. The lower resist film 2 has a wavelength of 15
7mm fluorine excimer laser exposure resist film,
The upper resist film 3 is formed of a 193 nm wavelength KrF excimer laser exposure resist film, a 248 nm wavelength KrF excimer laser exposure resist film, or a wavelength range of 210 to 270 n.
m deep UV exposure resist film or wavelength 365nm
Or a resist for g-ray exposure with a wavelength of 436 nm.
【0033】下層レジスト膜2上に上層レジスト膜3を
形成したならば、次に上層レジスト膜3だけが感光し下
層レジスト膜2が感光しない露光光線を用いて、上層レ
ジスト膜3をパタン形状に露光する。この際、上層レジ
スト膜3を露光するパタンは、予め露光フィールド内の
パタンを2群のパタン群に分割した片方のパタン群とす
る。After the upper resist film 3 is formed on the lower resist film 2, the upper resist film 3 is formed into a pattern by using an exposure light beam in which only the upper resist film 3 is exposed and the lower resist film 2 is not exposed. Expose. At this time, the pattern for exposing the upper resist film 3 is one pattern group in which the pattern in the exposure field is divided into two groups in advance.
【0034】上記のように、上層レジスト膜3を分割し
た片方のパタン群の形状に露光したならば、引き続いて
現像を行って、図1(b)に示すように、上層レジスト
パタン4を形成する。上層レジストパタン4は、レジス
トパタンの中心線間の間隔pを該レジストパタンの最小
線幅wの3.5倍以上とする。上層レジスト膜3に微細
パタンを転写できるか否かは、該パタンの線幅の微細度
にも影響されるが、密集パタンではパタンの周期が最大
の決定要因となる。したがって、形成するレジストパタ
ンの中心線間の最小間隔が十分広ければ、パタン自体の
線幅は中心線間の最小間隔の3.5分の1以下の細さで
も転写可能である。As described above, if the upper resist film 3 is exposed to the shape of one of the divided groups of patterns, development is subsequently performed to form the upper resist pattern 4 as shown in FIG. I do. In the upper resist pattern 4, the distance p between the center lines of the resist pattern is set to 3.5 times or more the minimum line width w of the resist pattern. Whether or not a fine pattern can be transferred to the upper resist film 3 is also affected by the fineness of the line width of the pattern, but in a dense pattern, the pattern cycle is the largest determining factor. Therefore, if the minimum distance between the center lines of the resist pattern to be formed is sufficiently large, the line width of the pattern itself can be transferred even smaller than 3.5 times the minimum distance between the center lines.
【0035】上層レジスト膜3が化学増幅型レジストの
場合等、感度や解像度が露光後現像前のベークすなわち
ポストベークに依存する場合には、必要に応じてポスト
ベークを行った後に現像を行って上層レジストパタン4
を形成する。When the sensitivity and resolution depend on the post-exposure bake before development, ie, post-bake, such as when the upper resist film 3 is a chemically amplified resist, post-bake and development are performed as necessary. Upper resist pattern 4
To form
【0036】上層レジストパタン4として下層レジスト
膜2上に残すパタンの線幅をできるだけ細くするために
は、レンズやミラー、またはそれらを組み合わせた投影
露光光学系を用いて原図基板上の微細パタンを被露光基
板上に投影露光する。投影露光法を用い、原図基板を照
明する照明2次光源として、図2に例を示すように、周
辺の光強度が中心の光強度より高い照明2次光源を用い
た投影露光を用いるととくに有効である。図2において
は、斜線部が2次光源の発光部5を示している。図2
(a)は円環照明または輪帯照明であり、円環または輪
帯の幅は任意である。(b)および(c)は4点照明で
あり、大きさおよび形状は任意である。(d)は連続し
た光強度分布を有する2次光源による照明、(e),
(f)は2点照明、2分割照明であり、ここでも大きさ
および形状は任意である。(d)の場合に中央部の光強
度が0であっても良いことは、言う迄もない。In order to make the line width of the pattern left on the lower resist film 2 as the upper resist pattern 4 as narrow as possible, a lens, a mirror, or a projection exposure optical system combining them is used to reduce the fine pattern on the original substrate. Projection exposure is performed on the substrate to be exposed. As shown in the example of FIG. 2, a projection exposure using a secondary illumination light source whose peripheral light intensity is higher than the central light intensity is used as a secondary illumination light source for illuminating the original substrate using the projection exposure method. It is valid. In FIG. 2, a hatched portion indicates the light emitting unit 5 of the secondary light source. FIG.
(A) is annular illumination or annular illumination, and the width of the annular or annular zone is arbitrary. (B) and (c) show four-point illumination, and the size and shape are arbitrary. (D) Illumination by a secondary light source having a continuous light intensity distribution, (e),
(F) is a two-point illumination and a two-division illumination, and the size and shape are also arbitrary here. It goes without saying that the light intensity at the center may be 0 in the case of (d).
【0037】周辺の光強度が中心の光強度より高い照明
2次光源を用いると、斜入射光によって原図基板が照明
され、1次回折光が片方だけ投影露光光学系に取り込ま
れる。このため、Japanese Journal
of Applied Physics,Vol.3
3,No.12B,pp.6823−6830に開示さ
れているように、周期パタンを投影露光すると、2光束
干渉により形成された光強度分布が生じ、通常の強度一
様の照明2次光源を用いた場合より、遮光パタン部の線
幅が細く形成され易い。本発明では、形成するレジスト
パタンの中心線間の最小間隔を該レジストパタンの最小
線幅の3.5倍以上となし、パタン線幅をスペース幅よ
り小さくすることが必要である。したがって、遮光パタ
ン部の線幅が細く形成され易い、前記の周辺の光強度が
中心の光強度より高い照明2次光源を用いる投影露光方
法がとくに有効である。When an illumination secondary light source whose peripheral light intensity is higher than the central light intensity is used, the original substrate is illuminated by obliquely incident light, and only one of the primary diffracted light is taken into the projection exposure optical system. For this reason, the Japanese Journal
of Applied Physics, Vol. 3
3, No. 12B, pp. As disclosed in US Pat. No. 6,823,830, when a periodic pattern is projected and exposed, a light intensity distribution formed by two-beam interference is generated, and a light-shielding pattern portion is formed as compared with the case of using a normal secondary light source with uniform intensity. Have a small line width. In the present invention, it is necessary to set the minimum interval between the center lines of the resist pattern to be formed to be at least 3.5 times the minimum line width of the resist pattern, and to make the pattern line width smaller than the space width. Therefore, the projection exposure method using the secondary illumination light source in which the light intensity at the periphery is higher than the light intensity at the center where the line width of the light-shielding pattern portion is easily formed is particularly effective.
【0038】また、上層レジストパタン4として下層レ
ジスト膜2上に残すパタンの線幅をできるだけ細くする
ために、上層レジストパタン4の形成時に原図基板とし
て図3に示すシフタエッジ型の位相シフトレチクルまた
は位相シフトマスクを適用することも有効である。図3
(a)の位相シフトレチクルまたは位相シフトマスク
は、レチクルまたはマスク基板6上に、露光光線の位相
をほぼ反転させる位相シフタ7を設け、該位相シフタ7
のエッジではその両側を通る光が干渉し合って光強度が
弱まることを利用する。また、図3(b)の位相シフト
レチクルまたは位相シフトマスクは、位相シフタ7を付
ける変わりにレチクルまたはマスク基板6を掘り込んで
露光光線の位相をほぼ反転させるものである。また、図
3(c)および(d)に示すように、図3(a)または
図3(b)のシフタエッジ上に細い遮光パタン8を配置
するとさらに有効である。形成するレジストパタンの中
心線間の間隔すなわち、図3(a)〜(d)の位相シフ
タ7の幅または位相シフトを与えるための掘り込み部の
幅pを、形成するレジストパタンの最小線幅の3.5倍
以上とするのであれば、シフタエッジの間隔が十分離れ
るので、該シフタエッジを非常に細い遮光部として活用
することができる。In order to minimize the line width of the pattern left on the lower resist film 2 as the upper resist pattern 4, a shifter edge type phase shift reticle or a phase shift reticle shown in FIG. It is also effective to apply a shift mask. FIG.
In the phase shift reticle or the phase shift mask shown in (a), a phase shifter 7 for substantially inverting the phase of an exposure light beam is provided on a reticle or a mask substrate 6.
At the edge of, light passing through both sides interfere with each other to reduce the light intensity. In addition, the phase shift reticle or the phase shift mask shown in FIG. 3B digs the reticle or the mask substrate 6 instead of attaching the phase shifter 7, and substantially reverses the phase of the exposure light beam. Further, as shown in FIGS. 3C and 3D, it is more effective to dispose a thin light-shielding pattern 8 on the shifter edge of FIG. 3A or 3B. The distance between the center lines of the resist pattern to be formed, that is, the width of the phase shifter 7 in FIGS. 3A to 3D or the width p of the dug portion for giving a phase shift is determined by the minimum line width of the resist pattern to be formed. If it is 3.5 times or more, the distance between the shifter edges is sufficiently large, so that the shifter edge can be used as a very thin light shielding portion.
【0039】次に、下層レジスト膜2のプリベーク温度
にて全体を再ベークする。再ベークは必要に応じて行え
ば良く、下層レジスト膜2の再ベークにより、上層レジ
ストパタン4が軟化してしまうような場合は省略しても
良い。Next, the entire lower resist film 2 is baked again at a prebaking temperature. The re-bake may be performed as necessary, and may be omitted when the re-bake of the lower resist film 2 softens the upper resist pattern 4.
【0040】この後、下層レジスト膜が感光する露光光
線を用いて、下層レジスト膜2を露光し、引き続いて現
像を行って、図1(c)に示すように、下層レジストパ
タン5を形成する。この際、下層レジスト膜2を露光す
るパタンは、予め露光フィールド内のパタンを2群のパ
タン群に分割した他方のパタン群とし、たとえば一つお
きに形成した上層レジストパタン4として形成しなかっ
た残りの一つおきのパタンを上層レジストパタン4の間
を補完する形で形成する。下層レジストパタン5のう
ち、上層レジストパタン4中の任意のパタンと該任意の
パタンに隣接するパタンとの間に露出した下層レジスト
膜2を露光して得るパタンは、図5に示すように、パタ
ンの中心線間の間隔pを該パタンの最小線幅wの3.5
倍以上とする。Thereafter, the lower resist film 2 is exposed using an exposure light beam which exposes the lower resist film, and is subsequently developed to form a lower resist pattern 5 as shown in FIG. 1C. . At this time, the pattern for exposing the lower resist film 2 was the other pattern group in which the pattern in the exposure field was divided into two groups in advance, and was not formed as the upper resist pattern 4 formed alternately, for example. The other alternate patterns are formed so as to complement the space between the upper resist patterns 4. Of the lower resist pattern 5, a pattern obtained by exposing the lower resist film 2 exposed between an arbitrary pattern in the upper resist pattern 4 and a pattern adjacent to the arbitrary pattern is, as shown in FIG. The distance p between the center lines of the pattern is set to 3.5, which is the minimum line width w of the pattern.
More than double.
【0041】下層レジスト膜2を局部的に露光するに
は、上層レジスト膜3を露光した時と同様、レチクルや
マスクを原図基板として、投影露光、近接露光、密着露
光等を行えば良い。下層レジスト膜2が化学増幅型レジ
ストの場合等、感度や解像度が露光後現像前のベークす
なわちポストベークに依存する場合には、必要に応じて
ポストベークを行った後現像を行って下層レジストパタ
ン5を形成する。In order to expose the lower resist film 2 locally, as in the case of exposing the upper resist film 3, projection exposure, proximity exposure, contact exposure and the like may be performed using a reticle or mask as an original substrate. In the case where the lower resist film 2 is a chemically amplified resist and the sensitivity and resolution depend on the post-exposure bake before development, that is, post-bake, post-bake is performed as necessary, and then the lower resist pattern is developed. 5 is formed.
【0042】この場合も、下層レジストパタン5として
できるだけ細い残しパタンを形成するためには、レンズ
やミラー、またはそれらを組み合わせた投影露光光学系
を用いて原図基板上の微細パタンを被露光基板上に投影
露光する、投影露光法を用い、原図基板を照明する照明
2次光源として、先に上層レジストパタン4の形成用と
して示した周辺の光強度が中心の光強度より高い照明2
次光源を用いた投影露光を用いるととくに有効である。Also in this case, in order to form the remaining resist pattern as small as possible as the lower resist pattern 5, a fine pattern on the original substrate is formed on the substrate to be exposed by using a lens, a mirror, or a projection exposure optical system combining them. As a secondary light source for illuminating the original substrate using the projection exposure method, the peripheral light intensity previously shown for forming the upper resist pattern 4 is higher than the central light intensity.
It is particularly effective to use projection exposure using a secondary light source.
【0043】また、原図基板として先に上層レジストパ
タン4の形成用として示したシフタエッジ型の位相シフ
トレチクルまたは位相シフトマスクを適用することも有
効である。It is also effective to apply the shifter edge type phase shift reticle or phase shift mask previously shown for forming the upper resist pattern 4 as the original substrate.
【0044】このとき、下層レジスト膜2を露光する光
線が、先に形成してある上層レジストパタン4をほとん
ど透過できないように、下層レジスト膜2と上層レジス
ト膜3の材料を選択しておく。たとえば、上層レジスト
膜3として波長365nmのi線露光用レジストや波長
436nmのg線露光用レジストを使用する場合には、
該i線露光用レジストまたはg線露光用レジストとし
て、ノボラック樹脂をベースレジンとしたレジストを用
いれば、波長250nm付近以下の露光光線の透過率を
非常に小さくできる。また、上層レジスト膜3として波
長248nmのKrFエキシマレーザ露光用レジスト膜
または波長210〜270nmの遠紫外線露光用レジス
ト膜を使用する場合には、該レジストとしてポリヒドロ
キシスチレンをベースレジンとしたレジストを用いれ
ば、波長200nm以下の露光光線の透過率を非常に小
さくできる。さらに、上層レジスト膜3を波長193n
mのArFエキシマレーザ露光用レジスト膜とする場合
にも、アクリルやノルボルネン系のポリマーをベースレ
ジンとし、脂環構造を導入したレジストを用いれば、波
長157nm以下の露光光線の透過率を非常に小さくで
きる。At this time, the materials of the lower resist film 2 and the upper resist film 3 are selected so that the light beam for exposing the lower resist film 2 can hardly pass through the upper resist pattern 4 formed previously. For example, when an i-line exposure resist having a wavelength of 365 nm or a g-line exposure resist having a wavelength of 436 nm is used as the upper resist film 3,
When a resist using a novolak resin as a base resin is used as the i-line exposure resist or the g-line exposure resist, the transmittance of exposure light having a wavelength of about 250 nm or less can be extremely reduced. When a resist film for KrF excimer laser exposure with a wavelength of 248 nm or a resist film for deep ultraviolet exposure with a wavelength of 210 to 270 nm is used as the upper resist film 3, a resist using polyhydroxystyrene as a base resin is used as the resist. For example, the transmittance of exposure light having a wavelength of 200 nm or less can be extremely reduced. Further, the upper resist film 3 is set to a wavelength of 193n.
When the resist film for ArF excimer laser exposure of m is used, the transmittance of exposure light having a wavelength of 157 nm or less can be extremely reduced by using an acrylic or norbornene-based polymer as a base resin and using a resist having an alicyclic structure. it can.
【0045】このように下層レジスト膜2を露光する光
線が、先に形成してある上層レジストパタン4をほとん
ど透過できないようにしておけば、上層レジストパタン
4の存在する部分は遮光されるので、下層レジスト膜2
には、下層レジスト膜2の露光時に用いる原図基板の遮
光パタン部と上層レジストパタン4のパタン形状とが合
成された形状のパタンが形成される。すなわち、最終的
に必要な所期のパタンが形成される。If the light beam for exposing the lower resist film 2 is hardly transmitted through the upper resist pattern 4 previously formed, the portion where the upper resist pattern 4 exists is shielded from light. Lower resist film 2
A pattern having a shape obtained by synthesizing the light-shielding pattern portion of the original substrate used for exposing the lower resist film 2 and the pattern shape of the upper resist pattern 4 is formed. That is, the required pattern is finally formed.
【0046】なお、図1においては、レジスト膜の露光
部が現像により除去されるポジ形のレジストを想定して
図を描いてあるが、必要に応じて下層レジスト膜2およ
び/または上層レジスト膜3をネガ形のレジスト膜とし
ても良いことは言う迄もない。Although FIG. 1 is drawn assuming a positive resist in which exposed portions of the resist film are removed by development, the lower resist film 2 and / or the upper resist film may be used as necessary. Needless to say, 3 may be a negative resist film.
【0047】ところで、上層レジストパタン4が一部だ
け下層レジストパタン5の上に残っていると、パタン形
成後エッチングを行う際に、上層レジストパタン4があ
る所と無い所でエッチング耐性が異なり、レジストパタ
ンが見かけ上が均一にできていても、エッチング後得ら
れるパタン線幅にばらつきが生じることがある。また、
上層レジストパタン4の裏側に回折で光が回り込み、上
からの観察では所望の線幅にできているのに、下層レジ
ストパタン5の線幅は誤差を有していることがあり、エ
ッチング後得られるパタン線幅にばらつきが生じること
もある。したがって、パタン形成後エッチングを行う前
の時点では、上層レジストパタン4は残っていないこと
が好ましい場合が多い。If the upper resist pattern 4 is partially left on the lower resist pattern 5, when etching is performed after the pattern is formed, the etching resistance differs between the place where the upper resist pattern 4 is present and the place where it is not. Even if the resist pattern is apparently uniform, the pattern line width obtained after etching may vary. Also,
The light wraps around the back side of the upper resist pattern 4 by diffraction, and the line width of the lower resist pattern 5 may have an error even though the desired line width is formed by observation from above. In some cases, the pattern line width varies. Therefore, it is often preferable that the upper resist pattern 4 does not remain before the etching is performed after the pattern is formed.
【0048】そのような場合に、上層レジスト膜3をポ
シ形のレジスト膜とした場合には、下層レジストパタン
5を形成した後、基板全面を上層レジスト露光用の露光
光線で露光し、再度、現像を行って上層レジストパタン
4を除去しても良い。ただし、現像により、下層レジス
トパタン5が損なわれないことが条件である。In such a case, when the upper resist film 3 is a posi-type resist film, after forming the lower resist pattern 5, the entire surface of the substrate is exposed to an exposure light beam for exposing the upper resist, and then again. Alternatively, development may be performed to remove the upper resist pattern 4. However, the condition is that the lower resist pattern 5 is not damaged by the development.
【0049】下層レジストパタン5が損なわれない上層
レジストパタン4の剥離液があれば、それを使用しても
良いことは言う迄もない。It is needless to say that if there is a stripping solution of the upper resist pattern 4 which does not damage the lower resist pattern 5, it may be used.
【0050】また、下層レジストパタン5を形成する時
に、上層レジスト膜3を感光させ得る露光光線を下層レ
ジスト膜2を感光させ得る露光光線に混在させ、現像時
に上層レジストパタン4を溶解除去しても良い。この場
合には、上層レジスト膜3と下層レジスト膜2の現像液
が共通でなければならないが、標準的なアルカリ現像液
を用いる上層レジスト膜3と下層レジスト膜2を選択し
て用いれば可能である。When the lower resist pattern 5 is formed, an exposure light beam for exposing the upper resist film 3 is mixed with an exposure light beam for exposing the lower resist film 2 so that the upper resist pattern 4 is dissolved and removed during development. Is also good. In this case, the developing solution for the upper resist film 3 and the developing solution for the lower resist film 2 must be common, but it is possible if the upper resist film 3 and the lower resist film 2 using a standard alkali developing solution are selected and used. is there.
【0051】なお、以上の説明では、上層レジストパタ
ン4を上層レジスト膜3に直接形成するとして説明し
た。しかしながら、上層レジストパタン4を形成する際
に任意の多層レジストプロセスを使用しても良いことは
明らかである。In the above description, the upper resist pattern 4 is formed directly on the upper resist film 3. However, it is clear that any multilayer resist process may be used when forming the upper resist pattern 4.
【0052】たとえば、上層レジストパタン4を2層レ
ジストにより形成し、該2層レジストの上層にパタンを
形成した後、前記パタンをマスクとして下層をドライエ
ッチングすることにより、上層レジストパタン4を形成
しても良い。For example, an upper resist pattern 4 is formed of a two-layer resist, a pattern is formed on the upper layer of the two-layer resist, and the lower layer is dry-etched using the pattern as a mask to form an upper resist pattern 4. May be.
【0053】下層レジスト膜2の下に、さらに別のレジ
スト膜を形成しておき、下層レジストパタン5をエッチ
ングマスクとして前記別のレジスト膜をエッチングし、
該エッチングにより形成されたレジストパタンを最終的
に基板1または被膜を形成した基板1上に形成するよう
になしても良い。Another resist film is formed under the lower resist film 2 and the another resist film is etched using the lower resist pattern 5 as an etching mask.
The resist pattern formed by the etching may be finally formed on the substrate 1 or the substrate 1 on which the coating is formed.
【0054】なお、以上の説明に使用した図1において
は、上層レジストパタン4および下層レジストパタン5
を周期的に均一に並んだパタンとして描いたが、上層レ
ジストパタン4および下層レジストパタン5とも、周期
的に均一に並んだパタンである必要はなく、任意のパタ
ンで良いことは言うまでもない。In FIG. 1 used in the above description, the upper resist pattern 4 and the lower resist pattern 5
Are drawn as patterns uniformly arranged periodically. However, it is needless to say that the upper resist pattern 4 and the lower resist pattern 5 do not need to be patterns arranged regularly uniformly, and may be arbitrary patterns.
【0055】[0055]
【発明の効果】このように、本発明によれば、最終的に
必要とするパタンを2つの原図基板に分割し、パタンを
一つおきにするなどして、転写するレジストパタンの中
心線間の最小間隔を該レジストパタンの最小線幅の3.
5倍以上とするため、例えば従来のDigest of
Papers,Micro Process '94,
pp.4−5に開示されている方法のように2光子吸収
レジストといった特別なレジストを用いることなく、上
層レジストパタン4も、下層レジストパタン5も原図パ
タンの配置ピッチを従来の約倍に大きくできる。As described above, according to the present invention, the finally required pattern is divided into two original drawing substrates, and every other pattern is alternately arranged, so that the center line of the resist pattern to be transferred is obtained. Is the minimum line width of the resist pattern.
In order to make it 5 times or more, for example, the conventional Digest of
Papers, Micro Process '94,
pp. As in the method disclosed in 4-5, without using a special resist such as a two-photon absorption resist, the arrangement pitch of the original pattern in both the upper resist pattern 4 and the lower resist pattern 5 can be made about twice as large as that in the related art.
【0056】半導体集積回路などの微細パタンを形成す
る場合、解像度は主としてパタン密集部のパタンピッチ
で決まり、パタンピッチさえ大きければ、パタン線幅は
露光量の調整によりかなり微細化できる。また、周辺の
光強度が中心の光強度より高い照明2次光源を用いた投
影露光やシフタエッジを利用した位相シフトマスクを適
用すれば、さらに微細なパタンを形成することができ
る。したがって、たとえば、上層レジストパタン4およ
び下層レジストパタン5形成時に、それぞれパタンピッ
チの1/4の線幅のパタンを形成しておけば、最終的に
得られる下層レジストパタン5として、上層レジストパ
タン4および下層レジスト膜2露光時の原図基板上のパ
タンピッチの倍ピッチの微細パタンを得ることができ
る。In the case of forming a fine pattern such as a semiconductor integrated circuit, the resolution is mainly determined by the pattern pitch of the pattern dense portion. If the pattern pitch is large, the pattern line width can be considerably reduced by adjusting the exposure amount. Further, a finer pattern can be formed by applying a projection exposure using a secondary illumination light source whose peripheral light intensity is higher than the central light intensity or a phase shift mask using a shifter edge. Therefore, for example, if a pattern having a line width of 1/4 of the pattern pitch is formed at the time of forming the upper resist pattern 4 and the lower resist pattern 5, for example, the lower resist pattern 4 is finally obtained. In addition, a fine pattern having a pitch twice the pattern pitch on the original substrate at the time of exposing the lower resist film 2 can be obtained.
【0057】形成できるパタン線幅の限界は、上層レジ
ストパタン4および下層レジストパタン5形成時にパタ
ンが形成できる限界寸法となる。一般に、パタン線幅と
スペース幅が等しくピッチの1/2であるパタンが最も
形成しにくく、十分のピッチがあれば、微細なレジスト
パタンを比較的形成し易い。本発明では、形成するレジ
ストパタンの中心線間の最小間隔を該レジストパタンの
最小線幅の3.5倍以上とするため、ピッチの1/2の
パタンが存在する場合の概ね2/3ないしは1/2程度
の線幅のパタンが形成可能である。The limit of the pattern line width that can be formed is the limit dimension at which the pattern can be formed when the upper resist pattern 4 and the lower resist pattern 5 are formed. In general, a pattern having the same pattern line width and space width and being half the pitch is most difficult to form, and if there is a sufficient pitch, it is relatively easy to form a fine resist pattern. In the present invention, since the minimum interval between the center lines of the resist pattern to be formed is set to be 3.5 times or more the minimum line width of the resist pattern, approximately 2/3 or more of the case where a pattern having a half pitch exists. A pattern having a line width of about 1/2 can be formed.
【0058】また、レジストパタンの中心線間の最小間
隔を該レジストパタンの最小線幅の4倍にとれば、下層
レジストパタン5として、ピッチの1/2の密集パタン
が形成できる。したがって、ピッチの1/2に相当する
密集パタンを同時に転写する場合に比して、転写可能な
密集パタンの最小パタン線幅およびスペース幅を2/3
ないしは1/2に小さくすることができる。When the minimum interval between the center lines of the resist pattern is set to four times the minimum line width of the resist pattern, a dense pattern having a half pitch can be formed as the lower resist pattern 5. Therefore, the minimum pattern line width and space width of the dense pattern that can be transferred are 2/3 as compared with the case where the dense pattern corresponding to 1/2 of the pitch is simultaneously transferred.
Or it can be reduced to half.
【0059】したがって、本発明を半導体集積回路や光
エレクトロニクス素子の製作等に適用すれば、大幅な集
積度の向上が図れ、ひいては、性能を大幅に向上させる
ことができる。Therefore, if the present invention is applied to the manufacture of semiconductor integrated circuits and optoelectronic devices, the degree of integration can be greatly improved, and the performance can be greatly improved.
【図1】本発明のレジストパタン形成方法の説明図。FIG. 1 is an explanatory view of a method for forming a resist pattern according to the present invention.
【図2】本発明に有効な照明2次光源形状の例。FIG. 2 is an example of a secondary illumination light source shape effective for the present invention.
【図3】本発明に有効なシフタエッジ型位相シフトマス
クの構成例。FIG. 3 is a configuration example of a shifter edge type phase shift mask effective for the present invention.
1 基板 2 下層レジスト膜 3 上層レジスト膜 4 上層レジストパタン 5 下層レジストパタン DESCRIPTION OF SYMBOLS 1 Substrate 2 Lower resist film 3 Upper resist film 4 Upper resist pattern 5 Lower resist pattern
Claims (4)
ン群に分割し、分割した各群のパタンを露光および現像
する工程を順次行う、2段階のパタン形成工程を含むレ
ジストパタン形成方法において、基板上または被膜付き
基板上に形成した下層レジスト膜および上層レジスト膜
からなる2層レジストを用い、下層レジスト膜が感光せ
ず上層レジスト膜だけが感光する波長帯の露光光線によ
り上層レジスト膜を前記の分割した第1のパタン群に対
応した形状に露光し、前記露光の後、現像を行って、該
第1のパタン群に対応した上層レジストパタンを形成す
る第1のレジストパタン形成工程を有し、前記第1のレ
ジストパタン形成工程で形成した上層レジストパタンを
ほとんど透過できず、かつ、下層レジスト膜が感光し、
第1のレジストパタン形成工程で用いる露光光線よりも
短波長帯の露光光線により、前記上層レジストパタン中
の任意のパタンと該任意のパタンに隣接するパタンとの
間に露出した下層レジスト膜を前記の分割した第2のパ
タン群に対応するパタン形状に露光し、該露光の後、現
像を行って、上層レジストパタンの直下および前記第2
のパタン群に対応するパタン形状露光の際の暗部に、下
層レジストパタンを形成する第2のレジストパタン形成
工程を有することを特徴とするレジストパタン形成方
法。1. A resist pattern forming method including a two-step pattern forming step of dividing a pattern in an exposure field into two groups of patterns, and sequentially exposing and developing the divided groups of patterns. Using a two-layer resist consisting of a lower resist film and an upper resist film formed on a substrate or a substrate with a coating, the upper resist film is exposed to light in a wavelength band in which the lower resist film is not exposed and only the upper resist film is exposed. A first resist pattern forming step of exposing to a shape corresponding to the divided first pattern group, performing development after the exposure, and forming an upper resist pattern corresponding to the first pattern group. However, the upper resist pattern formed in the first resist pattern forming step hardly penetrates, and the lower resist film is exposed,
The lower resist film exposed between an arbitrary pattern in the upper resist pattern and a pattern adjacent to the arbitrary pattern by the exposure light in a shorter wavelength band than the exposure light used in the first resist pattern forming step is used. Exposure is performed in a pattern shape corresponding to the divided second pattern group, and after the exposure, development is performed.
A second resist pattern forming step of forming a lower resist pattern in a dark portion at the time of pattern shape exposure corresponding to the above pattern group.
形成するレジストパタンの中心線間の間隔を該レジスト
パタンの最小線幅の3.5倍以上となし、第2のレジス
トパタン形成工程においてレチクルまたはマスクによっ
て形成するレジストパタンの中心線間の間隔を該レジス
トパタンの最小線幅の3.5倍以上とすることを特徴と
する、請求項1記載のレジストパタン形成方法。2. The method according to claim 1, wherein the distance between the center lines of the resist pattern formed in the first resist pattern forming step is at least 3.5 times the minimum line width of the resist pattern, and the reticle or the reticle is formed in the second resist pattern forming step. 2. The method according to claim 1, wherein the distance between the center lines of the resist pattern formed by the mask is at least 3.5 times the minimum line width of the resist pattern.
明2次光源により原図基板を照明する投影露光法を用い
て上層レジストパタンを形成する第1のレジストパタン
形成工程および/または周辺の光強度が中心の光強度よ
り高い照明2次光源により原図基板を照明する投影露光
法を用いて下層レジストパタンを形成する第2のレジス
トパタン形成工程を有することを特徴とする、請求項1
および請求項2記載のレジストパタン形成方法。3. A first resist pattern forming step of forming an upper resist pattern by using a projection exposure method of illuminating an original substrate with an illumination secondary light source whose peripheral light intensity is higher than the central light intensity and / or a peripheral resist pattern. 2. The method according to claim 1, further comprising a second resist pattern forming step of forming a lower resist pattern using a projection exposure method of illuminating the original substrate with an illumination secondary light source having a light intensity higher than the central light intensity.
And a method for forming a resist pattern according to claim 2.
て上層レジストパタンを形成する第1のレジストパタン
形成工程および/またはシフタエッジ型位相シフトマス
クを用いて下層レジストパタンを形成する第2のレジス
トパタン形成工程を有することを特徴とする、請求項1
および請求項2記載のレジストパタン形成方法。4. A first resist pattern forming step of forming an upper resist pattern using a shifter edge type phase shift mask and / or a second resist pattern forming step of forming a lower resist pattern using a shifter edge type phase shift mask. 2. The method according to claim 1, wherein
And a method for forming a resist pattern according to claim 2.
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US7582413B2 (en) | 2005-09-26 | 2009-09-01 | Asml Netherlands B.V. | Substrate, method of exposing a substrate, machine readable medium |
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US7713682B2 (en) | 2005-09-26 | 2010-05-11 | Asml Netherlands B.V. | Substrate, method of exposing a substrate, machine readable medium |
JP2008046279A (en) * | 2006-08-11 | 2008-02-28 | Dainippon Printing Co Ltd | Pattern forming body and its manufacturing method |
US8507172B2 (en) | 2007-01-31 | 2013-08-13 | Fujifilm Corporation | Positive resist composition and pattern forming method using the positive resist composition |
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KR100907898B1 (en) * | 2007-07-24 | 2009-07-14 | 주식회사 동부하이텍 | Semiconductor device manufacturing method |
US8088550B2 (en) | 2007-07-30 | 2012-01-03 | Fujifilm Corporation | Positive resist composition and pattern forming method |
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US8507174B2 (en) | 2007-08-10 | 2013-08-13 | Fujifilm Corporation | Positive resist composition, pattern forming method using the composition, and compound for use in the composition |
WO2009038148A1 (en) | 2007-09-21 | 2009-03-26 | Fujifilm Corporation | Photosensitive composition, pattern-forming method using the photosensitive composition, and compound used in the photosensitive composition |
EP2426154A1 (en) | 2007-09-21 | 2012-03-07 | Fujifilm Corporation | Photosensitive composition, pattern forming method using the photosensitive composition and compound for use in the photosensitive composition |
US9051403B2 (en) | 2007-09-21 | 2015-06-09 | Fujifilm Corporation | Photosensitive composition, pattern forming method using the photosensitive composition and compound for use in the photosensitive composition |
KR100912990B1 (en) | 2007-10-26 | 2009-08-20 | 주식회사 하이닉스반도체 | Method of forming a micro pattern in a semiconductor device |
US8119475B2 (en) | 2007-10-29 | 2012-02-21 | Hynix Semiconductor Inc. | Method of forming gate of semiconductor device |
JP2012208350A (en) * | 2011-03-30 | 2012-10-25 | Lapis Semiconductor Co Ltd | Method for forming resist pattern, method for manufacturing three-dimensional structure and method for manufacturing semiconductor device |
JP2016510515A (en) * | 2013-02-08 | 2016-04-07 | 日本テキサス・インスツルメンツ株式会社 | Method for forming a metal contact opening |
EP3033766B1 (en) * | 2013-02-08 | 2021-10-20 | Texas Instruments Incorporated | Method of forming metal contact opening |
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