GB2456775B - Apparatus and method for performing permutation operations on data - Google Patents

Apparatus and method for performing permutation operations on data

Info

Publication number
GB2456775B
GB2456775B GB0801137.1A GB0801137A GB2456775B GB 2456775 B GB2456775 B GB 2456775B GB 0801137 A GB0801137 A GB 0801137A GB 2456775 B GB2456775 B GB 2456775B
Authority
GB
United Kingdom
Prior art keywords
ordering
circuitry
data
permutation
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0801137.1A
Other versions
GB0801137D0 (en
GB2456775A (en
Inventor
Dominic Hugo Symes
Mladen Wilder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB0801137.1A priority Critical patent/GB2456775B/en
Publication of GB0801137D0 publication Critical patent/GB0801137D0/en
Priority to PCT/GB2008/003948 priority patent/WO2009092987A1/en
Priority to EP08871314A priority patent/EP2235622B1/en
Priority to CN200880125258.7A priority patent/CN101925877B/en
Priority to JP2010542674A priority patent/JP5279843B2/en
Priority to MYPI2010002199A priority patent/MY150315A/en
Priority to AT08871314T priority patent/ATE519154T1/en
Priority to KR1020107018207A priority patent/KR20100120154A/en
Priority to TW097147150A priority patent/TW200935304A/en
Priority to US12/314,760 priority patent/US8423752B2/en
Publication of GB2456775A publication Critical patent/GB2456775A/en
Priority to IL206176A priority patent/IL206176A0/en
Application granted granted Critical
Publication of GB2456775B publication Critical patent/GB2456775B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
    • G06F7/26—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general the sorted data being recorded on the original record carrier within the same space in which the data had been recorded prior to their sorting, without using intermediate storage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/764—Masking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/768—Data position reversal, e.g. bit reversal, byte swapping
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

An apparatus for processing data is provided comprising processing circuitry having permutation circuitry for performing permutation operations, a register bank having a plurality of registers for storing data and control circuitry responsive to program instructions to control the processing circuitry to perform data processing operations. The control circuitry is arranged to be responsive to a control-generating instruction to generate in dependence upon a bit-mask control signals to configure permutation circuitry for performing permutation operation on an input operand. The bit-mask identifies within the input operand the first group of data elements having a first ordering and a second group of data elements having a second ordering and the permutation operation is such that it preserves one of the first ordering and the second ordering but changes the other of the first ordering and the second ordering.
GB0801137.1A 2008-01-22 2008-01-22 Apparatus and method for performing permutation operations on data Expired - Fee Related GB2456775B (en)

Priority Applications (11)

Application Number Priority Date Filing Date Title
GB0801137.1A GB2456775B (en) 2008-01-22 2008-01-22 Apparatus and method for performing permutation operations on data
AT08871314T ATE519154T1 (en) 2008-01-22 2008-11-26 APPARATUS AND METHOD FOR PERFORMING PERMUTATION OPERATIONS ON DATA
EP08871314A EP2235622B1 (en) 2008-01-22 2008-11-26 Apparatus and method for performing permutation operations on data
CN200880125258.7A CN101925877B (en) 2008-01-22 2008-11-26 Apparatus and method for performing permutation operations on data
JP2010542674A JP5279843B2 (en) 2008-01-22 2008-11-26 Apparatus and method for performing permutation operations on data
MYPI2010002199A MY150315A (en) 2008-01-22 2008-11-26 Apparatus and method for performing permutation operations on data
PCT/GB2008/003948 WO2009092987A1 (en) 2008-01-22 2008-11-26 Apparatus and method for performing permutation operations on data
KR1020107018207A KR20100120154A (en) 2008-01-22 2008-11-26 Apparatus and method for performing permutation operations on data
TW097147150A TW200935304A (en) 2008-01-22 2008-12-04 Apparatus and method for performing permutation operations on data
US12/314,760 US8423752B2 (en) 2008-01-22 2008-12-16 Apparatus and method for performing permutation operations in which the ordering of one of a first group and a second group of data elements is preserved and the ordering of the other group of data elements is changed
IL206176A IL206176A0 (en) 2008-01-22 2010-06-03 Apparatus and method for performing permutation operations on data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0801137.1A GB2456775B (en) 2008-01-22 2008-01-22 Apparatus and method for performing permutation operations on data

Publications (3)

Publication Number Publication Date
GB0801137D0 GB0801137D0 (en) 2008-02-27
GB2456775A GB2456775A (en) 2009-07-29
GB2456775B true GB2456775B (en) 2012-10-31

Family

ID=39166156

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0801137.1A Expired - Fee Related GB2456775B (en) 2008-01-22 2008-01-22 Apparatus and method for performing permutation operations on data

Country Status (11)

Country Link
US (1) US8423752B2 (en)
EP (1) EP2235622B1 (en)
JP (1) JP5279843B2 (en)
KR (1) KR20100120154A (en)
CN (1) CN101925877B (en)
AT (1) ATE519154T1 (en)
GB (1) GB2456775B (en)
IL (1) IL206176A0 (en)
MY (1) MY150315A (en)
TW (1) TW200935304A (en)
WO (1) WO2009092987A1 (en)

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US9772848B2 (en) * 2014-11-14 2017-09-26 Intel Corporation Three-dimensional morton coordinate conversion processors, methods, systems, and instructions
US9772849B2 (en) * 2014-11-14 2017-09-26 Intel Corporation Four-dimensional morton coordinate conversion processors, methods, systems, and instructions
US9785437B2 (en) * 2014-12-23 2017-10-10 Intel Corporation Method and apparatus for performing a vector bit reversal and crossing
US10013253B2 (en) * 2014-12-23 2018-07-03 Intel Corporation Method and apparatus for performing a vector bit reversal
US10459723B2 (en) * 2015-07-20 2019-10-29 Qualcomm Incorporated SIMD instructions for multi-stage cube networks
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US20170177355A1 (en) * 2015-12-18 2017-06-22 Intel Corporation Instruction and Logic for Permute Sequence
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Also Published As

Publication number Publication date
EP2235622A1 (en) 2010-10-06
JP5279843B2 (en) 2013-09-04
ATE519154T1 (en) 2011-08-15
MY150315A (en) 2013-12-31
IL206176A0 (en) 2010-12-30
EP2235622B1 (en) 2011-08-03
CN101925877A (en) 2010-12-22
CN101925877B (en) 2014-04-23
GB0801137D0 (en) 2008-02-27
JP2011510389A (en) 2011-03-31
US8423752B2 (en) 2013-04-16
TW200935304A (en) 2009-08-16
US20090187746A1 (en) 2009-07-23
WO2009092987A1 (en) 2009-07-30
GB2456775A (en) 2009-07-29
KR20100120154A (en) 2010-11-12

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732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20141204 AND 20141211

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20240122