EP0170072A1 - Phased-array apparatus - Google Patents

Abstract

Phased-array apparatus has a number of ultrasonic transducer elements (E1 to E64) to which are associated delay line elements (M1, T1 to M64, T64, W1-1, W1-2, N1 to W16-1, W16-2, N16; W1 to W16; VL1 to VL64, VR1 to VR16) to provide reception. In order that the control angle may be adjusted with high accuracy, according to the inventive principles delay line elements are provided for the received signals with a short and with a long delay, and several adjacent channels are combined for signal processing. Due to this arrangement, economical constructions of embodiments of the invention are realized.

Description

The invention relates to a phased array device according to the preamble of claim 1.

In the case of a phased array device, that is to say an electronic sector scanner, the change in the delay in the signals of the individual ultrasound transducer elements in the case of transmission and reception must be carried out in very small steps in order to avoid errors in the adjustment of the control angle. As a result of the largest control angle of usually ± 45 ^* with respect to the normal to the row of transducer elements, relatively long delay times are required for large control angles, the length of which also strongly depends on the selected aperture length (length of the active antenna). In order to compensate for the change in resolution with the depth due to the limited depth of focus of the focused aperture, it is expedient to adapt the receiving focus continuously.

The prior art provides for setting the delay times with the aid of LC delay lines which are provided with setting taps. This relatively inexpensive solution is particularly suitable for short delay times, ie for non-pivoting scanning devices, for example for a linear array. With longer delay times, the LC delay lines have a band-limiting effect for higher frequencies. They each represent a low-pass filter whose corner frequency can be approximately 5 MHz. At the same time, component tolerances greatly affect the accuracy of the overall deceleration. For this For this reason, LC delay lines for transducer or converter frequencies are generally only used up to approx. 3.5 MHz. This technique is also called "baseband technique".

Higher transducer frequencies can be processed using LC delay lines by downmixing to an intermediate frequency below 3.5 MHz. However, downmixing technology requires a constant signal bandwidth and transmission pulse length for the individual converter signals. The temporal transmission pulse length should however changed in the interest of good resolution in the transition to high transducer frequencies, ie comparable rin ^g ert.

Another possible implementation is provided by surface wave filter technology or SAW filter technology (see e.g. Ultrasonics, Vol. 17, pp. 225 - 229, Sept. 1979). For this purpose, it is necessary to mix the received signal of the individual ultrasound transducer element upwards in order to get into the high frequency band of 20-50 MHz required in SAW technology. After the summation of the individual received signals of the phased array, it must then be mixed again. Disadvantages of the SAW technology are the fact that up-mixers have to be used in each channel, which means a considerable outlay, and the difficulty in achieving a sufficiently fine gradation of the delay times for the SAW filters.

Upward and downward mixtures in connection with a phased array device are known, for example, from FIG. 11 of DE-PS 28 54 134. A digital delay technique in a phased array device is described in EU-PS 0,027,618, in particular in FIGS. 1 and 2. When designing a phased array device, the following points should also be considered:

Assuming, for example, in a medical examination a center frequency of the reception spectrum of f _S = 3.5 MHz and theoretically considering a bandwidth Δf = f (2λ pulse), the maximum frequency obtained is ^f smax ⁼ f _s ⁺ Δf / 2 ^{= 1.5 f} _s = 5.25 MHz. The result according to the known sampling theorem, a sampling frequency of Shannon for the individual ultrasonic transducer element of f _a> ^{2 f} _{smax =} ^{3 f} _s = ^10, 5 MHz. This sampling frequency fa is therefore the minimum frequency in order to be able to reconstruct the individual signal of a converter element.

A sampling with at least 1/8 of the wavelength is required for the quantization of the phase, ie a sufficient accuracy of the time delay between two adjacent transducer elements. This results in a quantized phase shift within the wavelength λ of 360 ° / 8 = 45 ° or (± 22.5 °). With a center frequency f _S = 3.5 MHz, a time delay of 35.7 nsec is obtained, ie + 17.9 nsec. This phase or time accuracy requires a sampling frequency f _a > 28 MHz if the signal is to be processed digitally (EU-PS 0.027.618). This high sampling frequency nowadays requires the use of ECL devices and leads to a relatively expensive phased array device.

One way out of this speed problem is quadrature technology (cf. DE-PS 28 54 134, FIG. 8), in which two delay channels are used that are phase-shifted by 90 °. Here the minimum sampling frequency is f _a = 10.5 MHz. This allows the use of energy-saving techniques (e.g. HCMOS, Low Power Schottky). Quadrature technology, however, requires a relatively high level of effort, since two channels per converter element are required for signal processing.

The aim of the invention is to provide a phased array device which enables a high degree of accuracy in the adjustment of the control angle and yet only requires a comparatively small outlay.

This object is inventively achieved in that the Verzögerungsbauglieder provide the received signals with a short and _e, -.er long delay. Then it is possible to combine several adjacent channels, eg 4, for signal processing.

A first basic embodiment is characterized in that the ultrasonic transducer elements are connected to first delay elements for the analog fine delay of the received signals, that a predetermined number of elements is connected to a common summing element, that the output signals of the summing elements are fed to second delay elements for coarse delay, and that the output signals emitted by the second delay elements are fed to a digital adder, at the output of which a sum signal is emitted which is provided for image display.

A second basic embodiment is characterized in that a TGC amplifier and an analog-digital converter module are connected downstream of the ultrasonic transducer elements.

It is considered an advantage of the invention that the respective control angle can be set very precisely because of the use of components with fixed component-specific delay times (tolerances) and the digital memory, especially some shift registers. The delay does not drift even after the phased array device has been used for a long time fear. As a result of the high accuracy in the setting of the control angle, there is also a high level of accuracy in the focusing and thus a high resolving power. This is of particular interest when using concurrent focusing in the case of reception.

• Fig. 1 eine erste Ausführungsform, bei der sowohl von einer analogen als auch von einer digitalen Verzögerung Gebrauch gemacht wird;
• Fig. 2 eine zweite Ausführungsform, die gegenüber der Ausführungsform nach Figur 1 vereinfacht aufgebaut ist; und
• Fig. 3 eine dritte Ausführungsform, die auf einem voll digitalen Verzögerungskonzept beruht.

Embodiments of the invention are shown in three figures and are explained in more detail below. Show it:

• 1 shows a first embodiment in which use is made of both an analog and a digital delay;
• Fig. 2 shows a second embodiment, which is simplified compared to the embodiment of Figure 1; and
• Fig. 3 shows a third embodiment, which is based on a fully digital delay concept.

The phased array device according to FIG. 1, which is used in particular for medical imaging, consists of a large number of individual ultrasound transducer elements E1, E2,... E64, which are used both for the emission and for the reception of ultrasound signals be used. In Figure 1, only the receiving part of the phased array device is shown. In such a device, the received ultrasound signals must be delayed with the high accuracy described above. In order to avoid antenna grating interference (grating lobes) and to achieve sufficient resolution, the number of ultrasonic transducer elements should be large. As cheaper Compromise here is the number 64 with an element spacing of λ / 2.

In order to keep the effort low, which would result from using a delay concept with the phase accuracy specified above, it is provided according to FIG. 1 that the received ultrasound signals are provided with a short and a long delay. This makes it possible to combine adjacent signal processing channels. As will become clear later, 4 channels are combined in FIG. 1.

According to FIG. 1, the device contains a mixed delay technique, namely an analog pre-delay and a digital main delay. So it's a hybrid solution. The analog pre-delay is a fine delay. It takes place in an area labeled X. A total of 64 channels are provided in this area X. The fine deceleration takes place between 0 and 2λ. The area X is followed by an area Y which comprises only 16 channels. In this area Y there are amplifiers that can be controlled as a function of depth. Area Y is followed by area Z, which also comprises 16 channels. There is a long-term delay here.

Experiments have shown that medical examinations with an electronic sector scanner require total delay times which are in the range of 6 to 12 psec. In the present case, based on these values, the fine delay in the area X assumes a delay of 0 to 600 nsec, and the coarse delay in the area Z assumes a delay between 5.4 and 11.4 psec.

According to FIG. 1, each ultrasound transducer element E1 to E64 is followed by a preamplifier V1 to V64 with a fixed gain. These preamplifiers V1 to V64 are each followed by a multiplexer M1 to M64. The respective multiplexer M can be supplied with clock pulses by a control device C, which is indicated by an arrow on the respective block M1 to M64. An analog pre-delay element T1 to T64 is assigned to the multiplexers M1 to M64. Its delay time, in particular in the range from 0 to 600 nsec, can be set using the associated multiplexer M1 to M64. The delay elements T1 to T64 can in particular be LC lines with a number of taps, e.g. Trade 16 taps. With such LC lines there is a delay which is precise enough for the present purposes.

With the help of the multiplexers M1 to M64, the fine deceleration is dynamic, i.e. switchable while receiving each ultrasound line. In this way, dynamic focusing can be achieved.

The signal processing of four adjacent ultrasound elements E1 to E64 is summarized in the present case. For this purpose, the delay elements Tl to T4 are connected to a common summing element S1. Correspondingly, the delay elements T61 to T64 are also connected to a common summing element S16. As stated, the fine delay comprises the time period of at least 2λ in order to be able to combine four such neighboring elements. The value 2λ is an empirically found variable. It represents a compromise that can be applied to most ultrasound applicators based on the phased array principle. Instead of four channels could also be combined two, six or eight channels each. After the summation of the signals from four adjacent channels in the summing elements S1 to S16, the combined received signal obtained in this way is amplified depending on the depth with the aid of controllable amplifiers TGC1 to TGC16, in order then to be able to use the A / D converter dynamics.

Im einzelnen wird nach Figur 1 das Ausgangssignal des Verstärkers TGC1 einem Verzögerungsglied zugeführt, welches aus einem Speicher N1 und zwei diesem vorgeschalteten Analog-Digital-Wandlern Wl-1 und Wl-2 besteht. Der erste Wandler Wl-1 ist mit einer Taktfrequenz f beaufschlagt, die beispielsweise der eingangs genannten Abtastfrequenz f_a = 10,5 MHz gleich ist. Der zweite Wandler Wl-2 wird mit derselben Taktfrequenz getaktet, jedoch ist das Taktsignal gegenüber demjenigen des ersten Wandlers Wl-1 um 90° verschoben. Dies wird dadurch zum Ausdruck gebracht, daß die Frequenzen mit f( ρ = 0') bzw. f( i = 90°) bezeichnet sind. Die beiden Wandler bewirken eine Zerlegung des Empfangssignals in einen Real- und einen Imaginärteil. Der Wandler Wl-1 erzeugt dabei den In-Phase-Term oder Kosinus-Anteil, während der Wandler Wl-2 den Quadratur-Term oder Sinus-Anteil bereitstellt. Der nachgeschaltete Speicher _Nl ist vorzugsweise ein Schieberegister. Dieses wird z.B. in λ/8-Schritten abgetastet, wozu ihm von der Steuereinrichtung C entsprechende Steuerimpulse zugeführt werden.After the amplification in the amplifiers TGC1 to TGC16, there are two implementation options, which are shown separately in FIGS. 1 and 2. According to FIG. 1, the received signal is sampled using the quadrature method, ie in complex form. As a result, the phase accuracy of the entire delay unit remains constant, for example λ / 12 if

1, the output signal of the amplifier TGC1 is fed to a delay element, which consists of a memory N1 and two analog-digital converters Wl-1 and Wl-2 connected upstream thereof. A clock frequency f is applied to the first converter Wl-1, which is, for example, the sampling frequency f _a = 10.5 MHz mentioned at the beginning. The second converter Wl-2 is clocked at the same clock frequency, but the clock signal is shifted by 90 ° with respect to that of the first converter Wl-1. This is expressed in that the frequencies are denoted by f (ρ = 0 ') or f (i = 90 °). The two converters break down the received signal into a real and an imaginary part. The converter Wl-1 generates the in-phase term or cosine component, while the converter Wl-2 provides the quadrature term or sine component. The downstream memory _N 1 is preferably a shift register. This is scanned, for example, in λ / 8 steps, for which purpose the control device C supplies appropriate control pulses.

The coarse delay elements, which are connected downstream of the further amplifiers TGC2 to TGC16, are constructed accordingly. There are a total of 16 memories N1 to N16. On the output side, these are jointly connected to an adder A. The memories N1 to N16, in cooperation with the upstream analog-digital converters Wl-1 to W16-2, are used for long-term delays. With their help, the pivoting or deflection angle in particular can be set in a phased array device.

der Betrag des Signals bilden, der auf einem Bildschirm dargestellt werden kann.The output signal of the adder A consists of an imaginary part i and a real part q, so it is complex. From these two parts i and q one can determine the relationship

form the amount of signal that can be displayed on a screen.

bestimmt. Bei einer Abtastfrequenz

The embodiment of FIG. 2 largely corresponds to that of FIG. 1. However, in the present case the second delay elements are constructed differently, ie more simply. This simplified embodiment thus allows a certain ripple, although it should be noted that this is irrelevant for the image quality. In contrast to FIG. 1, the combined received signal is not sampled using the quadrature method, but rather in one channel. For this purpose, each channel has a series connection of an analog-digital converter W1 to W16 with a memory N1 to N16 controlled by a control device C '. The analog-to-digital converter W1 to W16 is each subjected to a sampling frequency f by the control device C '. This is preferably somewhat higher than the previously stated value of 10.5 MHz. Theoretical studies have shown that the frequency f can be below 20 MHz. The phase accuracy of the digital chain is determined by the sampling frequency

certainly. At a sampling frequency

For example, to obtain a Phasengenaui ^g speed of λ /. 5

According to the G.F. Manez: "Design of a simplified delayed system for ultrasound phased array imaging" in IEEE Transactions on Sonics and Ultrasonics, Vol. SU-30, No. 6, page 350f, a coarser quantization of the delay is sufficient for the individual delay elements W1, N1 to W16, N16 if the carrier is decelerated sufficiently precisely by a fine delay. This is the case here due to the fine deceleration in area X.

in Figur 1 entspricht.At the output of the adder A connected downstream of the delay elements W1, N1 to W16, N16, an absolute value signal s is automatically obtained which corresponds to the value

in Figure 1 corresponds.

FIG. 3 shows a fully digitized implementation of a delay concept, the delay in a phased array device again being divided into a fine delay (see area X) and a coarse delay (see area Z). In the present exemplary embodiment, 64 channels are again provided in the area X of the fine delay, while only 16 processing channels are provided in the subsequent coarse delay area Z.

After 3 shows the ultrasonic transducer elements 64 is El to E ₆ 4 downstream (with only digital realization of the delay) each having a depth compensation amplifier TV1 to TV64. These depth compensation amplifiers can be regulated and correspond to the amplifiers TGC1 to TGC16 of FIGS. 1 and 2. Thus, the received signal of each element E1 to E64 is amplified depending on the depth. It will then help of an analog-digital converter AD1 to AD64 digitized. In the present case, these analog-digital converters AD1 to AD64 are operated at a higher frequency than those in FIGS. 1 and 2, for example at a frequency f 'of 28 MHz, in order to be able to work with λ / 8. However, such a high frequency means that the components should be designed using ECL technology. It is assumed in the present case that the A / D conversion is carried out with a relatively high sampling frequency, which can also be greater than 28 MHz. In deviation from this, it can also be carried out according to the quadrature method, which is not shown in FIG. 3.

In order to reduce the expenditure on digital elements, in particular on bus lines, the present purely digital solution is divided into a fine delay using 64 shift registers VL1 to VL64 and a coarse delay using 16 shift registers VR1 to VR16. The shift registers VL1 to VL64 and VR1 to VR16 are, in particular, shift registers with a variable length. For example, each of the shift registers VL1 to VL64 can comprise a total of 16 stages, while each of the shift registers VR1 to VR16 contains four times these 16 stages. In other words, the same basic building blocks can be used in both types of shift registers.

The function of the shift registers VL1 to VL64 corresponds to a combination of the multiplexers Ml to M64 and the time delay elements Tl to T64 from FIG. 1. The output of four such shift registers, for example VL1 to V14, each of which leads to neighboring ultrasonic transducer elements, for example E1 to E4 belong, are each connected together to a summing element S1 to S16. Instead of a combination of four channels each, another number can be used, for example a number of 8 channels. The delay times of the individual shift registers VL1 to VL64 can be changed under computer control during the reception of an ultrasound line, in particular in order to achieve dynamic focusing. For this purpose, their control inputs are connected to a control device C ".

It should therefore be noted that a predetermined number of data channels is also combined here in each case with the aid of summing elements S1 to S16.

The outputs of the individual summing elements S1 to S16 are each connected to an addition element AGL via an assigned shift register VR1 to VR16, which bring about the longer of the two delays. This sums up the individual summarized and delayed signals. At its output there is an output signal s' which is high-frequency compared to that of FIGS. 1 and 2. This high-frequency output signal s' corresponds to the amount and can be used for the image display. However, the two signal components i and q could also be derived from this high-frequency output signal s'.

The embodiment according to FIG. 3 also results in precise setting and control of the delay. Here, too, the swivel can again be effected via the delay elements for the large delay, i.e. the shift registers VR1 to VR16 can be set.

Claims (11)

1. Phased array device for the ultrasound scanning of an object, with a number of ultrasound transducer elements to which delay elements are assigned at least for the reception case, characterized in that the delay elements (M1, Tl to M64, T64, Wl-1 , Wl-2, N1 to W16-1, W16-2, N16; Wl to W16; VL1 to VL64, VRl to VR16) provide the received signals with a short and a long delay (FIGS. 1 to 3). 2. Phased array device according to claim 1, characterized in that the ultrasonic transducer elements (E1 to E64) are connected to first delay elements (M1, Tl to M64, T64) for the analog fine delay of the received signals, that a predetermined number of each Members (M1, Tl to M64, T64) is connected to a common summing element (S1 to S16) that the output signals of the summing elements (Sl to S16) are second delay elements (Wl-1, Wl-2, N1 to W16-1, W16 -2, N16; Wl, Nl to W16, N16) are supplied for the coarse delay, and that of the second delay members (Wl-1, Wl-2, N1 to W16-1, W16-2, N16; W1, N1 to W16, N16) output signals are supplied to a digital adder (A), at the output of which a sum signal (i, q; s) is output, which is provided for image display (FIGS. 1 and 2). 3. Phased array device according to claim 2, characterized in that a multiplexer (Ml to M64) and a LC line (Tl to T64) controlled by this are provided as the first delay components (Fig. 1). 4. Phased array device according to claim 2 or 3, characterized in that a memory (N1 to N16) is provided as the second delay members, the two analog-digital converters (Wl-1, Wl-2 to W16-1 , W16-2) are connected upstream, which are controlled with clock signals of a predetermined frequency (f (ρ = 0 °), f (ρ = 90 °)), which are 90 ° out of phase with each other (FIG. 1). 5. Phased array device according to claim 2 or 3, characterized in that a memory (N1 to N16) is provided as the second delay members, which is preceded by an analog-to-digital converter (Wl to W16) which is predetermined with clock signals Sampling frequency (f ≥ f _a ) is controlled (Fig. 2). 6. Phased array device according to claim 2, characterized in that the ultrasonic transducer elements (E1 to E64) each have TGC amplifiers (TV1 to TV64) and an analog-to-digital converter module (AD1 to AD64) connected downstream (Fig. 3). 7. Phased array device according to claim 2 or 6, characterized in that the analog-digital converter module (AD1 to AD64) is an analog-digital converter which is sampled with a high sampling frequency (f _a = f ') ( Fig. 3). 8. Phased array device according to claim 2 or 6, characterized in that the analog-digital converter module (AD1 to AD64) is a module according to the quadrature method. 9. Phased array device according to claim 2 or one of claims 6 to 8, characterized in that the ultrasonic transducer elements (E1 to E64) are each followed by a delay element (VL1 to VL64), and in that a number of these delay elements (VL1 to VL64) are each connected together to a summing element (S1 to S16) (Fig. 3). 10. Phased array device according to claim 2, characterized in that the delay element (VL1 to VL64) is a shift register with a variable length (Fig. 3). 11. Phased array device according to claim 9 or 10, characterized in that the individual summing elements (Sl to S16) are each connected via a further delay element (VR1 to VR16) to a common adder (AG) (Fig. 3).

Images