CN111863596A - Manufacturing process of copper column and thick film copper plating structure of wafer - Google Patents

Manufacturing process of copper column and thick film copper plating structure of wafer Download PDF

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Publication number
CN111863596A
CN111863596A CN202010708050.0A CN202010708050A CN111863596A CN 111863596 A CN111863596 A CN 111863596A CN 202010708050 A CN202010708050 A CN 202010708050A CN 111863596 A CN111863596 A CN 111863596A
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Prior art keywords
wafer
copper
coating
front surface
manufacturing process
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CN202010708050.0A
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CN111863596B (en
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严立巍
李景贤
陈政勋
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Shaoxing Tongxincheng Integrated Circuit Co ltd
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Shaoxing Tongxincheng Integrated Circuit Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02016Backside treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02697Forming conducting materials on a substrate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The invention discloses a manufacturing process of a copper column and a thick film copper-plated structure of a wafer, and belongs to the field of wafer processing. A manufacturing process of a copper pillar and a thick film copper-plated structure of a wafer comprises the following steps: completing PAD wiring on the front side of the wafer, and forming a copper seed layer on the PAD wiring layer; grinding the front side of the wafer, thinning the middle part of the back side of the wafer through grinding or etching, and coating a first polyimide coating on the back side of the wafer; coating photoresist, exposing and developing the front surface of the wafer, and forming a region where copper columns need to be arranged on the front surface of the wafer; and plating copper on the area to form a copper pillar. Coating a polyimide coating on the front surface of the wafer; and forming the metal coating film on the back surface of the wafer through metal evaporation or metal sputtering. Compared with the prior art, the manufacturing process can form better stress buffering, and the front side and the back side of the wafer can be welded or connected with the packaging radiating fins through routing.

Description

Manufacturing process of copper column and thick film copper plating structure of wafer
Technical Field
The invention relates to the field of wafer processing, in particular to a manufacturing process of a copper column and a thick film copper-plated structure of a wafer.
Background
In the conventional ultra-thin wafer for high power semiconductor device, the best heat dissipation effect is usually achieved by forming a thick copper film on the metalPAD. However, if the back surface is thinned after plating thick copper film, the front surface will have large step (topologheight), and the step and the stress distribution of each region on the front surface will easily cause wafer breakage. Therefore, the front surface of the wafer is difficult to overcome by tape or Glass carrier bonding, so that the wafer is difficult to be thinned to a thickness of 100 microns or less in the back surface thinning process of the wafer.
In another technical route, the front side is difficult to be successfully manufactured due to the warpage (warp) problem of the ultra-thin wafer when the back side is thinned and then the front side is turned over to manufacture the yellow light process and the electroplated thick film copper.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a manufacturing process of a copper column and a thick film copper plating structure of a wafer.
The purpose of the invention can be realized by the following technical scheme:
a manufacturing process of a copper pillar structure and a thick film copper plating structure of a wafer comprises the following steps:
completing PAD wiring on the front side of the wafer, and forming a copper seed layer on the PAD wiring layer;
Applying a protective adhesive tape on the front surface of a wafer, grinding the front surface of the wafer, and tearing off the protective adhesive tape;
and thinning the middle part of the back surface of the wafer by grinding or etching to ensure that the back surface of the wafer is thin in the center and thick at the edge.
Coating a first polyimide coating on the back of the wafer, and heating and baking to remove a volatile solvent;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region where copper columns need to be arranged on the front surface of the wafer;
plating copper on the area to form a copper column; and removing the photoresist and the copper seed layer outside the area.
Coating a second polyimide coating on the front surface of the wafer, and forming a metal welding window of the copper column and the packaging lead through exposure and development; then removing the first polyimide coating on the back surface of the wafer;
heating and curing the second polyimide coating on the front surface of the wafer, and removing the oxide layer on the back surface of the wafer by using hydrofluoric acid;
and forming the metal coating film on the back surface of the wafer through metal evaporation or metal sputtering.
A manufacturing process of a copper pillar and a thick film copper-plated structure of a wafer comprises the following steps:
completing PAD wiring on the front side of the wafer, and forming a copper seed layer on the PAD wiring layer;
Applying a protective adhesive tape on the front surface of a wafer, grinding the front surface of the wafer, and tearing off the protective adhesive tape;
thinning the middle part of the back surface of the wafer by grinding or etching to ensure that the back surface of the wafer is thin in the center and thick at the edge;
then, coating a first polyimide coating on the back surface of the wafer, and heating and baking to remove a volatile solvent;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region where copper columns need to be arranged on the front surface of the wafer;
copper is plated on the area to form a copper column or a copper sheet; then removing the photoresistance and the copper seed layer outside the area;
carrying and supporting the wafer by using an electrostatic carrier plate, and removing an oxide layer on the back of the wafer by using hydrofluoric acid;
and forming a metal coating film on the back surface of the wafer through metal evaporation or metal sputtering.
Further, the wafer is thinned to 200-300 microns.
Further, the thickness of the coating photoresist layer is larger than the height of the copper pillar.
Further, the thickness of the polyimide coating on the front surface of the wafer and/or the metal back surface is more than 20 microns.
Further, the polyimide coating is removed by oxygen plasma or organic solvent development or by blanket exposure development.
The invention has the beneficial effects that:
the wafer with the thin center and the thick edge is combined with the polyimide coating on the back of the wafer to form a flat wafer process structure, so that the wafer cannot be easily broken and is convenient to carry and transmit. On the other hand, after the copper column is formed, the polyimide coating is coated on the front surface, then the polyimide coating on the back surface of the wafer is removed, and the metal coating on the back surface is finished.
Drawings
The invention will be further described with reference to the accompanying drawings.
FIG. 1 is a diagram illustrating the process structure after completing the PAD layout;
FIG. 2 is a schematic view of the process configuration for completing the application of the first polyimide coating;
FIG. 3 is a schematic view of the process structure after completing photoresist coating according to the present application;
FIG. 4 is a schematic diagram of a process structure after forming a copper pillar according to the present application;
FIG. 5 is a schematic diagram of the process structure after removing the photoresist according to the present application;
FIG. 6 is an enlarged partial schematic view at A of FIG. 5 of the present application;
FIG. 7 is a schematic diagram of a process for removing a portion of a copper seed layer according to the present application;
FIG. 8 is an enlarged partial schematic view at B of FIG. 7 of the present application;
FIG. 9 is a schematic view of the process configuration for applying a second polyimide coating according to the present application;
FIG. 10 is a schematic view of the process of forming a metal solder window according to the present application;
FIG. 11 is a schematic view of the structure of the process for forming a metal plating film according to the present application;
fig. 12 is an enlarged schematic view of the structure at C in fig. 11 of the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "opening," "upper," "lower," "thickness," "top," "middle," "length," "inner," "peripheral," and the like are used in an orientation or positional relationship that is merely for convenience in describing and simplifying the description, and do not indicate or imply that the referenced component or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be considered as limiting the present invention.
As shown in fig. 1-12, the present invention discloses a manufacturing process of copper pillar structure and thick film copper plated structure of wafer, in one embodiment of the present application, in order to form the copper pillar 6 structure on the wafer 1 and perform thick film copper plating, the following steps can be performed in sequence:
firstly, completing a PAD wiring 2 on the front surface of a wafer 1, and forming a copper seed layer 3 on the PAD wiring 2 layer;
applying a protective adhesive tape on the front surface of the wafer 1, grinding the front surface of the wafer 1, and tearing off the protective adhesive tape;
the middle part of the back surface of the wafer 1 is thinned through grinding or etching, so that the back surface of the wafer 1 is thin in the center and thick at the edge. In particular, the cross section of the wafer 1 thus obtained may be, for example but not limited to, ramp-shaped or stepped. Wherein the thinnest part of the wafer 1, namely the thickness of the middle part of the wafer 1 can reach 40-100 microns; the thickest part of the wafer 1, that is, the edge of the wafer 1, may have a thickness of 5-8 mm. Therefore, the thickness requirement of the middle part of the wafer 1 is met, the edge part can bear larger stress, and the wafer 1 is effectively prevented from being broken during processing.
Coating a first polyimide coating 4 on the back surface of the wafer 1, and heating and baking to remove a volatile solvent; specifically, the first polyimide coating 4 on the back surface of the wafer 1 may be removed by oxygen plasma or organic solvent rinsing, or by blanket exposure development.
Coating photoresist 5, exposing and developing the front surface of the wafer 1, and forming a region where copper columns 6 need to be arranged on the front surface of the wafer 1;
copper is plated on the area to form a copper column 6; the photoresist 5 is removed, as well as the copper seed layer 3 outside the area. At this point, the copper pillar 6 on the front surface of the wafer 1 is completed.
And coating a second polyimide coating 7 on the front surface of the wafer 1, and forming a copper column 6 and a metal welding window 8 for packaging a lead through exposure and development.
Heating and curing the second polyimide coating 7 on the front surface of the wafer 1, and removing the oxide layer on the back surface of the wafer 1 by using hydrofluoric acid;
the metal plating film 9 on the back surface of the wafer 1 is formed by metal evaporation or metal sputtering.
In another embodiment of the present invention, another manufacturing process of a copper pillar structure and a thick film copper plated structure of a wafer is further provided, which includes the following steps:
completing a PAD wiring 2 on the front surface of the wafer 1, and forming a copper seed layer 3 on the PAD wiring 2 layer;
applying a protective adhesive tape on the front surface of the wafer 1, grinding the front surface of the wafer 1, and tearing off the protective adhesive tape;
thinning the middle part of the back surface of the wafer 1 by grinding or etching to ensure that the back surface of the wafer 1 is thin in the center and thick at the edge;
coating a first polyimide coating 4 on the back surface of the wafer 1, and heating and baking to remove a volatile solvent;
Coating photoresist 5, exposing and developing the front surface of the wafer 1, and forming a region where copper columns 6 need to be arranged on the front surface of the wafer 1;
copper is plated on the area to form a copper column 6; removing the photoresist 5 and the copper seed layer 3 outside the region;
different from the previous embodiment of the present disclosure, in the present embodiment, an electrostatic carrier is used to carry and support the wafer 1, and hydrofluoric acid is used to remove the oxide layer on the back surface of the wafer 1;
the metal plating film 9 on the back surface of the wafer 1 is formed by metal evaporation or metal sputtering.
Further, the wafer 1 is thinned to 200-300 μm.
Further, the thickness of the coating photoresist 5 is greater than the height of the copper pillar 6.
Further, the thickness of the polyimide coating on the front side and/or the metal back side of the wafer 1 is greater than 20 microns.
Further, the polyimide coating is removed by oxygen plasma or organic solvent development or by blanket exposure development.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.

Claims (6)

1. A manufacturing process of a copper pillar structure and a thick film copper plating structure of a wafer is characterized by comprising the following steps:
completing PAD wiring on the front side of the wafer, and forming a copper seed layer on the PAD wiring layer;
applying a protective adhesive tape on the front surface of a wafer, grinding the front surface of the wafer, and tearing off the protective adhesive tape;
thinning the middle part of the back surface of the wafer by grinding or etching to ensure that the back surface of the wafer is thin in the center and thick at the edge;
coating a first polyimide coating on the back of the wafer, and heating and baking to remove a volatile solvent;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region where copper columns need to be arranged on the front surface of the wafer;
Plating copper on the area to form a copper column; removing the photoresist and the copper seed layer outside the region;
coating a second polyimide coating on the front surface of the wafer, and forming a metal welding window of the copper column and the packaging lead through exposure and development; then removing the first polyimide coating on the back surface of the wafer;
heating and curing the second polyimide coating on the front surface of the wafer, and removing the oxide layer on the back surface of the wafer by using hydrofluoric acid;
and forming the metal coating film on the back surface of the wafer through metal evaporation or metal sputtering.
2. A manufacturing process of a copper pillar structure and a thick film copper plating structure of a wafer is characterized by comprising the following steps:
completing PAD wiring on the front side of the wafer, and forming a copper seed layer on the PAD wiring layer;
applying a protective adhesive tape on the front surface of a wafer, grinding the front surface of the wafer, and tearing off the protective adhesive tape;
thinning the middle part of the back surface of the wafer by grinding or etching to ensure that the back surface of the wafer is thin in the center and thick at the edge;
coating a first polyimide coating on the back of the wafer, and heating and baking to remove a volatile solvent;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region where copper columns need to be arranged on the front surface of the wafer;
Plating copper on the area to form a copper column; removing the photoresist and the copper seed layer outside the region;
carrying and supporting the wafer by using an electrostatic carrier plate, and removing an oxide layer on the back of the wafer by using hydrofluoric acid;
and forming a metal coating film on the back surface of the wafer through metal evaporation or metal sputtering.
3. The manufacturing process of the copper pillar structure and the thick film copper-plated structure of the wafer according to claim 1 or 2, wherein the wafer is thinned to 200-300 μm.
4. The manufacturing process of the copper pillar structure and the thick film copper-plated structure of the wafer as claimed in claim 1 or 2, wherein the thickness of the coating photoresist layer is greater than the height of the copper pillar.
5. The manufacturing process of the copper pillar structure and the thick film copper-plated structure of the wafer as claimed in claim 1 or 2, wherein the thickness of the polyimide coating on the front surface and/or the metal back surface of the wafer is more than 20 microns.
6. The manufacturing process of the copper pillar structure and the thick film copper-plated structure of the wafer according to claim 1 or 2, wherein: the polyimide coating is removed by oxygen plasma or organic solvent rinsing or by blanket exposure development.
CN202010708050.0A 2020-07-21 2020-07-21 Manufacturing process of copper column and thick film copper plating structure of wafer Active CN111863596B (en)

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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020068425A1 (en) * 2000-12-01 2002-06-06 Taiwan Semiconductor Manufacturing Co., Ltd Method for bumping and backlapping a semiconductor wafer
JP2004071792A (en) * 2002-08-06 2004-03-04 Seiko Epson Corp Semiconductor device and method for manufacturing the same
TW589726B (en) * 2003-04-25 2004-06-01 Chipmos Technologies Inc Wafer level packaging process and structure thereof
JP2005303214A (en) * 2004-04-16 2005-10-27 Matsushita Electric Ind Co Ltd Grinding method for semiconductor wafer
US20090020854A1 (en) * 2007-07-20 2009-01-22 Tao Feng Process of forming ultra thin wafers having an edge support ring
JP2011009341A (en) * 2009-06-24 2011-01-13 Fuji Electric Systems Co Ltd Method of manufacturing semiconductor device
JP2012182239A (en) * 2011-02-28 2012-09-20 Panasonic Corp Method of manufacturing semiconductor device
US20140315350A1 (en) * 2012-09-01 2014-10-23 Alpha And Omega Semiconductor Incorporated Wafer process for molded chip scale package (mcsp) with thick backside metallization
CN105448854A (en) * 2014-08-29 2016-03-30 万国半导体股份有限公司 Wafer manufacturing method for thickly-back-metalized molded chip-scale package
CN107706102A (en) * 2017-09-19 2018-02-16 上海华虹宏力半导体制造有限公司 Technique for thinning back side of silicon wafer method
US20180090460A1 (en) * 2016-09-23 2018-03-29 Microchip Technology Incorporated Wafer level package and method
CN209401606U (en) * 2019-01-18 2019-09-17 芯恩(青岛)集成电路有限公司 A kind of semiconductor devices
CN111430325A (en) * 2020-04-29 2020-07-17 绍兴同芯成集成电路有限公司 Process structure of wafer double-sided alloy bump

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020068425A1 (en) * 2000-12-01 2002-06-06 Taiwan Semiconductor Manufacturing Co., Ltd Method for bumping and backlapping a semiconductor wafer
JP2004071792A (en) * 2002-08-06 2004-03-04 Seiko Epson Corp Semiconductor device and method for manufacturing the same
TW589726B (en) * 2003-04-25 2004-06-01 Chipmos Technologies Inc Wafer level packaging process and structure thereof
JP2005303214A (en) * 2004-04-16 2005-10-27 Matsushita Electric Ind Co Ltd Grinding method for semiconductor wafer
US20090020854A1 (en) * 2007-07-20 2009-01-22 Tao Feng Process of forming ultra thin wafers having an edge support ring
JP2011009341A (en) * 2009-06-24 2011-01-13 Fuji Electric Systems Co Ltd Method of manufacturing semiconductor device
JP2012182239A (en) * 2011-02-28 2012-09-20 Panasonic Corp Method of manufacturing semiconductor device
US20140315350A1 (en) * 2012-09-01 2014-10-23 Alpha And Omega Semiconductor Incorporated Wafer process for molded chip scale package (mcsp) with thick backside metallization
CN105448854A (en) * 2014-08-29 2016-03-30 万国半导体股份有限公司 Wafer manufacturing method for thickly-back-metalized molded chip-scale package
US20180090460A1 (en) * 2016-09-23 2018-03-29 Microchip Technology Incorporated Wafer level package and method
CN107706102A (en) * 2017-09-19 2018-02-16 上海华虹宏力半导体制造有限公司 Technique for thinning back side of silicon wafer method
CN209401606U (en) * 2019-01-18 2019-09-17 芯恩(青岛)集成电路有限公司 A kind of semiconductor devices
CN111430325A (en) * 2020-04-29 2020-07-17 绍兴同芯成集成电路有限公司 Process structure of wafer double-sided alloy bump

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