CN109408404B

CN109408404B - Reverse table look-up method and device based on TF card and computer equipment

Info

Publication number: CN109408404B
Application number: CN201811196102.XA
Authority: CN
Inventors: 杨洋; 周冬华
Original assignee: Shenzhen Union Memory Information System Co Ltd
Current assignee: Shenzhen Union Memory Information System Co Ltd
Priority date: 2018-10-15
Filing date: 2018-10-15
Publication date: 2020-10-09
Anticipated expiration: 2038-10-15
Also published as: CN109408404A

Abstract

The application relates to a reverse table look-up method, a reverse table look-up device, computer equipment and a storage medium based on a TF card, wherein the method comprises the following steps: obtaining a reverse table look-up request; according to the reverse table look-up request, searching LPA data corresponding to the physical addresses of all blocks needing to be moved in a mapping table; judging whether a physical address needing to be moved has a corresponding effective LPA; and storing all the searched corresponding effective LPA data into the buffer. The invention realizes that the garbage block recovery efficiency of the TF card can be improved when a large number of read data errors occur in the garbage block recovery process.

Description

Reverse table look-up method and device based on TF card and computer equipment

Technical Field

The invention relates to the technical field of storage, in particular to a reverse table look-up method and device based on a TF card, computer equipment and a storage medium.

Background

At present, user data is stored in NAND FLASH, and when there is not enough space on the TF card to write data, a block with more redundant user data needs to be moved to merge valid data together, which is convenient for writing new user data.

In the conventional technology, in the process of data movement, to distinguish which data on a block are valid data, the data on the block needs to be read out, and whether the data are valid data is distinguished according to a logical address recorded at a corresponding position. When the number of bits of error data read out is large, the logical address corresponding to the data cannot be known, and it is necessary to determine whether the data is valid data by a reverse mapping table lookup method, and if so, determine the corresponding logical address.

The reverse lookup mapping table needs to read the data storing the mapping table information one by one, compare the effective mapping table information with the data error position, and determine whether the data at the error position is effective data. When the positions of the UECCs are more, the operation of reversely searching the mapping table needs to be performed for many times, which has a great influence on the speed of garbage block recovery.

Disclosure of Invention

In view of the foregoing, there is a need to provide a method, an apparatus, a computer device, and a storage medium for improving the garbage block recovery efficiency of the TF card when a large number of read data errors occur in the garbage block recovery process.

A TF card based reverse lookup method, the method comprising:

obtaining a reverse table look-up request;

according to the reverse table look-up request, searching LPA data corresponding to the physical addresses of all blocks needing to be moved in a mapping table;

judging whether a physical address needing to be moved has a corresponding effective LPA;

and storing all the searched corresponding effective LPA data into the buffer.

In one embodiment, the size of the buffer is determined according to the number of logical addresses that can be stored in the block, and the size of the buffer is fixed for different flash memory types.

In one embodiment, after the step of storing all the found corresponding valid LPA data into the buffer, the method further includes:

traversing from the position with the buffer index being 0;

judging whether the current LPA data is a valid value;

if the current LPA data is a valid value, reading a mapping table of the current LPA data into the RAM;

calculating the current actual physical address according to the current buffer subscript;

judging whether the actual physical address is consistent with the physical address in the mapping table;

and if the actual physical address is consistent with the physical address in the mapping table, moving the data of the current physical address.

In one embodiment, after the step of reading the mapping table of the current LPA data into the RAM if the current LPA data is a valid value, the method further includes:

if the current LPA data is not a valid value, the buffer subscript is shifted backward.

In one embodiment, after the step of moving the data of the current physical address if the actual physical address is consistent with the physical address in the mapping table, the method further includes:

and if the actual physical address is not consistent with the physical address in the mapping table, the buffer subscript is moved backwards.

In one embodiment, before the step of traversing from the position with the buffer index of 0, the method further comprises:

judging whether the reverse table lookup is successful;

and if the reverse table look-up is successful, traversing from the position with the buffer index of 0.

A TF card based reverse lookup apparatus, the apparatus comprising:

the acquisition module is used for acquiring a reverse table look-up request;

the searching module is used for searching LPA data corresponding to the physical addresses of all blocks needing to be moved in a mapping table according to the reverse table searching request;

the judging module is used for judging whether the physical address needing to be moved has a corresponding effective LPA;

and the storage module is used for storing all the searched corresponding effective LPA data into the buffer.

In one embodiment, the apparatus further includes a data moving module, and the data moving module is configured to:

traversing from the position with the buffer index being 0;

judging whether the current LPA data is a valid value;

A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of any of the above methods when executing the computer program.

A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of any of the methods described above.

The reverse table look-up method, the device, the computer equipment and the storage medium based on the TF card acquire a reverse table look-up request; according to the reverse table look-up request, searching LPA data corresponding to the physical addresses of all blocks needing to be moved in a mapping table; judging whether a physical address needing to be moved has a corresponding effective LPA; and storing all the searched corresponding effective LPA data into the buffer. The invention realizes that the garbage block recovery efficiency of the TF card can be improved when a large number of read data errors occur in the garbage block recovery process.

Drawings

FIG. 1 is a process schematic of GC operation;

FIG. 2 is a diagram illustrating a logical address and a physical address of a meta area;

FIG. 3 is a flow chart of an embodiment of a reverse lookup table method based on TF cards;

FIG. 4 is a schematic diagram of an implementation of a reverse lookup method based on TF cards in one embodiment;

FIG. 5 is a flowchart illustrating a data movement step according to an embodiment;

FIG. 6 is a block diagram of an embodiment of a reverse lookup table device based on TF cards;

FIG. 7 is a block diagram of an embodiment of a reverse lookup table device based on TF cards;

FIG. 8 is a diagram illustrating an internal structure of a computer device according to an embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

In order to more clearly explain the contents of the present invention, first, the overall concept of the present invention is explained.

User data is stored at NAND FLASH, and since the nature of the grain requires that the unit of writing data is page, but the unit of erasing is block, the newly written data cannot be overwritten at the previous location, which results in many invalid data in the block. When the TF card does not have enough space to write data, the block with more redundant user data needs to be moved, and valid data are combined together, so that new user data can be written conveniently. In order to ensure that there is always available block in the TF card, the operation of collecting valid data and changing the previous block with redundant data into available block is gc (code collection). The process of the GC operation is shown in fig. 1.

In the GC process, valid data in a block with a large amount of selected redundant data needs to be transferred to a designated write-in point, scanning is performed from the last page of the block to the front, and the transfer valid page is selected by using logical address information recorded in meta information of a corresponding physical address.

An area for recording a logical address in the page information is called a meta area, the meta area is a part of a spare area of a page in the NAND flash, and the ftl (flash Translation layer) module stores the logical address corresponding to the physical address by using the meta area as shown in fig. 2.

Because of NAND FLASH grain life cycle or high and low temperature environment, the user data stored in NAND FLASH is not absolutely safe, and a certain error bit may occur in the user data during reading from NAND FLASH, at this time, an error correction algorithm is required to correct the data, if the error bit is less, the correct data can be corrected, at this time, the state of the user data is called CECC, and if the error bit is more, the correct data cannot be corrected, at this time, the state of the user data is called UECC.

In the process of GC moving valid data, if UECC occurs when the logical address information corresponding to the physical address PPA0 is confirmed, at this time, whether the logical address stored in the corresponding physical address is valid information cannot be confirmed through the logical address in meta, if the logical address information corresponding to PPA0 is stored in an adjacent page, the mapping information in the adjacent page can be used for confirmation, but when the data state of the adjacent page is also UECC, whether the PPA0 is valid data and the logical address corresponding to PPA0 can only be confirmed through the operation of reversely searching a mapping table.

The forward lookup of the mapping table means that the logical address is known, and the corresponding physical address is known by the method of looking up the mapping table. The reverse lookup mapping table means that the physical address is known, and the corresponding logical address is known by the method of looking up the mapping table.

The reverse table look-up compares the address of the PPA0 with the physical address stored in the mapping table one by traversing the information of the effective mapping table, if the PPA0 is in the effective mapping table information, it indicates that effective data is stored in the PPA0, and confirms the corresponding logical address of the PPA 0.

Because the memory of the TF card is limited, the mapping table from the whole logical address to the physical address cannot reside in the memory, the process of reverse table lookup firstly traverses a part of the mapping table in the current memory, if the corresponding physical address can be found in the memory, the reverse table lookup is finished, which is a scene that the reverse table lookup consumes the least time, if the corresponding physical address cannot be found in the mapping table in the memory, the mapping tables recorded in NAND FALSH need to be read into the memory one by one for comparison until the PPA0 is found, and if the PPA0 is not found after all the mapping tables on the memory and NAND FALSH are traversed, the data in the PPA0 is invalid data. When the number of times of UECC (unified resource control) occurrence of the block which is selected by the GC and needs to be moved is large, reverse table lookup can be triggered for many times, the reverse table lookup consumes a long time, and the carrying efficiency of the GC can be influenced by triggering the reverse table lookup for many times.

In one embodiment, as shown in fig. 3, there is provided a reverse look-up table method based on TF card, the method comprising:

step 302, obtaining a reverse table look-up request;

step 304, according to the reverse table look-up request, looking up LPA data corresponding to the physical addresses of all blocks needing to be moved in a mapping table;

step 306, judging whether the physical address to be moved has a corresponding effective LPA;

and 308, storing all the found corresponding effective LPA data into a buffer.

In this embodiment, when a large number of data errors occur in reading data on NAND FLASH in the GC process, the reverse lookup method provided in this embodiment can effectively improve the efficiency of data transportation.

In the process of data transfer, when the data at the position of the PPA0 cannot be confirmed whether to have valid data, the mapping table needs to be searched reversely at this time to confirm whether the data at the position of the PPA0 needs to be transferred. In this embodiment, all physical addresses of the block that needs to be moved are searched in a one-to-one correspondence manner, and all the searched corresponding valid LPAs are stored in a special buffer.

In the embodiment, a reverse table look-up request is obtained; according to the reverse table look-up request, looking up LPA data corresponding to the physical addresses of all blocks needing to be moved in a mapping table; judging whether a physical address needing to be moved has a corresponding effective LPA; and storing all the searched corresponding effective LPA data into the buffer. According to the embodiment, in the garbage block recovery process, when a large number of read data errors occur, the garbage block recovery efficiency of the TF card can be improved.

Specifically, the size of the buffer for storing the block valid data is determined according to the number of logical addresses that can be stored in the block, and the size of the buffer is fixed for different NAND FALSH types.

In the buffer, the physical address and the logical address on the block are in one-to-one correspondence, different positions of the buffer correspond to the corresponding physical addresses, and the logical address corresponding to the physical address is recorded in the buffer.

The LPA value in buffer is shown as INVALID32 position, the position recording the corresponding LPA is shown as valid data, and different positions in buffer correspond to different physical addresses, as shown in fig. 4.

In fig. 4, it is assumed that NAND FALSH is an MLC particle, there are N physical pages on a single block, and for a TF card of 1CH4CE, the corresponding buffer size is 4 × N, where the first 4 indicates that U32 occupies 4 bytes, the second 4 indicates 4 blocks, and the third 4 indicates that 4 LPAs can be stored in one physical page.

Meanwhile, the corresponding physical address can also be known according to the position in the buffer, and the calculation method is as follows: assuming that the position index in the buffer is M, and the number of LPAs which can be stored in a single slot page of a TF card of 1CH4CE is 4 x 4; confirming that the page where the current physical address is located is: m/(4 x 4); confirming that the CE where the current physical address is located is: (M% (4 x 4))/4; confirming the position of the current physical address in the physical page: (M% (4 x 4))% 4.

In one embodiment, a reverse lookup table method based on TF card is provided, as shown in fig. 5, the method further includes the steps of:

step 502, whether reverse table lookup is successful or not is judged, and if yes, the step 504 is skipped;

step 504, traversing from the position of the buffer marked as 0;

step 506, judging whether the traversal is finished, if so, jumping to step 518, otherwise, jumping to step 508;

step 508, judging whether the current LPA is a valid value, if so, skipping to step 510, otherwise skipping to step 520;

step 510, reading the mapping relation of the current LPA into the RAM;

step 512, calculating the current actual physical address according to the subscript;

step 514, judging whether the actual physical address is consistent with the physical address in the mapping table, if so, skipping to step 516, otherwise, skipping to step 520;

step 516, moving the data in the current physical address;

step 518, finishing the current block moving;

at step 520, the index is shifted backwards.

Specifically, the contents in the buffer are traversed one by one, scanning is started from the position of the buffer subscript 0, the next position is directly skipped to scan when invalid data are encountered, valid LPA data are encountered, the physical address corresponding to the LPA is calculated according to the buffer subscript at the moment, whether the data are valid data or not is re-confirmed according to the current mapping table, and if the data are valid data, the data are moved. The reason for reconfirming whether the data is valid data is that certain data is allowed to be written into the TF card in the data transfer process, and the data is valid data in the reverse mapping table lookup process, and may not be valid data in the actual buffer transfer traversal process, so that reconfirming is required in the process of preparing for transfer.

The reverse table look-up method in the embodiment improves the efficiency of data transportation if the error of reading data occurs continuously in the process of data transportation.

It should be understood that although the steps in the flowcharts of fig. 3 and 5 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 3 and 5 may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the sub-steps or stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least some of the sub-steps or stages of other steps.

In one embodiment, as shown in fig. 6, there is provided a TF card based reverse lookup apparatus 600, comprising:

an obtaining module 601, configured to obtain a reverse table lookup request;

the searching module 602 is configured to search, according to the reverse table searching request, LPA data corresponding to physical addresses of all blocks to be moved in a mapping table;

the determining module 603 is configured to determine whether a physical address to be moved has a corresponding valid LPA;

a storing module 604, configured to store all the found corresponding valid LPA data into the buffer.

In one embodiment, as shown in fig. 7, there is provided a TF card based reverse lookup table apparatus 600, further comprising a data moving module 605 for:

traversing from the position with the buffer index being 0;

judging whether the current LPA data is a valid value;

For specific limitations of the TF card based inverse lookup table apparatus 600, reference may be made to the above limitations of the TF card based inverse lookup table method, which are not described herein again.

In one embodiment, a computer device is provided, the internal structure of which may be as shown in FIG. 8. The computer device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a reverse look-up table method based on a TF card.

Those skilled in the art will appreciate that the architecture shown in fig. 8 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

In one embodiment, a computer device is provided, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the above method embodiments when executing the computer program.

In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the above respective method embodiments.

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. A TF card based reverse lookup method, the method comprising:

obtaining a reverse table look-up request;

judging whether all corresponding LPA data are valid;

storing all the found corresponding effective LPA data into a buffer;

judging whether the reverse table lookup is successful;

if the reverse table look-up is successful, traversing from the position with the buffer subscript being 0;

judging whether the current LPA data is a valid value;

if the current LPA data is a valid value, reading a mapping table of the current LPA data into the RAM; if the current LPA data is not an effective value, the buffer subscript is moved backwards;

if the actual physical address is consistent with the physical address in the mapping table, moving the data of the current physical address; and if the actual physical address is not consistent with the physical address in the mapping table, the buffer subscript is moved backwards.

2. The TF card-based reverse lookup table according to claim 1, wherein the size of the buffer is determined according to the number of logical addresses that can be stored in the block, and the size of the buffer is fixed for different flash memory types.

3. An apparatus for reverse lookup based on a TF card, the apparatus comprising:

the acquisition module is used for acquiring a reverse table look-up request;

the judging module is used for judging whether all corresponding LPA data are valid or not;

the storage module is used for storing all the found corresponding effective LPA data into the buffer;

the device also comprises a data moving module, wherein the data moving module is used for: judging whether the reverse table lookup is successful; if the reverse table look-up is successful, traversing from the position with the buffer subscript being 0; judging whether the current LPA data is a valid value; if the current LPA data is a valid value, reading a mapping table of the current LPA data into the RAM; if the current LPA data is not an effective value, the buffer subscript is moved backwards; calculating the current actual physical address according to the current buffer subscript; judging whether the actual physical address is consistent with the physical address in the mapping table; if the actual physical address is consistent with the physical address in the mapping table, moving the data of the current physical address; and if the actual physical address is not consistent with the physical address in the mapping table, the buffer subscript is moved backwards.

4. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of claim 1 or 2 are implemented when the processor executes the computer program.

5. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of claim 1 or 2.