CN108494649A - The bus system and data transmission method being combined with homogeneous state time slot based on poll - Google Patents
The bus system and data transmission method being combined with homogeneous state time slot based on poll Download PDFInfo
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- CN108494649A CN108494649A CN201810091435.XA CN201810091435A CN108494649A CN 108494649 A CN108494649 A CN 108494649A CN 201810091435 A CN201810091435 A CN 201810091435A CN 108494649 A CN108494649 A CN 108494649A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
- H04L12/4035—Bus networks with centralised control, e.g. polling in which slots of a TDMA packet structure are assigned based on a contention resolution carried out at a master unit
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40267—Bus for use in transportation systems
- H04L2012/4028—Bus for use in transportation systems the transportation system being an aircraft
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
Abstract
The present invention relates to data bus communication technical fields, and in particular to the bus system and data transmission method being combined with homogeneous state time slot based on poll.The bus system includes bus, bus adapter and electronic equipment, and the bus and multiple bus adapter two-way communications, each bus adapter are bi-directionally or uni-directionally communicated with multiple electronic equipments；The bus is combined using poll with homogeneous state time slot with the communication of the bus adapter.The present invention is using poll in such a way that competition slot is combined, it is distributed timely processing burst service by competition slot homogeneous state, reduce the average latency, raising system real-time response characteristic, simultaneously congestion data caused by competition collision can be effectively eliminated by the way that polling time slot is arranged, network congestion rate is reduced, ensures that throughput of system, poll are customizable with competition slot.
Description
Technical field
The present invention relates to data bus communication technical fields, and in particular to the bus being combined with homogeneous state time slot based on poll
System and data transmission method.
Background technology
Widely applied data bus standard is MIL-STD-1553B buses in Aeronautics and Astronautics system at present, it is
A kind of time-division universal serial bus of centralization, is mainly characterized by distribution process, centralized control and real-time response.MIL-STD-
1553B buses are a kind of digital command/response type time multiplex data/address bus, 1M bps of transmission rate, in recent years
Foreign countries occur a kind of high speed 1553 under the premise of existing 1553B bus architectures are constant by the communication speed of 1553B buses from
1Mbps is increased to 5Mbps.1553B bus messages are made of three kinds of words, 20 bit of word length, 16 bit of data effective length；It adopts
With half-duplex transmission mode, transmission medium is Shielded Twisted Pair.Its reliability mechanisms includes error-disable function, fault tolerance, mistake
Detection and positioning, the isolation of mistake, the correction of mistake, system monitoring and system restore function.Using dual redundant system, there is two
A transmission channel ensure that good fault-tolerance and Fault Isolation.This mode is very suitable for central controlled distributed treatment
System.
But 1553B buses have the following disadvantages：
1) system accommodates up to 31 nodes, as increasing for air environment is increasingly difficult to meet demand；
2) 1553B buses are quasi- network without center, and centainly remaining is provided by standby bus controller (BBC) or (BUBC)
Degree, spare controller quantity is limited in actual use；
3) standard 1553B agreements are 1Mbps, cannot be satisfied big data transmission demand；
4) transformer isolation, bus is used to have DC current, energy consumption is big, high to bus driver Capability Requirement；
5) 1553B buses use the protocol mode of command/response, ensure that real-time, but for bursty traffic, do not have
There is effective mechanism.
Invention content
In view of the above-mentioned problems, the present invention provides a kind of bus system being combined with homogeneous state time slot based on poll and data pass
Transmission method.The present invention be applied in, large-scale UAV system is airborne and the data exchange of ground electronic system wireline communication network
And in system control, solve polyelectron device data portfolio it is inconsistent data exchange and cable net layout be complicated, maintainability
The problem of difference.
The present invention is realized by technical solution once：
A kind of bus system being combined with homogeneous state time slot based on poll, the bus system include bus, bus adaption
Device and electronic equipment, the bus and multiple bus adapter two-way communications, each bus adapter and multiple institutes
Electronic equipment is stated bi-directionally or uni-directionally to communicate；The bus and the communication of the bus adapter are mutually tied using poll with homogeneous state time slot
It closes.
Further, the poll is integrated as with homogeneous state time slot：In the communication of the bus and the bus adapter
The time slot of the bus includes polling time slot and competition slot, and the competition slot is distributed using homogeneous state；The polling time slot is used
It is uploaded in the data of each electronic equipment；The competition slot be used for transmission equipment emergency situations, equipment access or exit and
The case where system mode converts.
Further, using bus control right competition mechanism, each bus adapter has different priorities,
Competition bus control.
Further, the bus is accessed in one end of the bus adapter using capacitance blocking mode, by frequency domain without
The total line access mode of codes match of DC component carries out two-way communication, using single byte first dielectric and list with the bus
Byte, which terminates, to be synchronized；The other end of the bus adapter connects multiple electronic equipments by synchronous/asynchronous interface, is set with electronics
It is standby bi-directionally or uni-directionally to be communicated.
A kind of bus data transmission method being combined with homogeneous state time slot based on poll, bus, which is divided into regular length, is
The time frame of Ls is made of per time frame M time slot, is completed in transmission of every time frame start time synchronization/control frame total in this time frame
Bus slots are divided into polling time slot and competition slot by the distribution of line time slot；
The data for the electronic equipment that the polling time slot is used to be connected with the bus upload；
The competition slot is used for the upload of bursty traffic；
The bursty traffic includes：The sudden aperiodic data transmission service of electronic equipment, electronic equipment and total
The failure of line adapter, state, access, log off modal transformation.
Further, the electronic equipment is connected by bus adapter with the bus, and bus control unit is when per
Frame start time sends the bus slots that the synchronization/control frame is completed in this time frame and distributes, and each polling time slot is accessed
Electronic equipment ID is broadcasted to entire bus network；Bus adapter receives and parses through the synchronization/control frame, according to connecting electricity
Electronic device data is uploaded to bus by sub- device id in corresponding polling time slot.
Further, frame length and each electricity when adjusting bus according to the portfolio of each electronic equipment using bus control unit
The polling cycle of sub- equipment.
Further, the competition slot is distributed in every time frame using homogeneous state.
Further, the bus is connected with multiple bus adapters, and each bus adapter can compete as institute
Bus control unit is stated, there are each bus adapter different priorities, any moment, existence anduniquess bus adapter to control institute
State the data transmission of bus.
Further, according to bus adapter bearer traffic number and processor resource to occupy degree preferential to determine
Grade；It is higher that portfolio is less, processor resource occupies less bus adapter priority.
The advantageous effects of the present invention：
1) for the present invention by using differential transfer and capacitance blocking access way, high speed data transfer is high, can reach
10Mbps or more, the bit error rate is low, small power consumption, strong antijamming capability, and has error detecing capability；
2) it is prominent to be distributed timely processing using poll in such a way that competition slot is combined by competition slot homogeneous state by the present invention
Sending service, reduce the average latency, improve system real-time response characteristic, while by be arranged polling time slot can effectively eliminate it is competing
Congestion data caused by collision is striven, network congestion rate is reduced, ensures that throughput of system, poll are customizable with competition slot；
3) bus network of the invention is spatially non-stop layer self-organizing network, and network topology is restructural, supports network
Node hot plug；It is to have central site network in time, the node with bus control right can dynamically distribute bus bandwidth, realize equal
The function of the portfolio that weighs distribution；
4) bussing technique of the invention optimizes cable grid connection type, is easily installed；It supports built-in test, can supervise online
It surveys each bus node and its connects the working condition of equipment, have function monitoring, fault location and error diagnosis ability, improve
The stability of system.
Description of the drawings
Fig. 1 is the LHDBUS bus structures schematic diagrames of embodiment of the present invention；
Fig. 2 is that LHDBUS time frames distribute schematic diagram；
Fig. 3 is bus network handling capacity schematic diagram；
Fig. 4 is bus network collision rate schematic diagram.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is explained in further detail.It should be appreciated that specific embodiment described herein is used only for explaining the present invention, and
It is not used in the restriction present invention.
On the contrary, the present invention covers any replacement done in the spirit and scope of the present invention being defined by the claims, repaiies
Change, equivalent method and scheme.Further, in order to make the public have a better understanding the present invention, below to the thin of the present invention
It is detailed to describe some specific detail sections in section description.Part without these details for a person skilled in the art
Description can also understand the present invention completely.
Embodiment 1
The present embodiment provides a kind of LHDBUS bussing techniques, including following three parts：
(1) LHDBUS bus architectures, (2) time slot distribution management, the optimization of (3) network-control.
LHDBUS bus architectures are that bus hardware forms and access way, time slot distribution management are the Protocol Design of bus,
Network-control is optimized for bus control method design.
It is specifically introduced from LHDBUS bus structures, time slot distribution management, network-control optimization three parts separately below
LHDBUS bussing techniques realize process:
LHDBUS bus structures
LHDBUS buses are made of differential bus, bus adapter and electronic equipment, and structural schematic diagram is as shown in Figure 1.
LHDBUS buses are based on differential transfer, and bus circuit is presented open circuit mode, each electronic equipment is connected by bus adapter, realizes
Bus is communicated with the conversion of the communications protocol of each equipment room and data.
Bus adapter uses capacitance blocking mode access differential bus, total by codes match of the frequency domain without DC component
Line access mode carries out two-way communication with bus, synchronous with single byte termination using single byte first dielectric；The other end, bus
Adapter connects multiple electronic equipments by synchronous/asynchronous interface, is bi-directionally or uni-directionally communicated with electronic equipment.Bus adaption
Intermediary of the device as LHDBUS buses and electronic equipment, the main real-time response completed to bus data, control instruction are right
The electronic equipment of connection carries out power supply and distribution management, data communication, while bus adapter can be used as bus control unit and be controlled
Policy calculation processed.
Time slot distribution management
LHDBUS buses carry out bus slots distribution, poll in such a way that " grouping poll " and " homogeneous state competition " are combined
Time slot is customizable with competition slot, and bus is divided into the time frame that regular length is Ls, is made of M time slot per time frame.Time frame
Length L can be formulated according to aerocraft system frequency response demand, support the control frequency of 1/LHz.Time slot distributes schematic diagram such as Fig. 3 institutes
Show.
Bus control unit is according to electronic equipment portfolio, specifically, in being applied to this bus, large-scale unmanned plane system
Unite airborne and ground electronic system wireline communication network when, frame length and each electronics when determining bus according to vehicle dynamic characteristic
The polling cycle of equipment completes the distribution of the bus slots in this time frame by sending synchronization/control frame in every time frame start time,
The device id that each polling time slot accesses is broadcasted to entire bus network；Bus adapter receives and parses through synchronization/control frame,
Electronic device data is uploaded to bus in corresponding polling time slot according to connected electronic equipment ID；Competition slot is in every time frame
It is distributed using homogeneous state, specifically, in every time frame, competition slot is uniformly distributed, and the interval between two adjacent competition slots is identical.It is competing
Upload of the time slot for bursty traffic is striven, bursty traffic includes：The sudden aperiodic data transmission industry of electronic equipment
Business, electronic equipment and bus adapter failure, state, access, log off modal transformation.
Network throughput is analyzed
One time frame of LHDBUS buses includes M time slot, wherein m1A time slot sends synchronization/poll frame, m2A time slot is sent
Poll frame, m3A time slot sends competition frame, and entire bus network includes that (bus adapter is a section to N number of node
Point), with a time slot for a unit interval, each node data portfolio obeys the Poisson distribution that arrival rate is λ, bus network
The total arrival rate G=N λ of network, in LHDBUS bus protocols, the portfolio of each node is divided into two parts, and a portion can only
It is sent in polling time slot, another part can be sent in competition slot, if polling time slot arrival rate ρ λ, competition slot reaches
Rate is (1- ρ) λ.
For a polling time slot, as long as in preceding N1There is grouping to reach in a time slot, which has grouping to transmit, N1
Consider that polling time slot is uniformly distributed, then cycle length to simplify the process for the cycle length of the same node of poll twice
The node arrival rate of polling time slot is ρ λ, in period N1The probability reached without grouping in a time slot is
The total throughout of polling time slot in one bus cycles
Total arrival rate of competition slot is
G2=N (1- ρ) λ；
To simplify the process, competition slot is uniformly distributed, in competition slot one be grouped be capable of Successful transmissions probability be
There is no the probability that grouping reaches in the time of former and later two competition slots
The total throughout of competition slot in one bus cycles
Total throughout is
S=Sl+S2；
LHDBUS handling capacities can be obtained as shown in figure 3, as a result of the mode that polling time slot is combined with competition slot,
When task arrival rate increases, compared with ALOHA agreements, LHDBUS networks will not due to frequent impact thorough congestion, handle up
Amount is better than ALOHA agreements and tends towards stability.
LHDBUS bus throughputs are less than 1553B buses, but the above analysis is obeyed based on each device data portfolio
The consistent Poisson distribution of arrival rate, in a practical situation, each device node portfolio are not consistent, and are commonly present burst service
Amount, 1553B do not have effective treatment mechanism.
Collision probability calculates
LHDBUS bus collision probabilities are the collision probability of competition slot
Bus control unit can dynamically distribute bus slots, adjust each electronics and set according to each electronic equipment traffic intensity
Standby occupied bandwidth is the poll frequency that electronic equipment ID is adjusted according to electronic equipment traffic intensity, improves network throughput and becomes
Nearly optimal value, while improving the real-time of bus response burst service.
Network-control optimizes
Network structure is optimized using bus control right competition mechanism.Each bus adapter can competition bus control become
Bus control unit, each bus adapter have different priorities, the bus marco of any time bus network existence anduniquess
Unit.
According to bus adapter bearer traffic number and processor resource occupy degree and determine priority；Portfolio
It is higher that less, processor resource occupies less bus adapter priority.
Original state, each bus adapter complete network struction according to prioritized contention bus control right；Operational process
In, each bus adapter judges whether contention bus control according to the priority of Current bus control unit, if priority is high
In bus control unit, then control handing-over can be carried out in competition slot；When bus control unit node is actively or because failure exits
When network, online bus adapter will competition bus control again, generate new bus control unit, realize one kind in space
Upper non-stop layer, the self-organizing network framework for having center on the time.
Have network topology recombination function, supporting bus adapter, electronic equipment online insertion and removal.In the network operation, when
When having new bus adapter or electronic equipment to access, the application that networks can be completed in competition slot；When there is electronic equipment to exit,
Bus adapter can report electronic equipment logout in polling time slot or competition slot；When there is bus adapter to exit, total line traffic control
Unit processed can complete on-line monitoring, fault location and error diagnosis by monitoring the poll response of the bus adapter.Although knot
It has closed attached drawing and has described embodiments of the present invention, it will be apparent to those skilled in the art that not departing from the principle of the invention
Under the premise of, several improvement can also be made, these also should be regarded as belonging to the scope of protection of the present invention.
Claims (10)
1. a kind of bus system being combined with homogeneous state time slot based on poll, which is characterized in that the bus system include bus,
Bus adapter and electronic equipment, the bus and multiple bus adapter two-way communications, each bus adapter
It is bi-directionally or uni-directionally communicated with multiple electronic equipments；
The bus is combined using poll with homogeneous state time slot with the communication of the bus adapter.
2. system as described in claim 1, which is characterized in that the poll is integrated as with homogeneous state time slot：The bus and institute
The time slot for stating bus described in the communication of bus adapter includes polling time slot and competition slot, and the competition slot uses homogeneous state
Distribution；Data of the polling time slot for each electronic equipment upload；The competition slot is used for transmission equipment burst shape
The case where condition, equipment are accessed or are exited and system mode converts.
3. system as described in claim 1, which is characterized in that the system uses bus control right competition mechanism, each described total
Line adapter has different priorities, can competition bus control.
4. system as described in claim 1, which is characterized in that one end of the bus adapter is accessed using capacitance blocking mode
The bus is carried out two-way communication with the bus, is used by the total line access mode of codes match of the frequency domain without DC component
Single byte first dielectric is synchronous with single byte termination；The other end of the bus adapter is connected more by synchronous/asynchronous interface
A electronic equipment is bi-directionally or uni-directionally communicated with electronic equipment.
5. a kind of bus data transmission method being combined with homogeneous state time slot based on poll, which is characterized in that
Bus is divided into the time frame that regular length is L s, is made of M time slot per time frame, is sent in every time frame start time
Synchronization/control frame completes the distribution of the bus slots in this time frame and bus slots is divided into polling time slot and competition slot；
The data for the electronic equipment that the polling time slot is used to be connected with the bus upload；
The competition slot is used for the upload of bursty traffic；
The bursty traffic includes：Sudden aperiodic data transmission service, electronic equipment and the bus of electronic equipment are suitable
The failure of orchestration, state, access, log off modal transformation.
6. method as claimed in claim 5, which is characterized in that the electronic equipment passes through bus adapter and the bus phase
Even, bus control unit sends synchronization/control frame in every time frame start time and completes the distribution of the bus slots in this time frame, will be each
The electronic equipment ID that a polling time slot accesses is broadcasted to entire bus network；Bus adapter receives and parses through the synchronization/control
Electronic device data is uploaded to bus by frame processed according to connected electronic equipment ID in corresponding polling time slot.
7. method as claimed in claim 6, which is characterized in that using bus control unit according to the portfolio tune of each electronic equipment
The polling cycle of frame length and each electronic equipment when whole bus.
8. method as claimed in claim 5, which is characterized in that the competition slot is distributed in every time frame using homogeneous state.
9. method as claimed in claim 6, which is characterized in that the bus is connected with multiple bus adapters, each bus
Adapter can compete as the bus control unit, and there are each bus adapter different priorities, any moment to exist
Unique bus adapter controls the data transmission of the bus.
10. method as claimed in claim 9, which is characterized in that according to the number and processor of bus adapter bearer traffic
Resource occupation degree determines priority；It is higher that portfolio is less, processor resource occupies less bus adapter priority.
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| CN201810091435.XA CN108494649B (en) | 2018-01-30 | 2018-01-30 | Bus system based on combination of polling and uniform time slot and data transmission method |
Applications Claiming Priority (1)
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| CN201810091435.XA CN108494649B (en) | 2018-01-30 | 2018-01-30 | Bus system based on combination of polling and uniform time slot and data transmission method |
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| CN108494649B CN108494649B (en) | 2021-01-15 |
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| CN109263581A (en) * | 2018-11-08 | 2019-01-25 | 湖北汽车工业学院 | A kind of real-time commitment method for automatic driving vehicle |
| CN111090600A (en) * | 2019-12-09 | 2020-05-01 | 苏州浪潮智能科技有限公司 | Bus sharing method |
| CN111314193A (en) * | 2020-04-15 | 2020-06-19 | 联合华芯电子有限公司 | Data transmission bus system, device and method |
| CN111343069A (en) * | 2020-04-15 | 2020-06-26 | 联合华芯电子有限公司 | Distributed control communication bus based on robot sensing system and robot |
| CN111343068A (en) * | 2020-04-15 | 2020-06-26 | 联合华芯电子有限公司 | Double-speed arbitration bus system for giant carrier and carrier |
| CN111478840A (en) * | 2020-04-15 | 2020-07-31 | 联合华芯电子有限公司 | Double-rate arbitration relay device for bus system |
| CN112769661A (en) * | 2020-12-29 | 2021-05-07 | 北京航天自动控制研究所 | Time slot distribution and control method for high-speed time division multiplexing communication bus |
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| CN111314193A (en) * | 2020-04-15 | 2020-06-19 | 联合华芯电子有限公司 | Data transmission bus system, device and method |
| CN111343069A (en) * | 2020-04-15 | 2020-06-26 | 联合华芯电子有限公司 | Distributed control communication bus based on robot sensing system and robot |
| CN111343068A (en) * | 2020-04-15 | 2020-06-26 | 联合华芯电子有限公司 | Double-speed arbitration bus system for giant carrier and carrier |
| CN111478840A (en) * | 2020-04-15 | 2020-07-31 | 联合华芯电子有限公司 | Double-rate arbitration relay device for bus system |
| CN112769661A (en) * | 2020-12-29 | 2021-05-07 | 北京航天自动控制研究所 | Time slot distribution and control method for high-speed time division multiplexing communication bus |
| CN112769661B (en) * | 2020-12-29 | 2022-07-29 | 北京航天自动控制研究所 | Time slot distribution and control method for high-speed time division multiplexing communication bus |
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