CN107357695B - Subcard verification method, apparatus and system - Google Patents

Subcard verification method, apparatus and system Download PDF

Info

Publication number
CN107357695B
CN107357695B CN201710455372.7A CN201710455372A CN107357695B CN 107357695 B CN107357695 B CN 107357695B CN 201710455372 A CN201710455372 A CN 201710455372A CN 107357695 B CN107357695 B CN 107357695B
Authority
CN
China
Prior art keywords
verified
subcard
subcards
verifying
card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201710455372.7A
Other languages
Chinese (zh)
Other versions
CN107357695A (en
Inventor
储飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Products Chengdu Co Ltd
Intel Corp
Original Assignee
Intel Products Chengdu Co Ltd
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Products Chengdu Co Ltd, Intel Corp filed Critical Intel Products Chengdu Co Ltd
Priority to CN201710455372.7A priority Critical patent/CN107357695B/en
Publication of CN107357695A publication Critical patent/CN107357695A/en
Application granted granted Critical
Publication of CN107357695B publication Critical patent/CN107357695B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00Network arrangements, protocols or services for addressing or naming
    • H04L61/50Address allocation
    • H04L61/5007Internet protocol [IP] addresses

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

This application provides a kind of subcard verification methods, including:Via the communication connection circuit unit with set IP address, the sequence number information of one or more subcards to be verified is obtained, wherein the communication connection circuit unit is communicatively coupled with one or more of subcards to be verified;Using the sequence number information of the IP address and acquired one or more subcard to be verified, the verifying routing of one or more of subcards to be verified is created;And the verifying routing based on the one or more of subcards to be verified created, one or more of subcards to be verified are verified via the communication connection circuit unit.Using the subcard verification method, it can easily realize that subcard is verified with lesser space, so that the spatial volume of subcard verifying equipment reduces and cost substantially reduces.

Description

Subcard verification method, apparatus and system
Technical field
The application is usually directed to subcard verifying field, tests more particularly, to the subcard of the validity for verifying subcard Demonstrate,prove method, apparatus and system.
Background technique
Subcard is other boards removed except mainboard, such as can refer to and be additional to adding on computer adaptive card Card.In some cases, subcard can not have the design that is in contact with the slot on mainboard, but completely by being connect with master card Data information to be dealt with is transmitted in contact.In the art, subcard may, for example, be serial voltage identification card, control system Power card, numerical value input-output card, control card, circuit sweeps card, temperature control card, reserves card, is multi-functional motherboard power supply card Card, hard disk card, video card, audio card, Ethernet card, data capture card, SATA card, serial card, CPU/ chip test card and photograph Camera driving/control card etc..
In practical applications, when subcard is transported for long-distance collision etc. due to may cause damage, calculating It is lost caused by when being run for a long time in machine and/or test macro or since the daughter card components service life expires, these subcards may It is damaged.In this case, it often requires the validity to subcard is verified, that is, need to verify the quality of subcard.Into When row subcard validation verification, existing method is usually that subcard is placed in the production equipment in factory to verify.Due to life The specific features information (for example, specific features information of the component in subcard) for not having subcard in equipment usually is produced, thus only It can determine that the quality of subcard, and cannot specifically determine the reason of which component of subcard is damaged and subcard damages.In addition, The usual bulky of these production equipments, and need specific factory's water process, OFA (Oil Free Air, oil free compression sky Gas) gas and three phase mains, so that subcard verifying is extremely complex and expensive.
Summary of the invention
In view of the above problems, this application provides a kind of subcard verification methods, apparatus and system.Utilize this method, device And system, the sequence number information that can use set IP address and one or more subcards to be verified are one to create Or the verifying routing of multiple subcards to be verified, and based on the verifying routing created, via logical with set IP address Letter connection circuit unit is communicated to execute subcard verifying with one or more of subcards to be verified, so as to smaller Space come be easily accomplished subcard verifying so that subcard verifying equipment spatial volume reduce and cost drop significantly It is low.
According to the one aspect of the application, a kind of subcard verification method is provided, including:Via with set IP The communication connection circuit unit of location obtains the sequence number information of one or more subcards to be verified, wherein the communication connection electricity Road unit is configured as being communicatively coupled with one or more of subcards to be verified;Utilize the IP address and acquired The sequence number information of one or more subcards to be verified creates the verifying routing of one or more of subcards to be verified;And Verifying routing based on the one or more of subcards to be verified created, comes via the communication connection circuit unit to institute One or more subcards to be verified are stated to be verified.
Preferably, in an example of present aspect, there are upstream and downstream between one or more of subcards to be verified When relationship, using the sequence number information of the IP address and acquired one or more subcard to be verified, create one Or the verifying routing of multiple subcards to be verified may include:Utilize the IP address and acquired one or more son to be verified Upstream-downstream relationship between the sequence number information of card and one or more of subcards to be verified creates one or more of The verifying of subcard to be verified routes, wherein the verifying routing of the subcard to be verified with relationship upstream is arranged to prior to tool There is the subcard to be verified of downstream relationship.
Preferably, in an example of present aspect, based on testing for the one or more of subcards to be verified created Card routing, via the communication connection circuit unit come to one or more of subcards to be verified carry out verify may include with It is at least one of lower:Verify the validity of the port I/O of each subcard in one or more of subcards to be verified;Verifying The validity of the bus of each subcard in one or more of subcards to be verified;Verify one or more of sons to be verified The validity of the memory of each subcard in card;Verify the key of each subcard in one or more of subcards to be verified Whether operating voltage/electric current of circuit/chip is normal;Verify the pass of each subcard in one or more of subcards to be verified Whether key circuit/chip temperature parameter is normal;It is the incidence relation verified between one or more of subcards to be verified It is no correct.
Preferably, in an example of present aspect, based on testing for the one or more of subcards to be verified created Card routes, and may include to carry out verifying to one or more of subcards to be verified via the communication connection circuit unit: Verifying routing and subcard verifying logic based on the one or more of subcards to be verified created, via the communication link Circuit unit is connect to verify to one or more of subcards to be verified.
Preferably, in an example of present aspect, the subcard verifying logic can be input by user or preparatory It is arranged.
Preferably, in an example of present aspect, the subcard verification method can also include:Based on acquired institute The sequence number information for stating one or more subcards to be verified, obtains the ginseng of one or more of subcards to be verified from memory Examine characteristic information, wherein the fixed reference feature information of one or more of subcards to be verified with it is one or more of to be verified The sequence number information of subcard is correspondingly stored in the memory, and one or more of to be verified based on what is created The verifying of subcard routes, and verifying via the communication connection circuit unit to one or more of subcards to be verified can To include:Based on the one or more of subcards to be verified created verifying routing and it is one or more of to be verified The fixed reference feature information of subcard tests one or more of subcards to be verified via the communication connection circuit unit Card.
Preferably, in an example of present aspect, the subcard verification method can also include:Via with described logical Letter connection circuit unit, obtains the version information of one or more of subcards to be verified, and based on acquired described one The sequence number information of a or multiple subcards to be verified, the reference that one or more of subcards to be verified are obtained from memory are special Reference ceases:Based on the sequence number information and version information of acquired one or more of subcards to be verified, from The fixed reference feature information of one or more of subcards to be verified is obtained in the memory, wherein it is one or more of to The fixed reference feature information for verifying subcard is corresponding with the sequence number information of one or more of subcards to be verified and version information Ground stores in the memory.
Preferably, in an example of present aspect, one or more of cards to be tested may include one in following It is a or multiple:Serial voltage identification card, control system power card, motherboard power supply card, numerical value input-output card, control card, circuit Scan card, temperature control card, reserve card, multifunction card, hard disk card, video card, audio card, Ethernet card, data capture card, SATA card, serial card, CPU/ chip test card and camera driving/control card.
Preferably, in an example of present aspect, when one or more of subcards to be verified include control card, institute It states control card and is used as the communication connection circuit unit.
According to the another aspect of the application, a kind of subcard verifying device is provided, including:Information acquisition unit is configured To obtain the sequence number letter of one or more subcards to be verified via the communication connection circuit unit with set IP address Breath, wherein the communication connection circuit unit is configured as being communicatively coupled with one or more of subcards to be verified;It tests Establishing route unit is demonstrate,proved, is configured as believing using the sequence number of the IP address and acquired one or more subcard to be verified Breath creates the verifying routing of one or more of subcards to be verified;And subcard authentication unit, it is configured as being based on being created One or more of subcards to be verified verifying routing, come via the communication connection circuit unit to one or more A subcard to be verified is verified.
Preferably, in an example of present aspect, there are upstream and downstream between one or more of subcards to be verified When relationship, the verifying establishing route unit be can be configured as:Using the IP address and it is acquired it is one or more to The upstream-downstream relationship between the sequence number information and one or more of subcards to be verified of subcard is verified, is created one Or the verifying routing of multiple subcards to be verified, wherein the verifying routing of the subcard to be verified with relationship upstream is arranged to excellent Prior to the subcard to be verified with downstream relationship.
Preferably, in an example of present aspect, the subcard authentication unit may include at least one of the following: I/O port authorization module, the port I/O for each subcard being configured to verify that in one or more of subcards to be verified have Effect property;Bus verification module, the bus for each subcard being configured to verify that in one or more of subcards to be verified have Effect property;Memory verification module is configured to verify that the memory of each subcard in one or more of subcards to be verified Validity;Operating voltage/current verification module, the every height being configured to verify that in one or more of subcards to be verified Whether Key Circuit/chip operating voltage/electric current of card is normal;Temperature parameter authentication module is configured to verify that described one Whether Key Circuit/chip temperature parameter of each subcard in a or multiple subcards to be verified is normal;It is associated with subcard It is authentication module, is configured to verify that whether the incidence relation between one or more of subcards to be verified is correct.
Preferably, in an example of present aspect, the subcard authentication unit can be further configured to:Based on institute The verifying routing of one or more of subcards to be verified of creation and subcard verifying logic, via the communication connection circuit Unit verifies one or more of subcards to be verified.
Preferably, in an example of present aspect, the subcard verifying device may include:Memory is configured as One or more of subcards to be verified are stored in association with the sequence number information of one or more of subcards to be verified Characteristic information and the information acquisition unit are further configured to:Based on acquired one or more of to be verified The sequence number information of subcard obtains the fixed reference feature information of one or more of subcards to be verified from the memory, with And the subcard authentication unit is further configured to:Verifying road based on the one or more of subcards to be verified created By and one or more of subcards to be verified fixed reference feature information, come via the communication connection circuit unit to described One or more subcards to be verified are verified.
Preferably, in an example of present aspect, the fixed reference feature information of one or more of subcards to be verified with The sequence number information and version information of one or more of subcards to be verified are correspondingly stored in the memory, described Information acquisition unit is further configured to:Via with the communication connection circuit unit, obtain it is one or more of to Verify the version information of subcard;And sequence number information and version based on acquired one or more of subcards to be verified Information obtains the fixed reference feature information of one or more of subcards to be verified from memory.
According to the another aspect of the application, a kind of subcard verifying device is provided, including:One or more processors are deposited Reservoir, the memory store instruction, when described instruction is executed by one or more of processors so that it is one or Multiple processing execute method as described above.
According to the another aspect of the application, a kind of subcard verifying system is provided, including:Subcard verifying dress as described above It sets;Communicate to connect circuit unit;Verification result output unit;And one or more power supply units, wherein the verification result Output unit is configured as being connected via data line with subcard verifying device, and one or more of power supply units are configured To be connected with one or more subcard, the subcard authentication unit and the verification result output units to be verified, the communication Connection circuit unit is configured as being communicatively coupled with one or more of subcards to be verified.
Preferably, in an example of present aspect, the subcard verifying system can also include:IP address setting is single Member;It is connected with the communication connection circuit unit, is configured as that the IP address of the communication connection circuit unit is arranged.
Preferably, in an example of present aspect, the subcard verifying system can also include:Subcard housing unit, It is configured as accommodating one or more of subcards to be verified.
Preferably, in an example of present aspect, one or more of power supply units may include:Power module; And power distribution module, with the power module, one or more of subcard, the subcard authentication unit and institutes to be verified Verification result output unit is stated to be connected, be configured as to one or more of subcards to be verified, the subcard authentication unit and The verification result output unit distributes corresponding voltage.
Preferably, in an example of present aspect, one or more of cards to be tested may include one in following It is a or multiple:Serial voltage identification card, control system power card, motherboard power supply card, numerical value input-output card, control card, circuit Scan card, temperature control card, reserve card, multifunction card, hard disk card, video card, audio card, Ethernet card, data capture card, SATA card, serial card, CPU/ chip test card and camera driving/control card.
It, can be by utilizing set IP address and one using subcard verification method, the apparatus and system of the application Or the sequence number information of multiple subcards to be verified routes to create the verifying of one or more of subcards to be verified, and is based on institute The verifying of creation routes, via with set IP address communication connection circuit unit with it is one or more of to be verified Subcard is communicated to execute subcard verifying, makes it possible to verify with lesser space to be easily accomplished subcard, so that The spatial volume of subcard verifying equipment reduces and cost substantially reduces.
In addition, using subcard verification method, the apparatus and system of the application, by utilizing the IP address, one Or the sequence number information of multiple subcards to be verified and the upstream-downstream relationship of one or more of subcards to be verified create son Card verifying routing, can make subcard verify more efficient, time-consuming shorter.
In addition, using subcard verification method, the apparatus and system of the application, by believing the fixed reference feature of subcard to be verified The sequence number information of breath and subcard to be verified is stored in association in the memory of subcard authentication unit, so as to be based on institute The fixed reference feature information of storage determines which component failure of subcard to be verified so that subcard verification result more subject to Really.
In addition, passing through the verifying logic in subcard authentication unit using subcard verification method, the apparatus and system of the application Receiving module come receive user input expectation subcard verifying logic, can enable to be verified according to the expectation of user Logic adjustment.
In addition, using subcard verification method, the apparatus and system of the application, by utilizing single power supply module and power supply point One or more power supply units are realized with module, it is possible to reduce the number of required power supply unit, to further decrease subcard The cost of verifying system.
Detailed description of the invention
By referring to following attached drawing, may be implemented to further understand the nature and advantages of present disclosure.? In attached drawing, similar assembly or feature can have identical appended drawing reference.
Fig. 1 shows the exemplary block diagram that system is verified according to the subcard of the application;
Fig. 2 shows the block diagrams of an implementation example of the subcard verifying device in Fig. 1;
Fig. 3 shows the corresponding relationship between sequence number information, version information and the fixed reference feature information of subcard to be verified Table;
Fig. 4 shows an exemplary flow chart of the subcard verification method according to the application;
Fig. 5 shows another exemplary flow chart of the subcard verification method according to the application;
Fig. 6 shows another exemplary flow chart of the subcard verification method according to the application;
Fig. 7 shows the block diagram of the computer system of subcard verifying device;With
Fig. 8 shows the block diagram of an implementation example of the power supply unit in Fig. 1.
Specific embodiment
Theme described herein is discussed referring now to example embodiment.It should be understood that discussing these embodiments only It is in order to enable those skilled in the art can better understand that being not to claim to realize theme described herein Protection scope, applicability or the exemplary limitation illustrated in book.It can be in the protection scope for not departing from present disclosure In the case of, the function and arrangement of the element discussed are changed.Each example can according to need, omit, substitute or Add various processes or component.For example, described method can be executed according to described order in a different order, with And each step can be added, omits or combine.In addition, feature described in relatively some examples is in other examples It can be combined.
As used in this article, term " includes " and its modification indicate open term, are meant that " including but not limited to ". Term "based" indicates " being based at least partially on ".Term " one embodiment " and " embodiment " expression " at least one implementation Example ".Term " another embodiment " expression " at least one other embodiment ".Term " first ", " second " etc. may refer to not Same or identical object.Here may include other definition, either specific or implicit.Unless bright in context It really indicates, otherwise the definition of a term is consistent throughout the specification.
The embodiment of the subcard verifying system of the application is described presently in connection with attached drawing.
Fig. 1 shows the block diagram that an implementation example of system 10 is verified according to the subcard of the application.As shown in Figure 1, It includes subcard verifying device 120, communication connection circuit unit 130, verification result output unit 140 and one that subcard, which verifies system 10, A or multiple power supply lists 160.
Communicating to connect circuit unit 130 has set IP address, and is configured as to be verified with one or more Subcard 110-1,110-2,110-3 and 110-4 are communicatively coupled.Here, set IP address for example can be subcard and test An IP address in the IP address range stored in card device 120.Preferably, in one example, circuit list is communicated to connect The IP address of member 130 can be arranged by IP address setting unit 150.The IP address setting unit 150 can use hardware Or software is realized, for example is realized using toggle switch, shorting stub, connector conversion or using software control corresponding data position.
Subcard verifying device 120 is configured as being led to using set IP address with communication connection circuit unit 130 Thus letter exchange information with one or more subcards to be verified by communication connection circuit unit 130, thus verifying one with The validity of multiple subcards to be verified 110, that is, subcard 110 to be verified is good card or failure card.Specifically, subcard verifying dress 120 are set via the communication connection circuit unit with set IP address, obtains the sequence of one or more subcards to be verified Number information, wherein the communication connection circuit unit is communicatively coupled with one or more of subcards to be verified;Using institute The sequence number information for stating IP address and acquired one or more subcard to be verified, creates one or more of sons to be verified The verifying of card routes;And the verifying routing based on the one or more of subcards to be verified created, via the communication Circuit unit is connected to verify to one or more of subcards to be verified.In fig. 1 it is shown that 4 subcards to be verified 110-1,110-2,110-3 and 110-4.It in other examples, also may include more or fewer subcards to be verified.
Subcard can refer to the additional card being additional on computer adaptive card.In the example of the application, subcard can To include one of the following or multiple:Serial voltage identification card (SVID card), control system power card (CSPS card), mainboard electricity Source card (MBPS card), numerical value input-output card (DD card), control card (CC card), circuit sweeps card (BS card), temperature control card (TC Card), reserved card (SP card), multifunction card (MF card), hard disk card (DC card), video card, audio card, Ethernet card, data capture Card, SATA (Serial Advanced Technology Attachment) card, serial card, CPU/ chip test card and camera driving/control card.In addition, excellent Selection of land, when one or more of subcards to be verified include control card, the control card is used as the communication connection Circuit unit is communicated to verify device 120 with subcard.In such a case, it is possible to omit communication connection circuit unit 130.
Subcard verifying device 120 is connected via data line with verification result output unit 140.Verification result output unit 140 are configured as the subcard verification result of output subcard verifying device 120.In one example, verification result output unit 140 It may include at least one of the following:Show equipment, audio frequency apparatus and alarm equipment.The display equipment for example can be aobvious Show device, touch screen display etc., is used for display subcard verification result.The audio frequency apparatus for example can be loudspeaker etc., be used for Subcard verification result is exported with voice mode.The alarm equipment for example can be buzzer, flashing lamp etc., for sound, light Etc. alarm modes be output to the outside subcard verification result.
Moreover it is preferred that in the case where verification result output unit 140 is display equipment, verification result output unit 140 can be with display subcard authentication progress information.The progress information may include the specific steps of subcard verifying, such as subcard The verifying logic of verifying, such as the I/O port authorization of subcard, bus verification, memory verification, operating voltage/current verification, temperature Spend the communications status information between Verification, the authentication progress information that subcard logical relation is verified and subcard.In addition, excellent Selection of land can also input the desired subcard verifying logic of user via verification result output unit 140.
One or more power supply units 160 and one or more subcard 110, subcard verifying device 120 and verifyings to be verified As a result output unit 140 is connected, and is configured as to one or more subcard 110, subcard authentication unit 120 and verifying knots to be verified Fruit output unit 140 provides corresponding supply voltage.Here, it is each to can according to need offer for one or more power supply units 160 Kind voltage, the voltage for example may include 220V AC, 24V DC, 12V D, 5V DC, 3.3V DC etc..For example, being tested in subcard Card device 120 is 220VAC can be provided for subcard authentication unit 120, in son to be verified in the case where being realized by calculating equipment In the case that card includes CSPS card and TC card, 24V DC can be provided for CSPS card and TC card.
Fig. 2 shows the block diagrams of an implementation example of the subcard verifying device 120 in Fig. 1.As shown in Fig. 2, subcard Verifying device 120 may include information acquisition unit 121, verifying establishing route unit 123 and subcard authentication unit 125.
Information acquisition unit 121 is connected with the communication connection circuit unit 130 with set IP address, is configured as Via communication connection circuit unit 130, the sequence number information of one or more subcards 110 to be verified is obtained.For example, acquisition of information Unit 121 can read the sequence number of each subcard to be verified by communication control unit 150.The sequence number information storage On subcard to be verified, it can be and be made of multiple letter and numbers, for example, the sequence number information can be TAC0001009。
Verifying establishing route unit 123 is configured as utilizing the IP address and acquired one or more son to be verified The sequence number information of card creates the verifying routing of one or more of subcards to be verified.Verifying routing refer to one or The verifying routing information of multiple subcards, that is, subcard verify device use come in verifying to subcard to be verified transmission information or visit The path asked.The verifying routing is usually to be made of IP address and sequence number information.In addition, in one example, it is described to test Card routing can also include the precedence information in verifying implementation procedure.For example, there are the feelings of upstream-downstream relationship between subcard Condition, verifying establishing route unit 123 are configured as utilizing the IP address and acquired one or more subcards to be verified Upstream-downstream relationship between sequence number information and one or more of subcards to be verified routes to create the verifying, In, the verifying routing of the subcard to be verified with relationship upstream is created as prior to the subcard to be verified with downstream relationship. Here, the upstream-downstream relationship between subcard mainly according to subcard operating condition and subcard itself whether have expand fault coverage come Determining.In general, the verification result of the subcard with relationship upstream can generate the verification result of the subcard with downstream relationship It influences.For example, the subcard with downstream relationship is tested in the abnormal situation of verification result of the subcard with relationship upstream Demonstrate,proving result generally also can be abnormal, alternatively, in this case, verification result inaccuracy to the subcard with downstream relationship or Person can not achieve verification process.For example, control card, control system power card, motherboard power supply card, circuit sweeps card etc. can be set It is set to relationship upstream, and temperature card, multifunction card etc. can be set to downstream relationship.
Subcard authentication unit 125 is configured as the verifying road based on the one or more of subcards to be verified created By being verified via communication connection circuit unit 130 to one or more of subcards to be verified.
In one example, subcard authentication unit 125 may include one of the following or multiple:It is I/O authentication module, total Line authentication module, memory verification module, operating voltage/current verification module and temperature authentication module.
I/O authentication module is configured to verify that the validity of the port I/O of subcard to be verified.In verifying, I/O verifies mould Block sends data and/or code to the port I/O of subcard 110 to be verified, and read subcard 110 to be verified the port I/O it is defeated Out, then read output result is matched with the data and/or code inputted.If successful match is verified By and export the successful verification result of I/O port authorization.Otherwise, authentication failed exports the verification result of I/O port failure.
Bus verification module is configured to verify that the validity of bus.In verifying, bus verification module is to son to be verified The bus of card sends binary code sequence, and reads the output of bus as a result, read bus is then exported result and institute The binary code sequence of transmission is matched.If successful match, it is verified and verifying knot that output bus is proved to be successful Fruit.Otherwise, authentication failed, the verification result of output bus failure.
Memory verification module is configured to verify that the validity of memory.Verifying when, memory verification module to The memory write-in message and/or application program for verifying subcard, then read message and/or application program from memory.If Compared with the message and/or application program that are written, in read message and/or application program, there are message and/or answer It is lost with program, then authentication failed, and the verification result of output storage failure.Otherwise, it is verified and output storage is tested Demonstrate,prove successful verification result.
Operating voltage/current verification module is configured to verify that each subcard in one or more of subcards to be verified Key Circuit/chip operating voltage/electric current it is whether normal.Specifically, Key Circuit/chip of subcard to be verified is monitored Operating voltage/electric current, and the operating voltage/electric current monitored is compared with the design specification threshold value of the subcard.If institute Operating voltage/electric current of monitoring is then verified in design specification threshold range and output services voltage/current is proved to be successful Verification result, otherwise, authentication failed simultaneously exports Key Circuit/failure of chip verification result.
Temperature parameter authentication module is configured to verify that the pass of each subcard in one or more of subcards to be verified Whether key circuit/chip temperature parameter is normal.Specifically, Key Circuit/chip temperature value of subcard to be verified is monitored simultaneously Check exhaust fan state.When the temperature value monitored is more than the design specification threshold value of the subcard and exhaust fan does not work, Exhaust fan work is triggered, and further monitors the temperature value in exhaust fan work.If in the case where exhaust fan work, institute The temperature value monitored is more than design specification threshold value, then authentication failed and exports Key Circuit/failure of chip verification result.It is no Then, it is verified and verification result that output temperature is proved to be successful.
Moreover it is preferred that subcard authentication unit 125 can also include subcard incidence relation authentication module, it is configured as testing Whether the incidence relation demonstrate,proved between one or more of subcards to be verified is correct.Specifically, in test, subcard logic checking Module is configured as obtaining the incidence relation between subcard, and the son that will be stored in acquired subcard incidence relation and memory Card incidence relation is matched.If successful match, it is verified and exports the successful verification result of subcard correlating validation.It is no Then, authentication failed and the verification result of subcard relevant fault is exported.
Preferably, in the example of the application, it can also include memory (not shown) that subcard, which verifies device 120, It is configured as storing in association with the sequence number information of one or more subcards 110 to be verified one or more of to be verified The fixed reference feature information of subcard.The fixed reference feature information may include operating voltage/current design specification of subcard to be verified Threshold value, temperature design specification threshold value and/or subcard incidence relation information.In such case, subcard verifying device 120 is configured as Based on the fixed reference feature information of the one or more subcard to be verified stored in memory, to one or more sons to be verified Card is verified.For example, as described above, operating voltage/current verification module, temperature parameter authentication module, subcard correlating validation Module is individually configured as based on the operating voltage stored/current design specification threshold value, temperature design specification threshold value and/or son Card incidence relation information, to be compared with detected working voltage current value, temperature parameter value and/or subcard related information Compared with to verify, whether Key Circuit/chip operating voltage/electric current is normal, whether Key Circuit/chip temperature parameter is normal And/or whether subcard incidence relation is correct.
Preferably, one or more of in one or more of subcards to be verified there are in the case where version information The fixed reference feature information of subcard to be verified can be related to the sequence number of one or more of subcards to be verified and version information In memory, Fig. 3 is shown between sequence number information, version information and the fixed reference feature information of subcard to be verified the storage of connection ground Mapping table.For same type of subcard, in the case where sequence number information and/or different version information, reference Characteristic information may be the same or different.In addition, being directed to different types of subcard, the fixed reference feature information stored can also With difference.For example, the fixed reference feature information may include operating voltage/current design specification threshold value, temperature of subcard to be verified Spend design specification threshold value and/or subcard incidence relation information etc..
Moreover it is preferred that in one example, it can also include that subcard verifying logic receives list that subcard, which verifies device 120, First (not shown).Subcard verifying logic receiving unit is configured as receiving inputted subcard verifying logic, for example, can receive The subcard verifying logic that user inputs via display unit.Here, subcard verifying logic refers to about which subcard in subcard Component is by the information of to be authenticated and daughter card components verifyings sequence (that is, verifying priority).In addition, the subcard verifying is patrolled Collecting can also include that subcard verifying terminates logical message.Once the subcard verifying, which terminates logical message, can be appointing in subcard One component, which is verified failure just, terminates subcard verifying.Alternatively, the subcard verifying terminates logical message and can be only in subcard In all components all complete just to terminate subcard verifying after verification process.Alternatively, in another preferred embodiment, it can be right Subcard divides priority (such as subcard is divided into the first priority, second priority etc.), and in this case, the subcard is tested Once card, which terminates logic, can be high priority subcard authentication failed, just terminate the verifying of low priority subcard.Then, subcard is verified Unit 125 utilizes the created received subcard verifying logic of verifying routing and institute, to one or more subcards 110 to be verified It is verified.In another example, the subcard verifying logic is also possible to be set in advance in subcard verifying device 120.
Here, I/O authentication module, bus verification module, memory verification module, operating voltage/current verification module and The operation of temperature parameter authentication module can be routed with the received subcard verifying logic of institute based on verifying obtained and be controlled System.
For example, received subcard verifying logic be to terminate subcard once any component in subcard is verified failure It, can be by I/O authentication module, bus verification module, memory verification module, operating voltage/current verification in the case where verifying One or more controls in module and temperature parameter authentication module operate for serial verification operation or parallel proof, as long as and I/O authentication module, bus verification module, memory verification module, operating voltage/current verification module and temperature parameter verify mould Authentication failed, which occurs, for any authentication module in block just terminates verification process.
Alternatively, in another example, verifying end logical message in the subcard can be owning only in subcard Component is all completed in the case where just terminating subcard verifying after verification process, can by I/O authentication module, bus verification module, deposit Reservoir authentication module, operating voltage/current verification module and the control of temperature parameter authentication module are for serial verification operation or parallel Verification operation, and each for all authentication modules completes verification process, but regardless of the verifying of other authentication modules As a result how.
Alternatively, in another example, once subcard verifying, which terminates logic, can be high priority subcard authentication failed, Just terminate the verifying of low priority subcard, for example, operating voltage/current verification module priority is set above I/O verifying Module, bus verification module, the priority of memory verification module and temperature parameter authentication module, and I/O authentication module, The priority of bus verification module, memory verification module and temperature parameter authentication module is equal.In such a case, it is possible to I/O authentication module, bus verification module, memory verification module, operating voltage/current verification module and temperature parameter are verified Module control operates for serial verification operation or parallel proof, once and operating voltage/current verification module authentication failed, Just terminate the verification operation of remaining authentication module, or in operating voltage/when being proved to be successful of current verification module, for I/O Each of authentication module, bus verification module, memory verification module and temperature parameter authentication module are all completed authenticated Journey, but regardless of other authentication modules verification result how.
It is described referring to Fig. 4 to Fig. 6 by verifying the subcard verification process that device executes according to the subcard of the application.
Fig. 4 shows an exemplary flow chart of the subcard verification method according to the application.As shown in figure 4, firstly, In S110, after completing IP address setting to communication connection circuit unit 130, it is set via having that subcard verifies device 120 IP address communication connection circuit unit 130, obtain the sequence number information of one or more subcards 110 to be verified.Here, lead to Letter connection circuit unit 130 is communicatively coupled with one or more subcards 110 to be verified.Then, in S120, subcard verifying dress Set 120 using the IP address and acquired one or more subcards to be verified sequence number informations, create it is one or The verifying of multiple subcards to be verified routes.Then, in S130, it is one or more based on what is created that subcard verifies device 120 The verifying of a subcard to be verified routes, via the communication connection circuit unit come to one or more of subcards to be verified into Row verifying.
It, can be by utilizing set IP address and one or more subcards to be verified using above-mentioned subcard verification method Sequence number information come create one or more of subcards to be verified verifying routing, and based on created verifying routing, It is communicated to come with one or more of subcards to be verified via the communication connection circuit unit with set IP address Subcard verifying is executed, makes it possible to verify with lesser space to be easily accomplished subcard, so that subcard verifying equipment Spatial volume reduces and cost substantially reduces.
Preferably, in one example, the verifying routing based on the one or more of subcards to be verified created, warp By the communication connection circuit unit come to one or more of subcards to be verified carry out verifying may include in following extremely Few one kind:Verify the validity of the port I/O of each subcard in one or more of subcards to be verified;It verifies one Or the validity of the bus of each subcard in multiple subcards to be verified;It verifies every in one or more of subcards to be verified The validity of the memory of a subcard;Verify Key Circuit/core of each subcard in one or more of subcards to be verified Whether operating voltage/electric current of piece is normal;Verify the Key Circuit of each subcard in one or more of subcards to be verified/ Whether the temperature parameter of chip is normal;Whether the incidence relation between the one or more of subcards to be verified of verifying is correct.
Moreover it is preferred that in one example, subcard, which verifies device 120, to include memory (not shown), matched It is set to and stores one or more of subcards to be verified in association with the sequence number information of one or more subcards 110 to be verified Fixed reference feature information.In this case, the subcard verification method can also include:Based on acquired one or The sequence number information of multiple subcards to be verified obtains the fixed reference feature letter of one or more of subcards to be verified from memory Breath.Then, subcard verifying device 120 based on the one or more of subcards to be verified created verifying routing and it is described The fixed reference feature information of one or more subcards to be verified, comes via the communication connection circuit unit to one or more of Subcard to be verified is verified.
Using above-mentioned subcard verification method, by the way that the sequence number of the characteristic information of subcard to be verified and subcard to be verified is believed Breath is stored in association in the memory of subcard authentication unit, so as to be determined based on the fixed reference feature information stored Which component failure of subcard to be verified, so that subcard verification result is more accurate.
In addition, it is highly preferred that in one example, the memory in subcard verifying device 120 can be further configured For the sequence number information with one or more subcards 110 to be verified, version information store in association it is one or more of to Verify the fixed reference feature information of subcard.In this case, the subcard verification method can also include:Via with described logical Letter connection circuit unit, obtains the sequence number information and version information of one or more of subcards to be verified.Then, subcard is tested Card device 120 can be based on the sequence number information and version information of acquired one or more of subcards to be verified, from depositing The fixed reference feature information of one or more of subcards to be verified is obtained in reservoir.
Fig. 5 shows another exemplary flow chart of the subcard verification method according to the application.As shown in figure 5, firstly, In S110, after completing IP address setting to communication connection circuit unit 130, it is set via having that subcard verifies device 120 IP address communication connection circuit unit 130, obtain the sequence number information of one or more subcards 110 to be verified.Here, lead to Letter connection circuit unit 130 is communicatively coupled with one or more subcards 110 to be verified.Then, in S115, described in judgement It whether there is upstream-downstream relationship between subcard to be verified.If there is no upstream-downstream relationship, then proceed to S120.In S120, son Card verifying device 120 creates institute using the sequence number information of the IP address and acquired one or more subcard to be verified State the verifying routing of one or more subcards to be verified.If there is upstream-downstream relationship, then proceed to S125.In S125, utilize The sequence number information of the IP address and acquired one or more subcards to be verified and one or more of to be verified Upstream-downstream relationship between subcard creates the verifying routing of one or more of subcards to be verified, wherein have relationship upstream Subcard to be verified verifying routing be arranged to prior to the subcard to be verified with downstream relationship.
Then, in S130, subcard verifies verifying of the device 120 based on the one or more of subcards to be verified created Routing, verifies one or more of subcards to be verified via the communication connection circuit unit.
Using above-mentioned subcard verification method, by utilizing the IP address, the sequence of one or more of subcards to be verified The upstream-downstream relationship of row information and one or more of subcards to be verified routes to create subcard verifying, can make son Card is verified more efficient, time-consuming less.
Fig. 6 shows another exemplary flow chart of the subcard verification method according to the application.As shown in fig. 6, firstly, In S110, after completing IP address setting to communication connection circuit unit 130, it is set via having that subcard verifies device 120 IP address communication connection circuit unit 130, obtain the sequence number information of one or more subcards 110 to be verified.Here, lead to Letter connection circuit unit 130 is communicatively coupled with one or more subcards 110 to be verified.Then, in S120, subcard verifying dress Set 120 using the IP address and acquired one or more subcards to be verified sequence number informations, create it is one or The verifying of multiple subcards to be verified routes.Then, in S127, subcard verifying logic is judged whether there is.If there is no subcard Verifying logic, then in S130, subcard verifies verifying road of the device 120 based on the one or more of subcards to be verified created By being verified via the communication connection circuit unit to one or more of subcards to be verified.If there is subcard Verifying logic, then in S130 ', subcard verifies verifying of the device 120 based on the one or more of subcards to be verified created Routing and subcard verifying logic to carry out one or more of subcards to be verified via the communication connection circuit unit Verifying.Here, the subcard verifying logic is input by user or pre-set.In one example, the subcard is tested Card logic for example may include testing for the I/O port authorization of subcard, bus verification, memory verification, operating voltage/circuit Verifying logic relationship between card, temperature parameter verifying and/or the verifying of subcard incidence relation.
It is defeated to receive user by the verifying logic receiving module in subcard authentication unit using above-mentioned subcard verification method The expectation subcard verifying logic entered can enable to carry out subcard verifying logic adjustment according to the expectation of user.
In this application, subcard verifying device 120, which can use, calculates equipment realization.Fig. 7 is shown according to the application's The block diagram of the computer system of the subcard verifying device of embodiment.According to one embodiment, computer system 200 may include One or more processors 201, processor 201 execute the storage in computer readable storage medium (that is, memory 202) or compile One or more computer-readable instructions (that is, above-mentioned element realized in a software form) of code.Computer system 200 can wrap Include the output equipment 203 of display and the input equipment 204 of keyboard, mouse, touch screen etc..Computer system 200 may include communication interface 205, and communication interface 205 is used for and communication connection circuit unit 130 such as shown in FIG. 1 and tests Demonstrate,prove the other equipment communication of result output unit 140 etc..
In one embodiment, computer executable instructions are stored in memory 202, make when implemented one or Multiple processors 201:Via the communication connection circuit unit with set IP address, one or more sons to be verified are obtained The sequence number information of card, wherein the communication connection circuit unit communicably connects with one or more of subcards to be verified It connects;Using the sequence number information of the IP address and acquired one or more subcard to be verified, create one or more The verifying of a subcard to be verified routes;And the verifying routing based on the one or more of subcards to be verified created, warp One or more of subcards to be verified are verified by the communication connection circuit unit.
It should be understood that the computer executable instructions stored in memory 202 make one or more places when implemented It manages device 201 and carries out the above various operations and functions described in conjunction with Fig. 1-6 in each embodiment of the application.
According to one embodiment, a kind of program product of such as non-transitory machine readable media is provided.It is described non-temporary When property machine readable media can have instruction (that is, above-mentioned element realized in a software form), which, which works as, is executable by a machine When, so that machine executes the above various operations and functions described in conjunction with Fig. 1-6 in each embodiment of the application.
In addition, in another example of the application, each component units in subcard verifying device 120 can be using than The stand-alone assembly constituted such as the hardware chip of FPGA etc.It is mutually interconnected between various components using one or more data/address bus It connects.
Fig. 8 shows the block diagram of an implementation example of one or more power supply units 160 in Fig. 1.Such as Fig. 8 institute Show, one or more power supply units 160 may include power module 161 and power distribution module 163.Power module 161 is used for Export single power supply voltage, such as 220V AC.Power distribution module 163 is connected with power module 161, and is provided with one Or multiple voltage conversion circuits, voltage for exporting to power module 161 carry out voltage transformation, with provide it is one or more to Voltage needed for verifying subcard 110, subcard authentication unit 120 and verification result output unit 140.
Voltage distribution module 163 also with one or more subcard 110, subcard authentication unit 120 and verification results to be verified Output unit 140 is connected, and exports list to one or more subcard 110, subcard authentication unit 120 and verification results to be verified The 140 corresponding voltage of distribution of member.
Using above-mentioned subcard verification method, apparatus and system, by using single power supply module and power distribution module come Realize one or more power supply units, it is possible to reduce the number of required power supply unit, to further decrease subcard verifying system Cost.
Moreover it is preferred that subcard verifying system 10 can also include subcard housing unit (not shown).Subcard housing unit It is configured as accommodating one or more of subcards to be verified, for example, subcard housing unit can be vertical card slot type cabinet.Example Such as, one or more subcards 110 to be verified can be inserted in subcard housing unit in a manner of card slot.In addition, showing another In example, communication connection unit 130 be can be set in subcard housing unit, and one or more subcards to be verified 110 are with card The mode of slot is combined with communication connection unit 130.In one example, IP address setting unit 170 also can be set in son In card housing unit.IP address setting unit 170 can use toggle switch to realize.In other examples, IP address is arranged Unit 170 also can use other way realization.
The specific embodiment illustrated above in conjunction with attached drawing describes exemplary embodiment, it is not intended that may be implemented Or fall into all embodiments of the protection scope of claims." exemplary " meaning of the term used in entire this specification Taste " be used as example, example or illustration ", be not meant to than other embodiments " preferably " or " there is advantage ".For offer pair The purpose of the understanding of described technology, specific embodiment include detail.However, it is possible in these no details In the case of implement these technologies.In some instances, public in order to avoid the concept to described embodiment causes indigestion The construction and device known is shown in block diagram form.
The foregoing description of present disclosure is provided so that any those of ordinary skill in this field can be realized or make Use present disclosure.To those skilled in the art, the various modifications carried out to present disclosure are apparent , also, can also answer generic principles defined herein in the case where not departing from the protection scope of present disclosure For other modifications.Therefore, present disclosure is not limited to examples described herein and design, but disclosed herein with meeting Principle and novel features widest scope it is consistent.

Claims (21)

1. a kind of subcard verification method, including:
Via the communication connection circuit unit with set IP address, the sequence number of one or more subcards to be verified is obtained Information, wherein the communication connection circuit unit is configured as being communicatively coupled with one or more of subcards to be verified;
Using the sequence number information of the IP address and acquired one or more subcard to be verified, create one or more The verifying of a subcard to be verified routes, and the verifying routing is the verifying routing information of one or more of subcards to be verified, The verifying path is the path for being used to send information or access in verifying to one or more of subcards to be verified; And
Verifying routing based on the one or more of subcards to be verified created, via the communication connection circuit unit One or more of subcards to be verified are verified.
2. subcard verification method as described in claim 1, wherein there are upper between one or more of subcards to be verified When downstream relationship, using the sequence number information of the IP address and acquired one or more subcards to be verified, described in creation The verifying of one or more subcards to be verified, which routes, includes:
Utilize the sequence number information of the IP address and acquired one or more subcards to be verified and one or more Upstream-downstream relationship between a subcard to be verified creates the verifying routing of one or more of subcards to be verified, wherein have The verifying routing of the subcard to be verified of relationship upstream is arranged to prior to the subcard to be verified with downstream relationship.
3. subcard verification method as claimed in claim 1 or 2, wherein one or more of to be verified based on what is created The verifying of subcard routes, and carries out verifying packet to one or more of subcards to be verified via the communication connection circuit unit Include following at least one:
Verify the validity of the port I/O of each subcard in one or more of subcards to be verified;
Verify the validity of the bus of each subcard in one or more of subcards to be verified;
Verify the validity of the memory of each subcard in one or more of subcards to be verified;
Key Circuit/chip operating voltage/the electric current for verifying each subcard in one or more of subcards to be verified is It is no normal;
Whether just to verify Key Circuit/chip temperature parameter of each subcard in one or more of subcards to be verified Often;With
Whether the incidence relation verified between one or more of subcards to be verified is correct.
4. subcard verification method as claimed in claim 3, wherein based on the one or more of subcards to be verified created Verifying routing, via the communication connection circuit unit come to one or more of subcards to be verified carry out verify include:
Verifying routing and subcard verifying logic based on the one or more of subcards to be verified created, via described logical Letter connects circuit unit to verify to one or more of subcards to be verified.
5. subcard verification method as claimed in claim 4, wherein the subcard verifying logic is input by user or preparatory It is arranged.
6. subcard verification method as claimed in claim 1 or 2, further includes:
Based on the sequence number information of acquired one or more of subcards to be verified, obtained from memory it is one or The fixed reference feature information of multiple subcards to be verified, wherein the fixed reference feature information of one or more of subcards to be verified and institute The sequence number information for stating one or more subcards to be verified is correspondingly stored in the memory, and
Verifying routing based on the one or more of subcards to be verified created, via the communication connection circuit unit Carrying out verifying to one or more of subcards to be verified includes:
Verifying routing and acquired one or more based on the one or more of subcards to be verified created are to be tested The fixed reference feature information for demonstrate,proving subcard to carry out one or more of subcards to be verified via the communication connection circuit unit Verifying.
7. subcard verification method as claimed in claim 6, further includes:
Via the communication connection circuit unit, the version information of one or more of subcards to be verified is obtained, and
Based on the sequence number information of acquired one or more of subcards to be verified, obtained from memory it is one or The fixed reference feature information of multiple subcards to be verified includes:
Based on the sequence number information and version information of acquired one or more of subcards to be verified, from the memory Obtain the fixed reference feature information of one or more of subcards to be verified, wherein the ginseng of one or more of subcards to be verified The sequence number information and version information for examining characteristic information and one or more of subcards to be verified are correspondingly stored in described In memory.
8. the method for claim 1, wherein one or more of subcards to be verified include one of the following or more It is a:
Serial voltage identification card, control system power card, motherboard power supply card, numerical value input-output card, control card, circuit sweeps Card, reserved card, multifunction card, hard disk card, video card, audio card, Ethernet card, data capture card, SATA card, serial card and CPU/ chip test card.
9. method according to claim 8, wherein described when one or more of subcards to be verified include control card Control card is used as the communication connection circuit unit.
10. a kind of subcard verifies device, including:
Information acquisition unit, is configured as via the communication connection circuit unit with set IP address, obtain one or The sequence number information of multiple subcards to be verified, wherein the communication connection circuit unit be configured as with it is one or more of Subcard to be verified is communicatively coupled;
Establishing route unit is verified, the sequence using the IP address and acquired one or more subcard to be verified is configured as Row information creates the verifying routing of one or more of subcards to be verified, and the verifying routing is one or more of The verifying routing information of subcard to be verified, the verifying path are to be used in verifying to one or more of to be verified Subcard sends the path of information or access;And
Subcard authentication unit is configured as the verifying routing based on the one or more of subcards to be verified created, via The communication connection circuit unit verifies one or more of subcards to be verified.
11. subcard as claimed in claim 10 verifies device, wherein exist between one or more of subcards to be verified When upstream-downstream relationship, the verifying establishing route unit is configured as:
Utilize the sequence number information of the IP address and acquired one or more subcards to be verified and one or more Upstream-downstream relationship between a subcard to be verified creates the verifying routing of one or more of subcards to be verified, wherein have The verifying routing of the subcard to be verified of relationship upstream is arranged to prior to the subcard to be verified with downstream relationship.
12. subcard as described in claim 10 or 11 verifies device, wherein the subcard authentication unit include in following extremely Few one kind:
I/O port authorization module is configured to verify that the port I/O of each subcard in one or more of subcards to be verified Validity;
Bus verification module is configured to verify that the effective of the bus of each subcard in one or more of subcards to be verified Property;
Memory verification module is configured to verify that the memory of each subcard in one or more of subcards to be verified Validity;
Operating voltage/current verification module is configured to verify that each subcard in one or more of subcards to be verified Whether Key Circuit/chip operating voltage/electric current is normal;
Temperature parameter authentication module is configured to verify that the key electricity of each subcard in one or more of subcards to be verified Whether road/chip temperature parameter is normal;With
Subcard incidence relation authentication module is configured to verify that the incidence relation between one or more of subcards to be verified is It is no correct.
13. subcard as claimed in claim 12 verifies device, wherein the subcard authentication unit is further configured to:
Verifying routing and subcard verifying logic based on the one or more of subcards to be verified created, via described logical Letter connects circuit unit to verify to one or more of subcards to be verified.
14. subcard as described in claim 10 or 11 verifies device, wherein the subcard verifies device and includes:
Memory is configured as storing in association with the sequence number information of one or more of subcards to be verified one Or the fixed reference feature information of multiple subcards to be verified, and
The information acquisition unit is further configured to:
Based on the sequence number information of acquired one or more of subcards to be verified, described one is obtained from the memory The fixed reference feature information of a or multiple subcards to be verified, and
The subcard authentication unit is further configured to:
Verifying routing and acquired one or more based on the one or more of subcards to be verified created are to be tested The fixed reference feature information for demonstrate,proving subcard to carry out one or more of subcards to be verified via the communication connection circuit unit Verifying.
15. subcard as claimed in claim 14 verifies device, wherein the fixed reference feature of one or more of subcards to be verified The sequence number information and version information of information and one or more of subcards to be verified are correspondingly stored in the memory In, the information acquisition unit is further configured to:
Via the communication connection circuit unit, the version information of one or more of subcards to be verified is obtained;And
Based on the sequence number information and version information of acquired one or more of subcards to be verified, from the memory Obtain the fixed reference feature information of one or more of subcards to be verified.
16. a kind of subcard verifies device, including:
One or more processors,
Memory, the memory store instruction, when described instruction is executed by one or more of processors, so that described One or more processors execute the method as described in any in claims 1 to 9.
17. a kind of subcard verifies system, including:
Subcard as described in any in claim 10 to 15 verifies device;
Communicate to connect circuit unit;
Verification result output unit;And
One or more power supply units,
Wherein, the verification result output unit is configured as being connected via data line with subcard verifying device, and described one A or multiple power supply units are configured as and one or more subcard, the subcard authentication unit and the verification results to be verified Output unit is connected, and the communication connection circuit unit is configured as communicably connecting with one or more of subcards to be verified It connects.
18. system as claimed in claim 17, further includes:
IP address setting unit;It is connected with the communication connection circuit unit, is configured as that the communication connection circuit list is arranged The IP address of member.
19. the system as described in claim 17 or 18, further includes:
Subcard housing unit is configured as accommodating one or more of subcards to be verified.
20. the system as described in claim 17 or 18, wherein one or more of power supply units include:
Power module;And
Power distribution module, with the power module, one or more of subcard, the subcard authentication unit and institutes to be verified Verification result output unit is stated to be connected, be configured as to one or more of subcards to be verified, the subcard authentication unit and The verification result output unit distributes corresponding voltage.
21. the system as described in claim 17 or 18, wherein one or more of subcards to be verified include one in following It is a or multiple:
Serial voltage identification card, control system power card, motherboard power supply card, numerical value input-output card, control card, circuit sweeps Card, reserved card, multifunction card, hard disk card, video card, audio card, Ethernet card, data capture card, SATA card, serial card and CPU/ chip test card.
CN201710455372.7A 2017-06-16 2017-06-16 Subcard verification method, apparatus and system Expired - Fee Related CN107357695B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710455372.7A CN107357695B (en) 2017-06-16 2017-06-16 Subcard verification method, apparatus and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710455372.7A CN107357695B (en) 2017-06-16 2017-06-16 Subcard verification method, apparatus and system

Publications (2)

Publication Number Publication Date
CN107357695A CN107357695A (en) 2017-11-17
CN107357695B true CN107357695B (en) 2018-11-20

Family

ID=60272931

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710455372.7A Expired - Fee Related CN107357695B (en) 2017-06-16 2017-06-16 Subcard verification method, apparatus and system

Country Status (1)

Country Link
CN (1) CN107357695B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115983192B (en) * 2022-12-02 2023-12-26 芯华章科技(北京)有限公司 Verification system and method for configuring peripheral sub-card resources of verification system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201181998Y (en) * 2008-01-24 2009-01-14 陕西海基业高科技实业有限公司 Mobile phone endorsement and validation apparatus
CN104065660A (en) * 2014-06-27 2014-09-24 蓝盾信息安全技术有限公司 Remote host access control method
CN104168160A (en) * 2014-08-18 2014-11-26 浪潮(北京)电子信息产业有限公司 Method and device for testing compatibility of server

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8300555B2 (en) * 2008-01-30 2012-10-30 Qualcomm Incorporated Management of wireless relay nodes using identifiers
US8432914B2 (en) * 2010-11-22 2013-04-30 Force 10 Networks, Inc. Method for optimizing a network prefix-list search

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201181998Y (en) * 2008-01-24 2009-01-14 陕西海基业高科技实业有限公司 Mobile phone endorsement and validation apparatus
CN104065660A (en) * 2014-06-27 2014-09-24 蓝盾信息安全技术有限公司 Remote host access control method
CN104168160A (en) * 2014-08-18 2014-11-26 浪潮(北京)电子信息产业有限公司 Method and device for testing compatibility of server

Also Published As

Publication number Publication date
CN107357695A (en) 2017-11-17

Similar Documents

Publication Publication Date Title
US11871505B2 (en) Automated line testing
CN112134762B (en) Testing method, device, terminal and storage medium for block chain network structure
CN106059754A (en) Vehicle data processing method and system, and devices
CN110347232A (en) Uninterruptible power supply communication
CN106707143A (en) Chip internal logic verify system and method
CN103954011A (en) Indoor unit and outdoor unit matching method and device of air conditioning unit and air conditioning unit
CN109753391A (en) The systems, devices and methods of the functional test of one or more structures of processor
CN108347432A (en) Communication system, moving body and communication means
CN108965085A (en) Error detection method and device for electronic control unit (ECU)
CN107491055A (en) The test system and method for bus
CN107528829A (en) BMC chip, server end and its remote monitoring and administration method
CN107357695B (en) Subcard verification method, apparatus and system
CN103370713B (en) For the method programming mobile terminal device chip
CN106227032B (en) The method for controlling inverter
CN107395623A (en) Interface access data verification method and device, computer storage medium and equipment
CN104991864B (en) A kind of test method and device towards outreach system
EP2908498A1 (en) Integrated application generating system and method for internet of things terminal
CN103792867A (en) Electronic control apparatus and method for checking reset function
CN110417567A (en) A kind of configuration method and device of internet of things equipment
CN110489713A (en) For the method and system for controller zone network controller the configurating filtered device object
CN104065664B (en) A kind of Cloud Server verifies system
CN110267130A (en) A kind of remote configuring method and device of the optical network unit based on SDN
CN115879409B (en) Verification method, verification device, medium and electronic equipment
CN108896901B (en) DCU circuit self-checking system and detection method
JP2017163252A (en) Vehicle gateway device and program

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20181120