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- research-articleJune 2008
Automated hardware-independent scenario identification
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 954–959https://doi.org/10.1145/1391469.1391710Scenario-based design exploits the time-varying execution behavior of applications by dynamically adapting the system on which they run. This is a particularly interesting design methodology for media applications with soft realtime constraints such as ...
- research-articleJune 2008
Design of high performance pattern matching engine through compact deterministic finite automata
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 852–857https://doi.org/10.1145/1391469.1391685Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern matching, we identify its limitations and present two schemes, Label ...
- research-articleJune 2008
A practical reconfigurable hardware accelerator for Boolean satisfiability solvers
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 780–785https://doi.org/10.1145/1391469.1391669We present a practical FPGA-based accelerator for solving Boolean Satisfiability problems (SAT). Unlike previous efforts for hardware accelerated SAT solving, our design focuses on accelerating the most time consuming part of the SAT solver --- Boolean ...
- research-articleJune 2008
ADAM: run-time agent-based distributed application mapping for on-chip communication
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 760–765https://doi.org/10.1145/1391469.1391664Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-to-predict system scenarios occur. This drives the development of run-time adaptive systems. To the best of our knowledge, we are presenting the first scheme ...
- research-articleJune 2008
Control theory-based DVS for interactive 3D games
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 740–745https://doi.org/10.1145/1391469.1391659We propose a control theory-based dynamic voltage scaling (DVS) algorithm for interactive 3D game applications running on battery-powered portable devices. Using this scheme, we periodically adjust the game workload prediction based on the feedback from ...
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- research-articleJune 2008
Specify-explore-refine (SER): from specification to implementation
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 586–591https://doi.org/10.1145/1391469.1391617Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based environment for electronic system-level (ESL) design of space and satellite ...
- research-articleJune 2008
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 580–585https://doi.org/10.1145/1391469.1391616SystemCoDesigner is an ESL tool developed at the University of Erlangen-Nuremberg, Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of behavioral SystemC models. Together with Forte Design Systems, a fully automated ...
- research-articleJune 2008
Daedalus: toward composable multimedia MP-SoC design
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 574–579https://doi.org/10.1145/1391469.1391615Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which design space exploration (DSE), system-level synthesis, application ...
- research-articleJune 2008
Applying passive RFID system to wireless headphones for extreme low power consumption
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 486–491https://doi.org/10.1145/1391469.1391594One of major design concerns about wireless headphone is power consumption. In this paper, we propose a novel design for extreme low power headphone implementation by extending the EPC Class-1 Generation 2 RFID protocol for delivering stream data. We ...
- research-articleJune 2008
Cache modeling in probabilistic execution time analysis
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 319–324https://doi.org/10.1145/1391469.1391551Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution time analysis techniques borrowed from hard real-time systems domain are ...
- research-articleJune 2008
Miss reduction in embedded processors through dynamic, power-friendly cache design
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 304–309https://doi.org/10.1145/1391469.1391546Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result, traditional methods for addressing performance and determinism become ...
- research-articleJune 2008
Exploring locking & partitioning for predictable shared caches on multi-cores
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 300–303https://doi.org/10.1145/1391469.1391545Multi-core architectures consisting of multiple processing cores on a chip have become increasingly prevalent. Synthesizing hard real-time applications onto these platforms is quite challenging, as the contention among the cores for various shared ...
- research-articleJune 2008
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
- Swarup Mohalik,
- A. C. Rajeev,
- Manoj G. Dixit,
- S. Ramesh,
- P. Vijay Suman,
- Paritosh K. Pandya,
- Shengbing Jiang
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 296–299https://doi.org/10.1145/1391469.1391544End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In this paper we give a formal definition of end-to-end latency, and use this ...
- research-articleJune 2008
An automatic scratch pad memory management tool and MPEG-4 encoder case study
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 201–204https://doi.org/10.1145/1391469.1391520Using software-controlled Scratch-Pad Memory (SPM) in Systems-on-Chip has the potential of reducing power consumption by using design-time application knowledge to reduce memory accesses and processor stalls. This paper presents a fully automatic ...
- research-articleJune 2008
Energy-optimal software partitioning in heterogeneous multiprocessor embedded systems
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 191–196https://doi.org/10.1145/1391469.1391518Embedded systems with heterogeneous processors extend the energy/timing trade-off flexibility and provide the opportunity to fine tune resource utilization for particular applications. In this paper, we present a resource model that considers the time ...
- research-articleJune 2008
Feedback-controlled reliability-aware power management for real-time embedded systems
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 185–190https://doi.org/10.1145/1391469.1391517In recent literature it has been reported that Dynamic Power Management (DPM) may lead to decreased reliability in real-time embedded systems. The ever-shrinking device sizes contribute further to this problem. In this paper, we present a reliability ...
- research-articleJune 2008
Optimality and improvement of dynamic voltage scaling algorithms for multimedia applications
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 179–184https://doi.org/10.1145/1391469.1391516The time-varying workload for multimedia applications poses a great challenge for the efficient performance of dynamic voltage scaling (DVS) algorithms. While many DVS algorithms have been proposed for real-time applications, there does not yet exist a ...
- research-articleJune 2008
PicoCube: a 1 cm3 sensor node powered by harvested energy
- Yuen-Hui Chee,
- Mike Koplow,
- Michael Mark,
- Nathan Pletcher,
- Mike Seeman,
- Fred Burghardt,
- Dan Steingart,
- Jan Rabaey,
- Paul Wright,
- Seth Sanders
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 114–119https://doi.org/10.1145/1391469.1391499The PicoCube is a 1 cm3 sensor node using harvested energy as its source of power. Operating at an average of only 6uW for a tirepressure application, the PicoCube represents a modular and integrated approach to the design of nodes for wireless sensor ...
- research-articleJune 2008
Vision platform for mobile intelligent robot based on 81.6 GOPS object recognition processor
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 96–101https://doi.org/10.1145/1391469.1391496To enable power-efficient object recognition of mobile intelligent robots, 81.6GOPS object recognition processor is proposed. Based on analysis of Scale Invariant Feature Transform (SIFT) algorithm, architecture of the proposed processor is designed to ...
- research-articleJune 2008
A 242mW, 10mm21080p H.264/AVC high profile encoder chip
- Yu-Kun Lin,
- De-Wei Li,
- Chia-Chun Lin,
- Tzu-Yun Kuo,
- Sian-Jin Wu,
- Wei-Cheng Tai,
- Wei-Cheng Chang,
- Tian-Sheuan Chang
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 78–83https://doi.org/10.1145/1391469.1391493A 1080p high profile H.264 encoder is designed by the robust reusable silicon IP methodology and fabricated in a 0.13μm CMOS technology with an area of 10 mm2 and 242mW at 145MHz. Compared to the state-of-the-art design targeted at 720p baseline, this ...