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- research-articleOpen AccessPublished By ACMPublished By ACM
PDIP: Priority Directed Instruction Prefetching
- Bhargav Reddy Godala
Computer Science, Princeton University, Princeton, New Jersey, United States of America
, - Sankara Prasad Ramesh
Electrical and Computer Engineering, University of California, San Diego, San Diego, California, USA
, - Gilles A. Pokam
Intel Corporation, Santa Clara, United States of America
, - Jared Stark
Intel Corporation, Hillsboro, Oregon, USA
, - Andre Seznec
Intel Corporation, Santa Clara, USA
, - Dean Tullsen
Computer Science and Engineering, University of California, San Diego, San Diego, California, USA
, - David I. August
Computer Science, Princeton University, Princeton, New Jersey, USA
ASPLOS '24: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2•April 2024, pp 846-861• https://doi.org/10.1145/3620665.3640394Modern server workloads have large code footprints which are prone to front-end bottlenecks due to instruction cache capacity misses. Even with the aggressive fetch directed instruction prefetching (FDIP), implemented in modern processors, there are ...
- 2Citation
- 1,076
- Downloads
MetricsTotal Citations2Total Downloads1,076Last 12 Months1,076Last 6 weeks149
- Bhargav Reddy Godala
- Article
A Case for Partial Co-allocation Constraints in Compressed Caches
- Daniel Rodrigues Carvalho
Univ Rennes, Inria, CNRS, IRISA, Rennes, France
, - André Seznec
Univ Rennes, Inria, CNRS, IRISA, Rennes, France
Embedded Computer Systems: Architectures, Modeling, and Simulation•July 2021, pp 65-77• https://doi.org/10.1007/978-3-031-04580-6_5AbstractCompressed cache layouts require adding the block’s size information to the metadata array. This field can be either constrained—in which case compressed blocks must fit in predetermined sizes; thus, it reduces co-allocation opportunities but has ...
- 0Citation
MetricsTotal Citations0
- Daniel Rodrigues Carvalho
- research-articleOpen AccessPublished By ACMPublished By ACM
Understanding Cache Compression
- Daniel Rodrigues Carvalho
Univ Rennes, Inria, CNRS, IRISA, France
, - André Seznec
Univ Rennes, Inria, CNRS, IRISA, France
ACM Transactions on Architecture and Code Optimization, Volume 18, Issue 3•September 2021, Article No.: 36, pp 1-27 • https://doi.org/10.1145/3457207Hardware cache compression derives from software-compression research; yet, its implementation is not a straightforward translation, since it must abide by multiple restrictions to comply with area, power, and latency constraints. This study sheds light ...
- 8Citation
- 7,319
- Downloads
MetricsTotal Citations8Total Downloads7,319Last 12 Months2,828Last 6 weeks362
- Daniel Rodrigues Carvalho
- research-articleOpen AccessPublished By ACMPublished By ACM
Leveraging Value Equality Prediction for Value Speculation
- Kleovoulos Kalaitzidis
Univ Rennes, Inria, CNRS, IRISA, France
, - André Seznec
Univ Rennes, Inria, CNRS, IRISA, France
ACM Transactions on Architecture and Code Optimization, Volume 18, Issue 1•March 2021, Article No.: 13, pp 1-20 • https://doi.org/10.1145/3436821Value Prediction (VP) has recently been gaining interest in the research community, since prior work has established practical solutions for its implementation that provide meaningful performance gains. A constant challenge of contemporary context-based ...
- 2Citation
- 751
- Downloads
MetricsTotal Citations2Total Downloads751Last 12 Months232Last 6 weeks38
- Kleovoulos Kalaitzidis
- research-articleOpen AccessPublished By ACMPublished By ACM
SIMT-X: Extending Single-Instruction Multi-Threading to Out-of-Order Cores
- Anita Tino
INRIA, France
, - Caroline Collange
INRIA, France
, - André Seznec
INRIA, France
ACM Transactions on Architecture and Code Optimization, Volume 17, Issue 2•June 2020, Article No.: 15, pp 1-23 • https://doi.org/10.1145/3392032This work introduces Single Instruction Multi-Thread Express (SIMT-X), a general-purpose Central Processing Unit (CPU) microarchitecture that enables Graphics Processing Units (GPUs)-style SIMT execution across multiple threads of the same program for ...
- 6Citation
- 2,824
- Downloads
MetricsTotal Citations6Total Downloads2,824Last 12 Months604Last 6 weeks51
- Anita Tino
- research-articlePublished By ACMPublished By ACM
Cost effective speculation with the omnipredictor
- Arthur Perais
INRIA, Rennes, France
, - André Seznec
INRIA, Rennes, France
PACT '18: Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques•November 2018, Article No.: 25, pp 1-13• https://doi.org/10.1145/3243176.3243208Modern superscalar processors heavily rely on out-of-order and speculative execution to achieve high performance. The conditional branch predictor, the indirect branch predictor and the memory dependency predictor are among the key structures that ...
- 2Citation
- 233
- Downloads
MetricsTotal Citations2Total Downloads233Last 12 Months49Last 6 weeks5
- Arthur Perais
- research-articlePublished By ACMPublished By ACM
Synergistic cache layout for reuse and compression
- Biswabandan Panda
Indian Institute of Technology Kanpur, India
, - André Seznec
INRIA Rennes, France
PACT '18: Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques•November 2018, Article No.: 4, pp 1-13• https://doi.org/10.1145/3243176.3243178Recent advances in research on compressed caches make them an attractive design point for effective hardware implementation for last-level caches. For instance, the yet another compressed cache (YACC) layout leverages both spatial and compression factor ...
- 4Citation
- 132
- Downloads
MetricsTotal Citations4Total Downloads132Last 12 Months12
- Biswabandan Panda
- research-article
DITVA: Dynamic Inter-Thread Vectorization Architecture
- Sajith Kalathingal
Intel Corporation, India
, - Sylvain Collange
Inria / Univ Rennes, CNRS, IRISA, France
, - Bharath N. Swamy
Intel Corporation, India
, - André Seznec
Inria / Univ Rennes, CNRS, IRISA, France
Journal of Parallel and Distributed Computing, Volume 120, Issue C•Oct 2018, pp 267-281 • https://doi.org/10.1016/j.jpdc.2017.11.006AbstractIn the Single-Program Multiple-Data (SPMD) programming model, threads of an application exhibit very similar control flows and often execute the same instructions, but on different data. In this paper, we propose the Dynamic Inter-...
Highlights- An architecture that dynamically vectorizes SPMD binaries is presented.
- The ...
- 1Citation
MetricsTotal Citations1
- Sajith Kalathingal
- research-article
Dynamic and discrete cache insertion policies for managing shared last level caches in large multicores
- Aswinkumar Sridharan
INRIA/IRISA, Campus de Beaulieu, 35042 Rennes, France
, - Andr Seznec
INRIA/IRISA, Campus de Beaulieu, 35042 Rennes, France
Journal of Parallel and Distributed Computing, Volume 106, Issue C•August 2017, pp 215-226 • https://doi.org/10.1016/j.jpdc.2017.02.004Multi-core processors employ shared Last Level Caches (LLC). This trend will continue in the future with large multi-core processors (16 cores and beyond) as well. At the same time, the associativity of LLC tends to remain in the order of sixteen. ...
- 0Citation
MetricsTotal Citations0
- Aswinkumar Sridharan
- research-articleOpen AccessPublished By ACMPublished By ACM
On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE
- Fernando A. Endo
IRISA/Inria, Rennes Cedex, France
, - Arthur Perais
IRISA/Inria, Rennes Cedex, France
, - André Seznec
IRISA/Inria, Rennes Cedex, France
ACM Transactions on Architecture and Code Optimization, Volume 14, Issue 2•June 2017, Article No.: 18, pp 1-24 • https://doi.org/10.1145/3090634Increasing instruction-level parallelism is regaining attractiveness within the microprocessor industry.
The {Early | Out-of-order | Late} Execution (EOLE) microarchitecture and Differential Value TAgged GEometric (D-VTAGE) value predictor were recently ...
- 4Citation
- 388
- Downloads
MetricsTotal Citations4Total Downloads388Last 12 Months57Last 6 weeks11
- Fernando A. Endo
- research-articleOpen AccessPublished By ACMPublished By ACM
Band-Pass Prefetching: An Effective Prefetch Management Mechanism Using Prefetch-Fraction Metric in Multi-Core Systems
- Aswinkumar Sridharan
INRIA Rennes, Rennes Cedex, France
, - Biswabandan Panda
INRIA Rennes, Rennes Cedex, France
, - Andre Seznec
INRIA Rennes, Rennes Cedex, France
ACM Transactions on Architecture and Code Optimization, Volume 14, Issue 2•June 2017, Article No.: 19, pp 1-27 • https://doi.org/10.1145/3090635In multi-core systems, an application’s prefetcher can interfere with the memory requests of other applications using the shared resources, such as last level cache and memory bandwidth. In order to minimize prefetcher-caused interference, prior ...
- 7Citation
- 614
- Downloads
MetricsTotal Citations7Total Downloads614Last 12 Months130Last 6 weeks12
- Aswinkumar Sridharan
- research-articlePublished By ACMPublished By ACM
Compile-time function memoization
- Arjun Suresh
Ohio State University, USA
, - Erven Rohou
Inria, France
, - André Seznec
Inria, France
CC 2017: Proceedings of the 26th International Conference on Compiler Construction•February 2017, pp 45-54• https://doi.org/10.1145/3033019.3033024Memoization is the technique of saving the results of computations so that future executions can be omitted when the same inputs repeat. Recent work showed that memoization can be applied to dynamically linked pure functions using a load-time technique ...
- 32Citation
- 418
- Downloads
MetricsTotal Citations32Total Downloads418Last 12 Months21
- Arjun Suresh
- research-article
Register sharing for equality prediction
- Arthur Perais
INRIA/IRISA
, - Fernando A. Endo
INRIA/IRISA
, - André Seznec
INRIA/IRISA
MICRO-49: The 49th Annual IEEE/ACM International Symposium on Microarchitecture•October 2016, Article No.: 4, pp 1-12Recently, Value Prediction (VP) has been gaining renewed traction in the research community. VP speculates on the result of instructions to increase Instruction Level Parallelism (ILP). In most embodiments, VP requires large tables to track predictions ...
- 2Citation
- 65
- Downloads
MetricsTotal Citations2Total Downloads65Last 12 Months1
- Arthur Perais
- research-article
Dictionary sharing: an efficient cache compression scheme for compressed caches
- Biswabandan Panda
INRIA, Rennes, France
, - André Seznec
INRIA, Rennes, France
MICRO-49: The 49th Annual IEEE/ACM International Symposium on Microarchitecture•October 2016, Article No.: 1, pp 1-12The effectiveness of a compressed cache depends on three features: i) the compression scheme, ii) the compaction scheme, and iii) the cache layout of the compressed cache. Skewed compressed cache (SCC) and yet another compressed cache (YACC) are two ...
- 5Citation
- 72
- Downloads
MetricsTotal Citations5Total Downloads72Last 12 Months2
- Biswabandan Panda
- research-articleOpen AccessPublished By ACMPublished By ACM
Yet Another Compressed Cache: A Low-Cost Yet Effective Compressed Cache
- Somayeh Sardashti
University of Wisconsin-Madison, WI, USA
, - Andre Seznec
IRISA/INRIA, RENNES Cedex, France
, - David A. Wood
University of Wisconsin-Madison, WI, USA
ACM Transactions on Architecture and Code Optimization, Volume 13, Issue 3•September 2016, Article No.: 27, pp 1-25 • https://doi.org/10.1145/2976740Cache memories play a critical role in bridging the latency, bandwidth, and energy gaps between cores and off-chip memory. However, caches frequently consume a significant fraction of a multicore chip's area and thus account for a significant fraction ...
- 45Citation
- 1,023
- Downloads
MetricsTotal Citations45Total Downloads1,023Last 12 Months162Last 6 weeks29
- Somayeh Sardashti
- research-articlePublished By ACMPublished By ACM
EOLE: Combining Static and Dynamic Scheduling Through Value Prediction to Reduce Complexity and Increase Performance
- Arthur Perais
INRIA
, - André Seznec
INRIA
ACM Transactions on Computer Systems, Volume 34, Issue 2•May 2016, Article No.: 4, pp 1-33 • https://doi.org/10.1145/2870632Recent work in the field of value prediction (VP) has shown that given an efficient confidence estimation mechanism, prediction validation could be removed from the out-of-order engine and delayed until commit time. As a result, a simple recovery ...
- 7Citation
- 557
- Downloads
MetricsTotal Citations7Total Downloads557Last 12 Months20Last 6 weeks3
- Arthur Perais
- research-articlePublished By ACMPublished By ACM
The inner most loop iteration counter: a new dimension in branch history
- André Seznec
INRIA
, - Joshua San Miguel
University of Toronto
, - Jorge Albericio
University of Toronto
MICRO-48: Proceedings of the 48th International Symposium on Microarchitecture•December 2015, pp 347-357• https://doi.org/10.1145/2830772.2830831The most efficient branch predictors proposed in academic literature exploit both global branch history and local branch history. However, local history branch predictor components introduce major design challenges, particularly for the management of ...
- 14Citation
- 391
- Downloads
MetricsTotal Citations14Total Downloads391Last 12 Months20
- André Seznec
- research-articlePublished By ACMPublished By ACM
Long term parking (LTP): criticality-aware resource allocation in OOO processors
- Andreas Sembrant
Uppsala University
, - Trevor Carlson
Uppsala University
, - Erik Hagersten
Uppsala University
, - David Black-Shaffer
Uppsala University
, - Arthur Perais
IRISA/INRIA
, - André Seznec
IRISA/INRIA
, - Pierre Michaud
IRISA/INRIA
MICRO-48: Proceedings of the 48th International Symposium on Microarchitecture•December 2015, pp 334-346• https://doi.org/10.1145/2830772.2830815Modern processors employ large structures (IQ, LSQ, register file, etc.) to expose instruction-level parallelism (ILP) and memory-level parallelism (MLP). These resources are typically allocated to instructions in program order. This wastes resources by ...
- 24Citation
- 698
- Downloads
MetricsTotal Citations24Total Downloads698Last 12 Months70Last 6 weeks9
- Andreas Sembrant
- research-articleOpen AccessPublished By ACMPublished By ACM
Revisiting Clustered Microarchitecture for Future Superscalar Cores: A Case for Wide Issue Clusters
- Pierre Michaud
IRISA/Inria, Rennes Cedex, France
, - Andrea Mondelli
IRISA/Inria, Rennes Cedex, France
, - André Seznec
IRISA/Inria, Rennes Cedex, France
ACM Transactions on Architecture and Code Optimization, Volume 12, Issue 3•October 2015, Article No.: 28, pp 1-22 • https://doi.org/10.1145/2800787During the past 10 years, the clock frequency of high-end superscalar processors has not increased. Performance keeps growing mainly by integrating more cores on the same chip and by introducing new instruction set extensions. However, this benefits ...
- 2Citation
- 911
- Downloads
MetricsTotal Citations2Total Downloads911Last 12 Months240Last 6 weeks29- 1
Supplementary Materialtaco1203-28.pdf
- Pierre Michaud
- research-articleOpen AccessPublished By ACMPublished By ACM
Intercepting Functions for Memoization: A Case Study Using Transcendental Functions
- Arjun Suresh
INRIA/IRISA, Rennes, France
, - Bharath Narasimha Swamy
INRIA/IRISA, Rennes, France
, - Erven Rohou
INRIA/IRISA, Rennes, France
, - André Seznec
INRIA/IRISA, Rennes, France
ACM Transactions on Architecture and Code Optimization, Volume 12, Issue 2•July 2015, Article No.: 18, pp 18:1-18:23 • https://doi.org/10.1145/2751559Memoization is the technique of saving the results of executions so that future executions can be omitted when the input set repeats. Memoization has been proposed in previous literature at the instruction, basic block, and function levels using ...
- 23Citation
- 788
- Downloads
MetricsTotal Citations23Total Downloads788Last 12 Months114Last 6 weeks16- 1
Supplementary Materialtaco1202-18.pdf
- Arjun Suresh
Author Profile Pages
- Description: The Author Profile Page initially collects all the professional information known about authors from the publications record as known by the ACM bibliographic database, the Guide. Coverage of ACM publications is comprehensive from the 1950's. Coverage of other publishers generally starts in the mid 1980's. The Author Profile Page supplies a quick snapshot of an author's contribution to the field and some rudimentary measures of influence upon it. Over time, the contents of the Author Profile page may expand at the direction of the community.
Please see the following 2007 Turing Award winners' profiles as examples: - History: Disambiguation of author names is of course required for precise identification of all the works, and only those works, by a unique individual. Of equal importance to ACM, author name normalization is also one critical prerequisite to building accurate citation and download statistics. For the past several years, ACM has worked to normalize author names, expand reference capture, and gather detailed usage statistics, all intended to provide the community with a robust set of publication metrics. The Author Profile Pages reveal the first result of these efforts.
- Normalization: ACM uses normalization algorithms to weigh several types of evidence for merging and splitting names.
These include:- co-authors: if we have two names and cannot disambiguate them based on name alone, then we see if they have a co-author in common. If so, this weighs towards the two names being the same person.
- affiliations: names in common with same affiliation weighs toward the two names being the same person.
- publication title: names in common whose works are published in same journal weighs toward the two names being the same person.
- keywords: names in common whose works address the same subject matter as determined from title and keywords, weigh toward being the same person.
The more conservative the merging algorithms, the more bits of evidence are required before a merge is made, resulting in greater precision but lower recall of works for a given Author Profile. Many bibliographic records have only author initials. Many names lack affiliations. With very common family names, typical in Asia, more liberal algorithms result in mistaken merges.
Automatic normalization of author names is not exact. Hence it is clear that manual intervention based on human knowledge is required to perfect algorithmic results. ACM is meeting this challenge, continuing to work to improve the automated merges by tweaking the weighting of the evidence in light of experience.
- Bibliometrics: In 1926, Alfred Lotka formulated his power law (known as Lotka's Law) describing the frequency of publication by authors in a given field. According to this bibliometric law of scientific productivity, only a very small percentage (~6%) of authors in a field will produce more than 10 articles while the majority (perhaps 60%) will have but a single article published. With ACM's first cut at author name normalization in place, the distribution of our authors with 1, 2, 3..n publications does not match Lotka's Law precisely, but neither is the distribution curve far off. For a definition of ACM's first set of publication statistics, see Bibliometrics
- Future Direction:
The initial release of the Author Edit Screen is open to anyone in the community with an ACM account, but it is limited to personal information. An author's photograph, a Home Page URL, and an email may be added, deleted or edited. Changes are reviewed before they are made available on the live site.
ACM will expand this edit facility to accommodate more types of data and facilitate ease of community participation with appropriate safeguards. In particular, authors or members of the community will be able to indicate works in their profile that do not belong there and merge others that do belong but are currently missing.
A direct search interface for Author Profiles will be built.
An institutional view of works emerging from their faculty and researchers will be provided along with a relevant set of metrics.
It is possible, too, that the Author Profile page may evolve to allow interested authors to upload unpublished professional materials to an area available for search and free educational use, but distinct from the ACM Digital Library proper. It is hard to predict what shape such an area for user-generated content may take, but it carries interesting potential for input from the community.
Bibliometrics
The ACM DL is a comprehensive repository of publications from the entire field of computing.
It is ACM's intention to make the derivation of any publication statistics it generates clear to the user.
- Average citations per article = The total Citation Count divided by the total Publication Count.
- Citation Count = cumulative total number of times all authored works by this author were cited by other works within ACM's bibliographic database. Almost all reference lists in articles published by ACM have been captured. References lists from other publishers are less well-represented in the database. Unresolved references are not included in the Citation Count. The Citation Count is citations TO any type of work, but the references counted are only FROM journal and proceedings articles. Reference lists from books, dissertations, and technical reports have not generally been captured in the database. (Citation Counts for individual works are displayed with the individual record listed on the Author Page.)
- Publication Count = all works of any genre within the universe of ACM's bibliographic database of computing literature of which this person was an author. Works where the person has role as editor, advisor, chair, etc. are listed on the page but are not part of the Publication Count.
- Publication Years = the span from the earliest year of publication on a work by this author to the most recent year of publication of a work by this author captured within the ACM bibliographic database of computing literature (The ACM Guide to Computing Literature, also known as "the Guide".
- Available for download = the total number of works by this author whose full texts may be downloaded from an ACM full-text article server. Downloads from external full-text sources linked to from within the ACM bibliographic space are not counted as 'available for download'.
- Average downloads per article = The total number of cumulative downloads divided by the number of articles (including multimedia objects) available for download from ACM's servers.
- Downloads (cumulative) = The cumulative number of times all works by this author have been downloaded from an ACM full-text article server since the downloads were first counted in May 2003. The counts displayed are updated monthly and are therefore 0-31 days behind the current date. Robotic activity is scrubbed from the download statistics.
- Downloads (12 months) = The cumulative number of times all works by this author have been downloaded from an ACM full-text article server over the last 12-month period for which statistics are available. The counts displayed are usually 1-2 weeks behind the current date. (12-month download counts for individual works are displayed with the individual record.)
- Downloads (6 weeks) = The cumulative number of times all works by this author have been downloaded from an ACM full-text article server over the last 6-week period for which statistics are available. The counts displayed are usually 1-2 weeks behind the current date. (6-week download counts for individual works are displayed with the individual record.)
ACM Author-Izer Service
Summary Description
ACM Author-Izer is a unique service that enables ACM authors to generate and post links on both their homepage and institutional repository for visitors to download the definitive version of their articles from the ACM Digital Library at no charge.
Downloads from these sites are captured in official ACM statistics, improving the accuracy of usage and impact measurements. Consistently linking to definitive version of ACM articles should reduce user confusion over article versioning.
ACM Author-Izer also extends ACM’s reputation as an innovative “Green Path” publisher, making ACM one of the first publishers of scholarly works to offer this model to its authors.
To access ACM Author-Izer, authors need to establish a free ACM web account. Should authors change institutions or sites, they can utilize the new ACM service to disable old links and re-authorize new links for free downloads from a different site.
How ACM Author-Izer Works
Authors may post ACM Author-Izer links in their own bibliographies maintained on their website and their own institution’s repository. The links take visitors to your page directly to the definitive version of individual articles inside the ACM Digital Library to download these articles for free.
The Service can be applied to all the articles you have ever published with ACM.
Depending on your previous activities within the ACM DL, you may need to take up to three steps to use ACM Author-Izer.
For authors who do not have a free ACM Web Account:
- Go to the ACM DL http://dl.acm.org/ and click SIGN UP. Once your account is established, proceed to next step.
For authors who have an ACM web account, but have not edited their ACM Author Profile page:
- Sign in to your ACM web account and go to your Author Profile page. Click "Add personal information" and add photograph, homepage address, etc. Click ADD AUTHOR INFORMATION to submit change. Once you receive email notification that your changes were accepted, you may utilize ACM Author-izer.
For authors who have an account and have already edited their Profile Page:
- Sign in to your ACM web account, go to your Author Profile page in the Digital Library, look for the ACM Author-izer link below each ACM published article, and begin the authorization process. If you have published many ACM articles, you may find a batch Authorization process useful. It is labeled: "Export as: ACM Author-Izer Service"
ACM Author-Izer also provides code snippets for authors to display download and citation statistics for each “authorized” article on their personal pages. Downloads from these pages are captured in official ACM statistics, improving the accuracy of usage and impact measurements. Consistently linking to the definitive version of ACM articles should reduce user confusion over article versioning.
Note: You still retain the right to post your author-prepared preprint versions on your home pages and in your institutional repositories with DOI pointers to the definitive version permanently maintained in the ACM Digital Library. But any download of your preprint versions will not be counted in ACM usage statistics. If you use these AUTHOR-IZER links instead, usage by visitors to your page will be recorded in the ACM Digital Library and displayed on your page.
FAQ
- Q. What is ACM Author-Izer?
A. ACM Author-Izer is a unique, link-based, self-archiving service that enables ACM authors to generate and post links on either their home page or institutional repository for visitors to download the definitive version of their articles for free.
- Q. What articles are eligible for ACM Author-Izer?
- A. ACM Author-Izer can be applied to all the articles authors have ever published with ACM. It is also available to authors who will have articles published in ACM publications in the future.
- Q. Are there any restrictions on authors to use this service?
- A. No. An author does not need to subscribe to the ACM Digital Library nor even be a member of ACM.
- Q. What are the requirements to use this service?
- A. To access ACM Author-Izer, authors need to have a free ACM web account, must have an ACM Author Profile page in the Digital Library, and must take ownership of their Author Profile page.
- Q. What is an ACM Author Profile Page?
- A. The Author Profile Page initially collects all the professional information known about authors from the publications record as known by the ACM Digital Library. The Author Profile Page supplies a quick snapshot of an author's contribution to the field and some rudimentary measures of influence upon it. Over time, the contents of the Author Profile page may expand at the direction of the community. Please visit the ACM Author Profile documentation page for more background information on these pages.
- Q. How do I find my Author Profile page and take ownership?
- A. You will need to take the following steps:
- Create a free ACM Web Account
- Sign-In to the ACM Digital Library
- Find your Author Profile Page by searching the ACM Digital Library for your name
- Find the result you authored (where your author name is a clickable link)
- Click on your name to go to the Author Profile Page
- Click the "Add Personal Information" link on the Author Profile Page
- Wait for ACM review and approval; generally less than 24 hours
- Q. Why does my photo not appear?
- A. Make sure that the image you submit is in .jpg or .gif format and that the file name does not contain special characters
- Q. What if I cannot find the Add Personal Information function on my author page?
- A. The ACM account linked to your profile page is different than the one you are logged into. Please logout and login to the account associated with your Author Profile Page.
- Q. What happens if an author changes the location of his bibliography or moves to a new institution?
- A. Should authors change institutions or sites, they can utilize ACM Author-Izer to disable old links and re-authorize new links for free downloads from a new location.
- Q. What happens if an author provides a URL that redirects to the author’s personal bibliography page?
- A. The service will not provide a free download from the ACM Digital Library. Instead the person who uses that link will simply go to the Citation Page for that article in the ACM Digital Library where the article may be accessed under the usual subscription rules.
However, if the author provides the target page URL, any link that redirects to that target page will enable a free download from the Service.
- Q. What happens if the author’s bibliography lives on a page with several aliases?
- A. Only one alias will work, whichever one is registered as the page containing the author’s bibliography. ACM has no technical solution to this problem at this time.
- Q. Why should authors use ACM Author-Izer?
- A. ACM Author-Izer lets visitors to authors’ personal home pages download articles for no charge from the ACM Digital Library. It allows authors to dynamically display real-time download and citation statistics for each “authorized” article on their personal site.
- Q. Does ACM Author-Izer provide benefits for authors?
- A. Downloads of definitive articles via Author-Izer links on the authors’ personal web page are captured in official ACM statistics to more accurately reflect usage and impact measurements.
Authors who do not use ACM Author-Izer links will not have downloads from their local, personal bibliographies counted. They do, however, retain the existing right to post author-prepared preprint versions on their home pages or institutional repositories with DOI pointers to the definitive version permanently maintained in the ACM Digital Library.
- Q. How does ACM Author-Izer benefit the computing community?
- A. ACM Author-Izer expands the visibility and dissemination of the definitive version of ACM articles. It is based on ACM’s strong belief that the computing community should have the widest possible access to the definitive versions of scholarly literature. By linking authors’ personal bibliography with the ACM Digital Library, user confusion over article versioning should be reduced over time.
In making ACM Author-Izer a free service to both authors and visitors to their websites, ACM is emphasizing its continuing commitment to the interests of its authors and to the computing community in ways that are consistent with its existing subscription-based access model.
- Q. Why can’t I find my most recent publication in my ACM Author Profile Page?
- A. There is a time delay between publication and the process which associates that publication with an Author Profile Page. Right now, that process usually takes 4-8 weeks.
- Q. How does ACM Author-Izer expand ACM’s “Green Path” Access Policies?
- A. ACM Author-Izer extends the rights and permissions that authors retain even after copyright transfer to ACM, which has been among the “greenest” publishers. ACM enables its author community to retain a wide range of rights related to copyright and reuse of materials. They include:
- Posting rights that ensure free access to their work outside the ACM Digital Library and print publications
- Rights to reuse any portion of their work in new works that they may create
- Copyright to artistic images in ACM’s graphics-oriented publications that authors may want to exploit in commercial contexts
- All patent rights, which remain with the original owner