State persistence: a property for guiding test generation
Pages 523 - 528
Abstract
We study a property of circuit states referred to as persistence. The persistence pi(s) of a state s is the number of next-state variables whose values are specified (0 or 1) when a fully-unspecified primary input vector is applied to the circuit in state s. When a next-state variable Yi is specified under a fully-unspecified primary input vector, there are faults in the input cone of Yi that cannot be detected on Yi. We demonstrate through experimental results that when lower-persistence states are used as scan-in states, the resulting tests detect larger numbers of faults. Low-persistence states are thus preferable as scan-in states during test generation. We also discuss the computation of low-persistence states.
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Index Terms
- State persistence: a property for guiding test generation
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Information
Published In
May 2009
558 pages
ISBN:9781605585222
DOI:10.1145/1531542
- Co-chair:
- Fabrizio Lombardi,
- General Chairs:
- Sanjukta Bhanja,
- Yehia Massoud,
- Program Chair:
- R. Iris Bahar
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Published: 10 May 2009
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