Article

Deep Sub-Micron Static Timing Analysis in Presence of Crosstalk

Authors:

Peivand F. Tehrani,

Shang Woo Chyou,

Uma EkambaramAuthors Info & Claims

ISQED '00: Proceedings of the 1st International Symposium on Quality of Electronic Design

Page 505

Published: 20 March 2000 Publication History

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Abstract

A complete and accurate method for static timing analysis of deep sub-micron devices in presence of crosstalk is introduced. This scheme provides an efficient platform for fast and accurate static timing verification of large scale transistor and cell level netlists, with coupled interconnects and high switching speeds. This paper presents the solution to the crosstalk problem implemented in the static timing tool PathMill as its crosstalk extension (CTX). A comparison of simulation results between this approach and SPICE is also provided.

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PathMill is a trademark of SYNOPSYS Inc. Some subject matters in this paper are covered by one or more pending U.S. patents.

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Cited By

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Muchherla KChen PMa DWang J(2008)A noniterative equivalent waveform model for timing analysis in presence of crosstalkACM Transactions on Design Automation of Electronic Systems10.1145/1344418.134442113:2(1-21)Online publication date: 23-Apr-2008
https://dl.acm.org/doi/10.1145/1344418.1344421
Roy AMahmoud NChowdhury MLevitan S(2007)Effects of coupling capacitance and inductance on delay uncertainty and clock skewProceedings of the 44th annual Design Automation Conference10.1145/1278480.1278525(184-187)Online publication date: 4-Jun-2007
https://dl.acm.org/doi/10.1145/1278480.1278525
Chen RZhou H(2004)Timing macro-modeling of IP blocks with crosstalkProceedings of the 2004 IEEE/ACM International conference on Computer-aided design10.1109/ICCAD.2004.1382563(155-159)Online publication date: 7-Nov-2004
https://dl.acm.org/doi/10.1109/ICCAD.2004.1382563
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Deep Sub-Micron Static Timing Analysis in Presence of Crosstalk
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ISQED '00: Proceedings of the 1st International Symposium on Quality of Electronic Design

March 2000

ISBN:0769505252

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IEEE Computer Society

United States

Publication History

Published: 20 March 2000

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Muchherla KChen PMa DWang J(2008)A noniterative equivalent waveform model for timing analysis in presence of crosstalkACM Transactions on Design Automation of Electronic Systems10.1145/1344418.134442113:2(1-21)Online publication date: 23-Apr-2008
https://dl.acm.org/doi/10.1145/1344418.1344421
Roy AMahmoud NChowdhury MLevitan S(2007)Effects of coupling capacitance and inductance on delay uncertainty and clock skewProceedings of the 44th annual Design Automation Conference10.1145/1278480.1278525(184-187)Online publication date: 4-Jun-2007
https://dl.acm.org/doi/10.1145/1278480.1278525
Chen RZhou H(2004)Timing macro-modeling of IP blocks with crosstalkProceedings of the 2004 IEEE/ACM International conference on Computer-aided design10.1109/ICCAD.2004.1382563(155-159)Online publication date: 7-Nov-2004
https://dl.acm.org/doi/10.1109/ICCAD.2004.1382563
Batterywala SShenoy N(2003)A Method to Estimate Slew and Delay in Coupled Digital CircuitsProceedings of the 16th International Conference on VLSI Design10.5555/832285.835589Online publication date: 4-Jan-2003
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Kim KJung SKim TSaxena PLiu CKang S(2003)Coupling delay optimization by temporal decorrelation using dual threshold voltage techniqueIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2003.81711111:5(879-887)Online publication date: 1-Oct-2003
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Kim KJung SNarayanan ULiu CKang S(2003)Noise-aware interconnect power optimization in domino logic synthesisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2002.80163011:1(79-89)Online publication date: 1-Feb-2003
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Agarwal KCao YSato TSylvester DHu C(2002)Efficient Generation of Delay Change Curves for Noise-Aware Static Timing AnalysisProceedings of the 2002 Asia and South Pacific Design Automation Conference10.5555/832284.835482Online publication date: 7-Jan-2002
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Chen PKukimoto YKeutzer KPileggi LKuehlmann A(2002)Refining switching window by time slots for crosstalk noise calculationProceedings of the 2002 IEEE/ACM international conference on Computer-aided design10.1145/774572.774658(583-586)Online publication date: 10-Nov-2002
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Chen PKukimoto YTeng CKeutzer KSapatnekar SPedram M(2002)On convergence of switching windows computation in presence of crosstalk noiseProceedings of the 2002 international symposium on Physical design10.1145/505388.505410(84-89)Online publication date: 7-Apr-2002
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(2001)A Fast Coupling Aware Delay Estimation Scheme Based on Simplified Circuit ModelProceedings of the 2nd International Symposium on Quality Electronic Design10.5555/558593.850188Online publication date: 26-Mar-2001
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