X-Compact: An Efficient Response Compaction Technique for Test Cost Reduction

X-Compact is an X-tolerant test response compaction technique. It enables up to exponential reduction in the test response data volume and the number of pins required to collect test response from a chip. The compaction hardware requires negligible area,...

Reversible logic is an emerging research area and getting remarkable interests over the past few years. Interest is sparked in reversible logic by its applications in several technologies, such as quantum, optical, thermodynamics and adiabatic CMOS. ...

Random compact testing uses random inputs to test digital circuits. Fault detection can be achieved by comparing some statistic of the circuit under test, e.g., the frequency of logic ones at an output, with the value of that statistic previously ...