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PIPE: a VLSI decoupled architecture

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Honesty C. YoungAuthors Info & Claims

ISCA '85: Proceedings of the 12th annual international symposium on Computer architecture

Pages 20 - 27

Published: 01 June 1985 Publication History

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Cited By

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Ham TAragón JMartonosi M(2017)Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous ArchitecturesACM Transactions on Architecture and Code Optimization10.1145/307562014:2(1-27)Online publication date: 28-Jun-2017
https://dl.acm.org/doi/10.1145/3075620
Ho CKim SSankaralingam K(2015)Efficient execution of memory access phases using dataflow specializationACM SIGARCH Computer Architecture News10.1145/2872887.275039043:3S(118-130)Online publication date: 13-Jun-2015
https://dl.acm.org/doi/10.1145/2872887.2750390
Ham TAragón JMartonosi MPrvulovic M(2015)DeSCProceedings of the 48th International Symposium on Microarchitecture10.1145/2830772.2830800(191-203)Online publication date: 5-Dec-2015
https://dl.acm.org/doi/10.1145/2830772.2830800
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Index Terms

PIPE: a VLSI decoupled architecture
1. Hardware
  1. Very large scale integration design

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Information & Contributors

Information

Published In

ISCA '85: Proceedings of the 12th annual international symposium on Computer architecture

June 1985

428 pages

ISBN:0818606347

Chairmen:
Thomas Gannon
Digital Equipment Corp.
,
Tilak Agerwala
IBM Research
,
Charles Freiman
IBM Research

ACM SIGARCH Computer Architecture News Volume 13, Issue 3
Special Issue: Proceedings of the 12th annual international symposium on Computer architecture (ISCA '85)
June 1985
396 pages
ISSN:0163-5964
DOI:10.1145/327070
Chairmen:
Thomas Gannon
Digital Equipment Corp.
,
Tilak Agerwala
IBM Research
,
Charles Freiman
IBM Research
Issue’s Table of Contents

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 June 1985

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ISCA85

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SIGARCH

ISCA85: International Symposium on Computer Architecture

June 17 - 19, 1985

Massachusetts, Boston, USA

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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ISCA '25

Sponsor:
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The 52nd Annual International Symposium on Computer Architecture

June 21 - 25, 2025

Tokyo , Japan

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Cited By

View all

Ham TAragón JMartonosi M(2017)Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous ArchitecturesACM Transactions on Architecture and Code Optimization10.1145/307562014:2(1-27)Online publication date: 28-Jun-2017
https://dl.acm.org/doi/10.1145/3075620
Ho CKim SSankaralingam K(2015)Efficient execution of memory access phases using dataflow specializationACM SIGARCH Computer Architecture News10.1145/2872887.275039043:3S(118-130)Online publication date: 13-Jun-2015
https://dl.acm.org/doi/10.1145/2872887.2750390
Ham TAragón JMartonosi MPrvulovic M(2015)DeSCProceedings of the 48th International Symposium on Microarchitecture10.1145/2830772.2830800(191-203)Online publication date: 5-Dec-2015
https://dl.acm.org/doi/10.1145/2830772.2830800
Ho CKim SSankaralingam KMarr DAlbonesi D(2015)Efficient execution of memory access phases using dataflow specializationProceedings of the 42nd Annual International Symposium on Computer Architecture10.1145/2749469.2750390(118-130)Online publication date: 13-Jun-2015
https://dl.acm.org/doi/10.1145/2749469.2750390
Crago NPatel S(2011)OUTRIDERACM SIGARCH Computer Architecture News10.1145/2024723.200007939:3(117-128)Online publication date: 4-Jun-2011
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Crago NPatel SIyer RYang QGonzález A(2011)OUTRIDERProceedings of the 38th annual international symposium on Computer architecture10.1145/2000064.2000079(117-128)Online publication date: 4-Jun-2011
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Mahesri AWang NPatel S(2007)Hardware support for software controlled multithreadingACM SIGARCH Computer Architecture News10.1145/1241601.124160635:1(3-12)Online publication date: 1-Mar-2007
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Barnes RSias JNystrom EPatel SNavarro JHwu W(2006)Beating In-Order Stalls with "Flea-Flicker" Two-Pass PipeliningIEEE Transactions on Computers10.1109/TC.2006.455:1(18-33)Online publication date: 1-Jan-2006
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Ro WGaudiot J(2006)Design and effectiveness of small-sized decoupled dispatch queuesProceedings of the 12th international conference on Parallel Processing10.1007/11823285_50(485-494)Online publication date: 28-Aug-2006
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Barnes RNystrom ESias JPatel SNavarro NHwu W(2003)Beating in-order stalls with "flea-flicker" two-pass pipeliningProceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture10.5555/956417.956557Online publication date: 3-Dec-2003
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