Using emulation software to predict the performance of algorithms on NVRAM
Pages 142 - 146
Abstract
Currently, new storage technologies which unite the latency and byte-addressability of DRAM with the persistence of disks are being developed. This non-volatile memory (NVRAM) may start a software revolution. Traditionally, software was developed for two levels of storage and NVRAM reduces the hierarchy to a single-level store. Current research projects are already exploring the potential of NVRAM, but they face a challenge when they want to evaluate the performance: The new hardware is not yet available.
In this paper, we discuss why benchmark results which are gained on existing DRAM are insufficient for a prediction of the performance on NVRAM. Either existing instructions have to be changed or new ones have to be introduced. We further show that the bochs emulator can be used to build systems which resemble NVRAM, to predict the NVRAM's consequences, and it even allows a comparison of algorithms for NVRAM.
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Information & Contributors
Information
Published In
March 2014
211 pages
ISBN:9781631900075
- General Chair:
- Fernando Barros,
- Program Chairs:
- Kalyan Perumalla,
- Roland Ewald
Sponsors
- EAI: The European Alliance for Innovation
- Create-Net
- ICST
In-Cooperation
Publisher
ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering)
Brussels, Belgium
Publication History
Published: 17 March 2014
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- Research-article
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SIMUTools '14
Sponsor:
- EAI
SIMUTools '14: 7th International ICST Conference on Simulation Tools and Techniques
March 17 - 19, 2014
Lisbon, Portugal
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Overall Acceptance Rate 20 of 73 submissions, 27%
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