Microprogramming instruction systolic arrays
Pages 56 - 69
Abstract
The instruction systolic array (ISA) is a programmable parallel architecture suitable for VLSI implementation. This paper presents a generalization of the ISA, called the microprogrammed ISA, which uses simple microprogramming techniques. Microprogrammed ISAs use dynamic microcodes whose length and contents are tailor made to the current program to be executed, and this can be efficiently implemented in VLSI. Here, microprogramming has the novel advantage of extending the range of algorithms that can be implemented on a given ISA. In particular, microprogramming can extend an ISA's effective communication abilities. Also, the reduction of the program input bandwidth (and pinout) afforded by microprogramming is even more important on large-scale MIMD architectures, such as the ISA. This paper also presents a weakest precondition semantics for the (microprogrammed) ISA model, which provides a means for verifying microprogrammed ISA programs. The semantics is modeled at the micro level, and has potential in the optimization of the microcodes of ISA programs.
References
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Index Terms
- Microprogramming instruction systolic arrays
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Copyright © 1989 Authors.
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- SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
- IEEE-CS: Computer Society
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Association for Computing Machinery
New York, NY, United States
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Published: 01 August 1989
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MICRO89
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MICRO89: 22nd Annual Workshop on Microprogramming and Microarchitecture
August 14 - 16, 1989
Dublin, Ireland
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