research-article

Liquid Silicon: A Data-Centric Reconfigurable Architecture Enabled by RRAM Technology

Authors:

Jing LiAuthors Info & Claims

FPGA '18: Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

Pages 51 - 60

https://doi.org/10.1145/3174243.3174244

Published: 15 February 2018 Publication History

Abstract

This paper presents a data-centric reconfigurable architecture, namely Liquid Silicon, enabled by emerging non-volatile memory, i.e., RRAM. Compared to the heterogeneous architecture of commercial FPGAs, Liquid Silicon is inherently a homogeneous architecture comprising a two-dimensional (2D) array of identical 'tiles'. Each tile can be configured into one or a combination of four modes: TCAM, logic, interconnect, and memory. Such flexibility allows users to partition resources based on applications? needs, in contrast to the fixed hardware design using dedicated hard IP blocks in FPGAs. In addition to better resource usage, its 'memory friendly' architecture effectively addresses the limitations of commercial FPGAs i.e., scarce on-chip memory resources, making it an effective complement to FPGAs. Moreover, its coarse-grained logic implementation results in shallower logic depth, less inter-tile routing overhead, and thus smaller area and better performance, compared with its FPGA counterpart. Our study shows that, on average, for both traditional and emerging applications, we achieve 62% area reduction, 27% speedup and 31% improvement in energy efficiency when mapping applications onto Liquid Silicon instead of FPGAs.

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Cited By

Chen F(2024)System Support for Environmentally Sustainable Computing in Data Centers2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00094(490-495)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00094
Noh MJu DKim S(2024)Dynamic memristor array with multiple reservoir states for training efficient neuromorphic computingJournal of Materials Chemistry C10.1039/D4TC02324BOnline publication date: 2024
https://doi.org/10.1039/D4TC02324B
Truong MShen LGlass AHoffmann ACarley LBain JGhose S(2022)Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic PrimitivesIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2022.317176512:2(393-407)Online publication date: Jun-2022
https://doi.org/10.1109/JETCAS.2022.3171765
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Index Terms

Liquid Silicon: A Data-Centric Reconfigurable Architecture Enabled by RRAM Technology
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Reconfigurable computing
2. Hardware
  1. Integrated circuits
    1. Reconfigurable logic and FPGAs
    2. Semiconductor memory
      1. Non-volatile memory

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cover image ACM Conferences

FPGA '18: Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 2018

310 pages

ISBN:9781450356145

DOI:10.1145/3174243

General Chair:
Jason H. Anderson
University of Toronto, Canada
,
Program Chair:
Kia Bazargan
University of Minnesota, USA

Copyright © 2018 ACM.

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Published: 15 February 2018

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FPGA '18: The 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 25 - 27, 2018

CALIFORNIA, Monterey, USA

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FPGA '18 Paper Acceptance Rate 10 of 116 submissions, 9%;

Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

Chen F(2024)System Support for Environmentally Sustainable Computing in Data Centers2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00094(490-495)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00094
Noh MJu DKim S(2024)Dynamic memristor array with multiple reservoir states for training efficient neuromorphic computingJournal of Materials Chemistry C10.1039/D4TC02324BOnline publication date: 2024
https://doi.org/10.1039/D4TC02324B
Truong MShen LGlass AHoffmann ACarley LBain JGhose S(2022)Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic PrimitivesIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2022.317176512:2(393-407)Online publication date: Jun-2022
https://doi.org/10.1109/JETCAS.2022.3171765
Lima JMoura RCarro L(2020)Leveraging reuse and endurance by efficient mapping and placement for NVM-based FPGAs2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS50870.2020.9159743(1-6)Online publication date: Jul-2020
https://doi.org/10.1109/IOLTS50870.2020.9159743
Chen XYin LLiu BHan Y(2019)Merging Everything (ME)Proceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3322477(1-2)Online publication date: 2-Jun-2019
https://dl.acm.org/doi/10.1145/3316781.3322477
Chen ADatta SHu XNiemier MRosing TYang J(2019)A Survey on Architecture Advances Enabled by Emerging Beyond-CMOS TechnologiesIEEE Design & Test10.1109/MDAT.2019.290235936:3(46-68)Online publication date: Jun-2019
https://doi.org/10.1109/MDAT.2019.2902359
Levchenko NOkunev AZmejev D(2019)Implementation Variants of the Global Distributed Associative Computing Environment for the Parallel Dataflow Computing System “Buran”2019 IEEE East-West Design & Test Symposium (EWDTS)10.1109/EWDTS.2019.8884422(1-4)Online publication date: Sep-2019
https://doi.org/10.1109/EWDTS.2019.8884422

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