research-article

Convolution engine: balancing efficiency & flexibility in specialized computing

Authors:

Wajahat Qadeer,

Preethi Venkatesan,

Christos Kozyrakis,

Mark A. HorowitzAuthors Info & Claims

ISCA '13: Proceedings of the 40th Annual International Symposium on Computer Architecture

Pages 24 - 35

https://doi.org/10.1145/2485922.2485925

Published: 23 June 2013 Publication History

Abstract

This paper focuses on the trade-off between flexibility and efficiency in specialized computing. We observe that specialized units achieve most of their efficiency gains by tuning data storage and compute structures and their connectivity to the data-flow and data-locality patterns in the kernels. Hence, by identifying key data-flow patterns used in a domain, we can create efficient engines that can be programmed and reused across a wide range of applications.

We present an example, the Convolution Engine (CE), specialized for the convolution-like data-flow that is common in computational photography, image processing, and video processing applications. CE achieves energy efficiency by capturing data reuse patterns, eliminating data transfer overheads, and enabling a large number of operations per memory access. We quantify the tradeoffs in efficiency and flexibility and demonstrate that CE is within a factor of 2-3x of the energy and area efficiency of custom units optimized for a single kernel. CE improves energy and area efficiency by 8-15x over a SIMD engine for most applications.

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Index Terms

Convolution engine: balancing efficiency & flexibility in specialized computing
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Heterogeneous (hybrid) systems
2. Hardware
  1. Very large scale integration design
    1. VLSI system specification and constraints

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cover image ACM Other conferences

ISCA '13: Proceedings of the 40th Annual International Symposium on Computer Architecture

June 2013

686 pages

ISBN:9781450320795

DOI:10.1145/2485922

General Chair:
Avi Mendelson
Technion

ACM SIGARCH Computer Architecture News Volume 41, Issue 3
ICSA '13
June 2013
666 pages
ISSN:0163-5964
DOI:10.1145/2508148
Issue’s Table of Contents

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 23 June 2013

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Defense Advanced Research Projects Agency

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ISCA'13

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ISCA'13: The 40th Annual International Symposium on Computer Architecture

June 23 - 27, 2013

Tel-Aviv, Israel

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ISCA '13 Paper Acceptance Rate 56 of 288 submissions, 19%;

Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

Taranco RArnau JGonzález A(2024)SLIDEX: A Novel Architecture for Sliding Window ProcessingProceedings of the 38th ACM International Conference on Supercomputing10.1145/3650200.3656613(312-323)Online publication date: 30-May-2024
https://dl.acm.org/doi/10.1145/3650200.3656613
Lu LLuo ZZheng SYin JCong JLiang YYin J(2024)Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow DecompositionIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.333720843:4(1177-1190)Online publication date: Apr-2024
https://doi.org/10.1109/TCAD.2023.3337208
Chatzopoulos OPapadimitriou GKarakostas VGizopoulos D(2024)Gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00047(543-559)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00047
Naganawa YKamei HKanetaka YNogami HMaeda YFukushima N(2024)SIMD-Constrained Lookup Table for Accelerating Variable-Weighted Convolution on x86/64 CPUsIEEE Access10.1109/ACCESS.2024.335472012(15800-15819)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3354720
Jan YJóźwiak L(2024)Quality-driven design of deep neural network hardware accelerators for low power CPS and IoT applicationsMicroprocessors and Microsystems10.1016/j.micpro.2024.105119111(105119)Online publication date: Nov-2024
https://doi.org/10.1016/j.micpro.2024.105119
Ma TFeng YZhang XZhu YSolihin YHeinrich M(2023)CAMJ: Enabling System-Level Energy Modeling and Architectural Exploration for In-Sensor Visual ComputingProceedings of the 50th Annual International Symposium on Computer Architecture10.1145/3579371.3589064(1-14)Online publication date: 17-Jun-2023
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Zhang JSultan AZandigohar MSchirner G(2023)Generating Unified Platforms Using Multigranularity Domain DSE (MG-DmDSE) Exploiting Application SimilaritiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.317237342:1(280-293)Online publication date: Jan-2023
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Yousefifeshki FLi HKhomh F(2023)Studying the challenges of developing hardware description language programsInformation and Software Technology10.1016/j.infsof.2023.107196159:COnline publication date: 1-Jul-2023
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Pokhrel NSnäll SHeimo OSarwar UAirola ASäntti T(2023)Accelerating Image Processing Using Reduced Precision Calculation Convolution EnginesJournal of Signal Processing Systems10.1007/s11265-023-01869-595:9(1115-1126)Online publication date: 9-May-2023
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