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Interprocedural partial redundancy elimination and its application to distributed memory compilation

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Raja DasAuthors Info & Claims

PLDI '95: Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation

Pages 258 - 269

https://doi.org/10.1145/207110.207157

Published: 01 June 1995 Publication History

Abstract

Partial Redundancy Elimination (PRE) is a general scheme for suppressing partial redundancies which encompasses traditional optimizations like loop invariant code motion and redundant code elimination. In this paper we address the problem of performing this optimization interprocedurally. We use interprocedural partial redundancy elimination for placement of communication and communication preprocessing statements while compiling for distributed memory parallel machines.

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Cited By

Campos Ferreira Guimarães BQuintão Pereira FVerbrugge CLhoták OShen X(2023)Lazy Evaluation for the Lazy: Automatically Transforming Call-by-Value into Call-by-NeedProceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction10.1145/3578360.3580270(239-249)Online publication date: 17-Feb-2023
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Strout MHall MOlschanowsky C(2018)The Sparse Polyhedral Framework: Composing Compiler-Generated Inspector-Executor CodeProceedings of the IEEE10.1109/JPROC.2018.2857721106:11(1921-1934)Online publication date: Nov-2018
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Interprocedural partial redundancy elimination and its application to distributed memory compilation

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Interprocedural Partial Redundancy Elimination With Application to Distributed Memory Compilation

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cover image ACM Conferences

PLDI '95: Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation

June 1995

335 pages

ISBN:0897916972

DOI:10.1145/207110

Chairman:
David W. Wall
Digital—Western Research Laboratory

ACM SIGPLAN Notices Volume 30, Issue 6
June 1995
327 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/223428
Editors:
Brent T. Hailpern
IBM T. J. Watson Research Center, Yorktown Heoghts, NY
,
Richard L. Wexelblat
IRS IS:AO, Washington, DC
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Copyright © 1995 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 June 1995

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PLDI95: ACM SIGPLAN Conference on Programming Language Design and Implementation

June 18 - 21, 1995

California, La Jolla, USA

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PLDI '95 Paper Acceptance Rate 28 of 105 submissions, 27%;

Overall Acceptance Rate 406 of 2,067 submissions, 20%

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Cited By

Campos Ferreira Guimarães BQuintão Pereira FVerbrugge CLhoták OShen X(2023)Lazy Evaluation for the Lazy: Automatically Transforming Call-by-Value into Call-by-NeedProceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction10.1145/3578360.3580270(239-249)Online publication date: 17-Feb-2023
https://dl.acm.org/doi/10.1145/3578360.3580270
Augustine TSarma JPouchet LRodríguez GMcKinley KFisher K(2019)Generating piecewise-regular code from irregular structuresProceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/3314221.3314615(625-639)Online publication date: 8-Jun-2019
https://dl.acm.org/doi/10.1145/3314221.3314615
Strout MHall MOlschanowsky C(2018)The Sparse Polyhedral Framework: Composing Compiler-Generated Inspector-Executor CodeProceedings of the IEEE10.1109/JPROC.2018.2857721106:11(1921-1934)Online publication date: Nov-2018
https://doi.org/10.1109/JPROC.2018.2857721
Ravishankar MDathathri RElango VPouchet LRamanujam JRountev ASadayappan P(2015)Distributed memory code generation for mixed Irregular/Regular computationsACM SIGPLAN Notices10.1145/2858788.268851550:8(65-75)Online publication date: 24-Jan-2015
https://dl.acm.org/doi/10.1145/2858788.2688515
Ravishankar MDathathri RElango VPouchet LRamanujam JRountev ASadayappan PCohen AGrove D(2015)Distributed memory code generation for mixed Irregular/Regular computationsProceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/2688500.2688515(65-75)Online publication date: 24-Jan-2015
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Ravishankar MEisenlohr JPouchet LRamanujam JRountev ASadayappan P(2014)Automatic parallelization of a class of irregular loops for distributed memory systemsACM Transactions on Parallel Computing10.1145/26602511:1(1-37)Online publication date: 3-Oct-2014
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Ravishankar MEisenlohr JPouchet LRamanujam JRountev ASadayappan PHollingsworth J(2012)Code generation for parallel execution of a class of irregular loops on distributed memory systemsProceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis10.5555/2388996.2389094(1-11)Online publication date: 10-Nov-2012
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Jang CLee JEgger BRyu S(2012)Automatic code overlay generation and partially redundant code fetch eliminationACM Transactions on Architecture and Code Optimization10.1145/2207222.22072269:2(1-32)Online publication date: 15-Jun-2012
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Ravishankar MEisenlohr JPouchet LRamanujam JRountev ASadayappan P(2012)Code generation for parallel execution of a class of irregular loops on distributed memory systemsProceedings of the 2012 International Conference for High Performance Computing, Networking, Storage and Analysis10.1109/SC.2012.30(1-11)Online publication date: 10-Nov-2012
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Ren BAgrawal G(2011)Compiling Dynamic Data Structures in Python to Enable the Use of Multi-core and Many-core LibrariesProceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques10.1109/PACT.2011.13(68-77)Online publication date: 10-Oct-2011
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