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Representing circuits more efficiently in symbolic model checking

Authors:

J. R. Burch,

E. M. Clarke,

D. E. LongAuthors Info & Claims

DAC '91: Proceedings of the 28th ACM/IEEE Design Automation Conference

Pages 403 - 407

https://doi.org/10.1145/127601.127702

Published: 01 June 1991 Publication History

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Representing circuits more efficiently in symbolic model checking
1. Hardware

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DAC '91: Proceedings of the 28th ACM/IEEE Design Automation Conference

June 1991

783 pages

ISBN:0897913957

DOI:10.1145/127601

Chairman:
A. Richard Newton
Univ. of California, Berkeley

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 June 1991

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DAC91: The 28th ACM/IEEE Design Automation Conference

June 17 - 22, 1991

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Sequential circuit verification using symbolic model checking

Symbolic Model Checking without BDDs

SAT-based unbounded symbolic model checking

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Sequential circuit verification using symbolic model checking

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SAT-based unbounded symbolic model checking

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