research-article

Detecting Vulnerability in Hardware Description Languages: Opcode Language Processing

Authors:

Alaaddin Goktug Ayar,

Abdullah Sahruri,

Mehran Shoushtari Moghadam,

M. Hassan Najafi,

Martin MargalaAuthors Info & Claims

IEEE Embedded Systems Letters, Volume 16, Issue 2

Pages 222 - 226

https://doi.org/10.1109/LES.2023.3334728

Published: 01 June 2024 Publication History

Abstract

Detecting vulnerable code blocks has become a highly popular topic in computer-aided design, especially with the advancement of natural language processing (NLP). Analyzing hardware description languages (<monospace>HDLs</monospace>), such as Verilog, involves dealing with lengthy code. This letter introduces an innovative identification of attack-vulnerable hardware by the use of <monospace>opcode</monospace> processing. Leveraging the advantage of architecturally defined <monospace>opcodes</monospace> and expressing all operations at the beginning of each code line, the word processing problem is efficiently transformed into <monospace>opcode</monospace> processing. This research converts a benchmark dataset into an intermediary code stack, subsequently classifying secure and fragile codes using NLP techniques. The results reveal a framework that achieves up to 94% accuracy when employing sophisticated convolutional neural networks (CNNs) architecture with extra embedding layers. Thus, it provides a means for users to quickly verify the vulnerability of their <monospace>HDL</monospace> code by inspecting a supervised learning model trained on the predefined vulnerabilities. It also supports the superior efficacy of <monospace>opcode</monospace>-based processing in Trojan detection by analyzing the outcomes derived from a model trained using the <monospace>HDL</monospace> dataset.

References

[1]

H. Salmani et al., “Trust-hub trojan benchmark for hardware trojan detection model creation using machine learning,” Dataset, IEEE DataPort, New York, NY, USA, 2022.

[2]

K. I. Gubbi et al., “Hardware trojan detection using machine learning: A tutorial,” ACM TECS, vol. 22, no. 3, pp. 1–26, Apr. 2023.

[3]

B. Shakya, T. He, H. Salmani, D. Forte, S. Bhunia, and M. Tehranipoor, “Benchmarking of hardware trojans and maliciously affected circuits,” J. Hardw. Syst. Secur., vol. 1, no. 1, pp. 85–102, Mar. 2017.

[4]

C. Dong et al, “A cost-driven method for deep-learning-based hardware trojan detection,” Sensors, vol. 23, no. 12, p. 5503, 2023.

[5]

L. Shen, D. Mu, G. Cao, M. Qin, J. Zhu, and W. Hu, “Accelerating hardware security verification and vulnerability detection through state space reduction,” Coumpt. Security, vol. 103, Apr. 2021, Art. no.

[6]

T. Kurihara, K. Hasegawa, and N. Togawa, “Evaluation on hardware-trojan detection at gate-level IP cores utilizing machine learning methods,” in Proc. IEEE IOLTS, 2020, pp. 1–4.

[7]

S. Yang, T. Hoque, P. Chakraborty, and S. Bhunia, “Golden-free hardware trojan detection using self-referencing,” IEEE Trans. Very Large Scale Integr. Sys., vol. 30, no. 3, pp. 325–338, Mar. 2022.

[8]

M. Tehranipoor and F. Koushanfar, “A survey of hardware trojan taxonomy and detection,” IEEE Des. & Test Comput., vol. 27, no. 1, pp. 10–25, Jan./Feb. 2010.

Digital Library

[9]

R. Yasaei, S. Faezi, and M. A. Al Faruque, “Golden reference-free hardware trojan localization using graph convolutional network,” IEEE Trans. Very Large Scale Integr. Syst., vol. 30, no. 10, pp. 1401–1411, Oct. 2022.

Digital Library

[10]

W. Snyder, “Verilator and SystemPerl,” in Proc. North Amer. SystemC Users’ Group Meeting, DAC, 2004, p. 1–14.

[11]

J. Cruz, Y. Huang, P. Mishra, and S. Bhunia, “An automated configurable trojan insertion framework for dynamic trust benchmarks,” in Proc. IEEE Des. Autom. & Test Eur. Conf. & Exhibition (DATE), 2018, pp. 1598–1603.

[12]

S. Amir and D. Forte, “Adaptable and divergent synthetic benchmark generation for hardware security,” in Proc. ICCAD, 2020, pp. 1–9.

[13]

S. Narasimhan, R. S. Chakraborty, and S. Chakraborty, “Hardware IP protection during evaluation using embedded sequential trojan,” IEEE Des. Test Coumput., vol. 29, no. 3, pp. 70–79, Jun. 2012.

[14]

J. Cruz, P. Slpsk, P. Gaikwad, and S. Bhunia “TVF: A metric for quantifying vulnerability against hardware trojan attacks,” IEEE Trans. Very Large Scale Integr. Syst., vol. 31, no. 7, pp. 969–979, Jul. 2023.

Digital Library

[15]

A. G. Ayar, A. Sahruri, S. Aygun, M. S. Moghadam, M. H. Najafi, and M. Margala, “Detecting vulnerability in hardware description languages,” early access, Nov. 21, 2023. 10.1109/LES.2023.3334728. https://github.com/goktug16/Opcode-Language-Processing

Digital Library

[16]

Trust-Hub. Trust-hub, 2023. [Online]. Available: https://www.trust-hub.org//benchmarks/chip-level-trojan Accessed: Jul. 1, 2023.

[17]

H. Salmani, M. Tehranipoor, and R. Karri, “On design vulnerability analysis and trust benchmarks development,” in Proc. ICCD, 2013, pp. 471–474.

[18]

A. L. Maas, R. E. Daly, P. T. Pham, D. Huang, A. Y. Ng, and C. Potts, “Learning word vectors for sentiment analysis,” in Proc. ACL, 2011, pp. 142–150.

[19]

Y. Luan and S. Lin “Research on text classification based on CNN and LSTM,” in Proc. ICAICA, 2019, pp. 352–355.

[20]

B. Li et al. “Data augmentation approaches in natural language processing: A survey,” AI Open, vol. 3, pp. 71–90, Aug. 2022.

[21]

K. Hasegawa, M. Yanagisawa, and N. Togawa, “Trojan-feature extraction at gate-level netlists and its application to hardware-trojan detection using random forest classifier,” in Proc. IEEE ISCAS, 2017, pp. 1–4.

[22]

K. Hasegawa, M. Yanagisawa, and N. Togawa, “Hardware trojans classification for gate-level netlists using multi-layer neural networks,” in Proc. IEEE IOLTS, 2017, pp. 227–232.

[23]

P. Zhao and Q. Liu, “Density-based clustering method for hardware trojan detection based on gate-level structural features,” in Proc. AsianHOST, 2019, pp. 1–4.

[24]

Y. Wang, T. Han, X. Han, and P. Liu, “Ensemble-learning-based hardware trojans detection method by detecting the trigger nets,” in Proc. IEEE ISCAS, 2019, pp. 1–5.

Cited By

Ayar ASahruri AAygun SMoghadam MNajafi MMargala M(2023)Detecting Vulnerability in Hardware Description Languages: Opcode Language ProcessingIEEE Embedded Systems Letters10.1109/LES.2023.333472816:2(222-226)Online publication date: 21-Nov-2023
https://dl.acm.org/doi/10.1109/LES.2023.3334728

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cover image IEEE Embedded Systems Letters

IEEE Embedded Systems Letters Volume 16, Issue 2

June 2024

162 pages

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1943-0663 © 2023 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See https://www.ieee.org/publications/rights/index.html for more information.

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Published: 01 June 2024

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Cited By

Ayar ASahruri AAygun SMoghadam MNajafi MMargala M(2023)Detecting Vulnerability in Hardware Description Languages: Opcode Language ProcessingIEEE Embedded Systems Letters10.1109/LES.2023.333472816:2(222-226)Online publication date: 21-Nov-2023
https://dl.acm.org/doi/10.1109/LES.2023.3334728

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